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    • 1. 发明申请
    • OPERATING A PHASE LOCKED LOOP
    • 操作相位锁定环
    • WO2006100617A1
    • 2006-09-28
    • PCT/IB2006/050737
    • 2006-03-09
    • NOKIA CORPORATIONSALONEN, VesaVILHONEN, Sami
    • SALONEN, VesaVILHONEN, Sami
    • H03L7/113H03L7/187
    • H03L7/189H03L7/113
    • A PLL comprises a VCO and a loop filter, wherein the VCO generates an AC output signal having a frequency which depends on an applied control voltage, and wherein the loop filter provides a control voltage to the VCO. The control voltage reflects determined phase differences between a potentially frequency divided output signal of the VCO and a reference signal. When operating the PLL, frequency deviations between a potentially frequency divided output signal of the VCO and a reference signal are detected and in addition, a resolution employed for detecting the frequency deviations is lower than a resolution employed for determining the phase differences. In case a frequency deviation is detected, a direct-current voltage shift is added to the control voltage provided by the loop filter.
    • PLL包括VCO和环路滤波器,其中VCO产生具有取决于施加的控制电压的频率的AC输出信号,并且其中环路滤波器向VCO提供控制电压。 控制电压反映了VCO的潜在分频输出信号与参考信号之间确定的相位差。 当操作PLL时,检测VCO的潜在分频输出信号与参考信号之间的频率偏差,此外,用于检测频率偏差的分辨率低于用于确定相位差的分辨率。 在检测到频率偏差的情况下,将直流电压偏移加到由环路滤波器提供的控制电压。