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1. 发明申请

WO2006095326A2 UNIVERSAL SERIAL BUS BRIDGE 审中-公开
标题翻译：通用串行总线桥
公开(公告)号：WO2006095326A2
公开(公告)日：2006-09-14
申请号：PCT/IB2006/050743
申请日：2006-03-09
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SHARMA, Kawshol , TJIA, Jerome
发明人： SHARMA, Kawshol , TJIA, Jerome
CPC分类号： G06F13/4022
摘要： A USB controller is for use in an electronic device, and has two ports. A first port acts as a device port, allowing the electronic device to be connected to a host device. A second port acts as a host port, allowing the electronic device to be connected to a peripheral device. When a host device is connected to the first port and a peripheral device is connected to the second port, the peripheral device can be shared simultaneously between the electronic device and the host device.
摘要翻译： USB控制器用于电子设备，并具有两个端口。第一个端口用作设备端口，允许电子设备连接到主机设备。第二个端口用作主机端口，允许电子设备连接到外围设备。当主机连接到第一端口并且外围设备连接到第二端口时，可以在电子设备和主机设备之间同时共享外围设备。

2. 发明申请

WO2006095326A3 UNIVERSAL SERIAL BUS BRIDGE 审中-公开
标题翻译：通用串行总线桥
公开(公告)号：WO2006095326A3
公开(公告)日：2006-11-23
申请号：PCT/IB2006050743
申请日：2006-03-09
申请人： KONINKL PHILIPS ELECTRONICS NV , SHARMA KAWSHOL , TJIA JEROME
发明人： SHARMA KAWSHOL , TJIA JEROME
IPC分类号： G06F13/40
CPC分类号： G06F13/4022
摘要： A USB controller is for use in an electronic device, and has two ports. A first port acts as a device port, allowing the electronic device to be connected to a host device. A second port acts as a host port, allowing the electronic device to be connected to a peripheral device. When a host device is connected to the first port and a peripheral device is connected to the second port, the peripheral device can be shared simultaneously between the electronic device and the host device.
摘要翻译： USB控制器用于电子设备，并具有两个端口。第一个端口用作设备端口，允许电子设备连接到主机设备。第二个端口充当主机端口，允许电子设备连接到外围设备。当主机设备连接到第一端口并且外围设备连接到第二端口时，可以在电子设备和主机设备之间同时共享外围设备。

3. 发明申请

WO2005114413A1 METHOD AND SYSTEM FOR PROCESSING JOBS WITH TWO DUAL-ROLE DEVICES 审中-公开
标题翻译：用两个双重设备处理工作的方法和系统
公开(公告)号：WO2005114413A1
公开(公告)日：2005-12-01
申请号：PCT/IB2005/051656
申请日：2005-05-20
申请人： KONINKLIJKE PHILIPS ELECTRONICS, N.V. , U.S. PHILIPS CORPORATION , TJIA, Jerome , ZHANG, Zhenyu
发明人： TJIA, Jerome , ZHANG, Zhenyu
IPC分类号： G06F9/50
CPC分类号： G06F9/5044
摘要： A collaboration request may be sent to a host or a peripheral when a job is to be processed. The job may include one or more tasks. The host determines which device is better suited to act as host by analyzing the type of task or job to be executed and the capabilities of the host and peripheral. If the peripheral is better suited to act as host, the host and peripheral swap roles and control of a task or job is transferred to the peripheral. The host and peripheral may return to their default roles once the task or job is complete.
摘要翻译：当要处理作业时，可以向主机或外设发送协作请求。该作业可能包括一个或多个任务。主机通过分析要执行的任务或作业的类型以及主机和外设的功能来确定哪个设备更适合充当主机。如果外设更适合作为主机，主机和外设交换角色以及任务或作业的控制将被传送到外设。任务或作业完成后，主机和外设可能会返回到其默认角色。

4. 发明申请

WO2005078932A1 PULL-UP CIRCUIT 审中-公开
标题翻译：上拉电路
公开(公告)号：WO2005078932A1
公开(公告)日：2005-08-25
申请号：PCT/IB2004/052934
申请日：2004-12-29
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , STOPEL, Rick, F., J. , TJIA, Jerome
发明人： STOPEL, Rick, F., J. , TJIA, Jerome
IPC分类号： H03K19/0185
CPC分类号： H04L25/0264 , G06F13/4072 , H03K19/01721
摘要： A pull-up circuit comprises an operational amplifier which forms part of a feedback circuit, acting to bring a pull-up circuit output equal to a reference voltage input. The pull-up circuit may form part of a USB transceiver for incorporation in a USB Device. When the supply voltage of the USB Device is sufficiently high, it is used to provide the required pull-up voltage, with the feedback circuit including the operational amplifier being enabled only when the supply voltage of the USB Device is not high enough to provide the required pull-up voltage. In that case, the USB bus voltage is used to generate the reference voltage which is used as an input to the feedback circuit.
摘要翻译：上拉电路包括形成反馈电路的一部分的运算放大器，用于使上拉电路输出等于参考电压输入。上拉电路可以构成用于并入USB设备的USB收发器的一部分。当USB设备的电源电压足够高时，用于提供所需的上拉电压，只有当USB设备的电源电压不足以提供需要上拉电压。在这种情况下，USB总线电压用于产生用作反馈电路的输入的参考电压。

5. 发明申请

WO2004029817A1 BUS CONNECTION SYSTEM 审中-公开
标题翻译：总线连接系统
公开(公告)号：WO2004029817A1
公开(公告)日：2004-04-08
申请号：PCT/IB2003/002236
申请日：2003-05-22
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , NG, Chee, Y. , CHANG, Yeow, K. , TJIA, Jerome , SHARMA, Kawshol
发明人： NG, Chee, Y. , CHANG, Yeow, K. , TJIA, Jerome , SHARMA, Kawshol
IPC分类号： G06F13/38
CPC分类号： G06F13/385
摘要： A bus station in the form of a hardware dongle, operates in conjunction with a USB Device running suitable software. When the bus station determines that a bus host is connected to a first bus communication port thereof, it acts as a transceiver to allow conventional bus communications between said bus host and a bus device connected to a second bus communication port thereof. When the bus station determines that a bus device running suitable software is connected to the first bus communication port thereof, it acts as an alternate host to allow bus communications between said bus device connected to the first bus communication port and a bus device connected to a second bus communication port.
摘要翻译：硬件加密狗形式的总线站与运行合适软件的USB设备一起运行。当总线站确定总线主机连接到其第一总线通信端口时，其用作收发器以允许所述总线主机与连接到其第二总线通信端口的总线设备之间的常规总线通信。当总线站确定运行合适的软件的总线设备连接到其第一总线通信端口时，它充当替代主机，以允许连接到第一总线通信端口的总线设备与连接到第一总线通信端口的总线设备之间的总线通信第二总线通信端口。

6. 发明申请

WO2003107199A2 BUS SYSTEM, STATION FOR USE IN A BUS SYSTEM, AND BUS INTERFACE 审中-公开
标题翻译：总线系统，总线系统中的总线系统和总线接口
公开(公告)号：WO2003107199A2
公开(公告)日：2003-12-24
申请号：PCT/IB2003/002196
申请日：2003-05-21
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , TJIA, Jerome , VERTENTEN, Bart
发明人： TJIA, Jerome , VERTENTEN, Bart
IPC分类号： G06F13/42
CPC分类号： G06F13/387 , G06F13/102
摘要： The invention relates to a bus system comprising a first station and a second station coupled by a bus for transferring signals. The bus is arranged to operate according to a protocol in which said first station repeatedly sends requests for data to the second station. The protocol comprises a first mode for transferring the requests in a first request format at a first communication speed and at least a second mode for transferring said requests in a second request format at a second speed. The second station is arranged to receive requests in a mode selected from a group of modes comprising said first and second modes, and is arranged to give a first indication to said first station if it is arranged to operate according to the first mode and a second indication if it is arranged to operate according to the second mode. The first station comprises a processor, a controller, and a translator. The processor is operable to generate request properties for requests in the first request format. The controller is operable to generate the requests in the first request format from the request properties. The controller is also operable to transmit the request in the first format to the second station upon detection of the first indication and to forward the requests to the translator upon detection of the second indication. The translator is also operable to transmit the requests in the second format to the second station.
摘要翻译：本发明涉及一种总线系统，其包括由总线耦合的用于传送信号的第一站和第二站。总线被布置为根据协议操作，其中所述第一站重复地向第二站发送数据请求。该协议包括用于以第一通信速度以第一请求格式传送请求的第一模式和用于以第二速度以第二请求格式传送所述请求的至少第二模式。第二站被设置为以从包括所述第一和第二模式的一组模式中选择的模式接收请求，并且被布置为如果被布置为根据第一模式进行操作，则向第一站发送第一指示，并且第二指示是否按照第二模式进行操作。第一站包括处理器，控制器和翻译器。处理器可操作以生成第一请求格式的请求的请求属性。控制器可操作以从请求属性生成第一请求格式的请求。控制器还可操作以在检测到第一指示时将第一格式的请求发送到第二站，并且在检测到第二指示时将请求转发给翻译器。翻译器还可操作以将第二格式的请求发送到第二站。

7. 发明申请

WO2011073184A3 CURRENT BOOST CIRCUIT FOR A DIGITAL BUS LINE 审中-公开
公开(公告)号：WO2011073184A3
公开(公告)日：2011-06-23
申请号：PCT/EP2010/069615
申请日：2010-12-14
申请人： ST-ERICSSON SA , RAZZELL, Charles , LIM, Hong Sair , OKUR, Batuhan , TJIA, Jerome , WEE, Tue Fatt David
发明人： RAZZELL, Charles , LIM, Hong Sair , OKUR, Batuhan , TJIA, Jerome , WEE, Tue Fatt David
IPC分类号： H04B3/06 , H04L25/02
摘要： A current boost circuit acts as an "eye opener" for a digital bus line. A controlled current injects a fraction of the normal signaling current magnitude from a source driver onto the bus line, after a transition between the two logical states on the bus line is detected. The duration of the additional current injection is a fraction of the unit interval. In one embodiment, a linear system uses the summation of a proportional boost current and a delayed and negated proportional boost current. In another embodiment, a positive or negative edge detection circuit triggers a monostable pulse generator that controls the injection of short bursts of additional current into the bus lines. In some embodiments the boost current is suppressed when the bus line is driven from a driver other than the source driver.

8. 发明申请

WO2006109240A3 FAST FOURIER TRANSFORM ARCHITECTURE 审中-公开
标题翻译：快速FOURIER变形架构
公开(公告)号：WO2006109240A3
公开(公告)日：2009-09-03
申请号：PCT/IB2006051101
申请日：2006-04-11
申请人： NXP BV , PU TIANYAN , BI LEI , TJIA JEROME
发明人： PU TIANYAN , BI LEI , TJIA JEROME
IPC分类号： G06F17/14
CPC分类号： G06F17/142
摘要： A last fourier transform architecture has parallel data processing paths. Input data is applied to the parallel data processing paths in a repeating sequence, and processed in those paths. Data sequencers are used to combine the outputs from the data processing paths into the required sequence.
摘要翻译：最后一个傅立叶变换架构具有并行数据处理路径。输入数据以重复序列应用于并行数据处理路径，并以这些路径进行处理。数据定序器用于将来自数据处理路径的输出组合到所需的序列中。

9. 发明申请

WO2009093108A1 COMMUNICATION UNIT 审中-公开
标题翻译：通信单元
公开(公告)号：WO2009093108A1
公开(公告)日：2009-07-30
申请号：PCT/IB2008/055580
申请日：2008-12-30
申请人： NXP B.V. , TJIA, Jerome , DEGRAEF, Jo
发明人： TJIA, Jerome , DEGRAEF, Jo
IPC分类号： G06F13/38
CPC分类号： G06F13/387
摘要： Adapter unit 10 provides a translation operation between wired and wireless environments to effect transparent operation between the host 11 and the device 12, such that host 11 sees a wireless USB device and the device sees a wired USB host enabling the wired USB device to interact fully with a wireless USB operation. The adapter unit is particularly suited to be operable with all mass storage, hard drive, still camera, mobile phone and printer applications. Adapter unit 10 operates by providing a WUSB device 13 on the wireless side, to take WUSB traffic from the wireless USB host and forward this to the wired USB; likewise USB host 14 is provided on the wired side.
摘要翻译：适配器单元10提供有线和无线环境之间的转换操作，以实现主机11和设备12之间的透明操作，使得主机11看到无线USB设备，并且设备看到有线USB主机，使有线USB设备能够完全交互通过无线USB操作。适配器单元特别适用于所有大容量存储，硬盘驱动器，静态照相机，移动电话和打印机应用。适配器单元10通过在无线侧提供WUSB设备13来操作，以从无线USB主机获取WUSB业务并将其转发到有线USB; 同样，USB主机14设置在有线侧。

10. 发明申请

WO2006109240A2 FAST FOURIER TRANSFORM ARCHITECTURE 审中-公开
标题翻译：快速FOURIER变形架构
公开(公告)号：WO2006109240A2
公开(公告)日：2006-10-19
申请号：PCT/IB2006/051101
申请日：2006-04-11
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , PU, Tianyan , BI, Lei , TJIA, Jerome
发明人： PU, Tianyan , BI, Lei , TJIA, Jerome
IPC分类号： G06F17/14
CPC分类号： G06F17/142
摘要： A last fourier transform architecture has parallel data processing paths. Input data is applied to the parallel data processing paths in a repeating sequence, and processed in those paths. Data sequencers are used to combine the outputs from the data processing paths into the required sequence.
摘要翻译：最后一个傅立叶变换架构具有并行数据处理路径。输入数据以重复序列应用于并行数据处理路径，并以这些路径进行处理。数据定序器用于将来自数据处理路径的输出组合到所需的序列中。

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