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    • 2. 发明申请
    • CERAMIC MICROELECTRONICS PACKAGE WITH CO-PLANAR WAVEGUIDE FEED-THROUGH
    • 陶瓷微电子封装与平面波导进料
    • WO9934443A9
    • 2000-03-02
    • PCT/US9826263
    • 1998-12-10
    • STRATEDGE CORP
    • GOING TIMOTHY JLINDNER ALAN W
    • H01L23/66
    • H01L23/66H01L24/48H01L24/49H01L2224/49175H01L2924/00014H01L2924/01019H01L2924/01046H01L2924/01078H01L2924/01079H01L2924/14H01L2924/30107H01L2924/3011H01L2924/30111H01L2924/00H01L2224/45015H01L2924/207H01L2224/45099
    • A ceramic microelectronic package (200) suitable for housing high-frequency electronic devices, and a process for making such a package, are disclosed herein. The package includes a base (102), a ceramic circuit substrate (106) attached to a top surface of the base and having a first cavity for receiving a high-frequency electronic device (116), and conductive patterns (202) deposited on a surface of the circuit substrate. The patterns (204) include signal patterns and flanking ground patterns forming at least a portion of co-planar waveguide (CPW) transmission lines. Each signal pattern is preferably a signal trace, and each ground pattern may be a ground trace or plane. The ground patterns may each have a portion exposed outside the package for external connection to electrical ground. Alternately, the ground patterns may be internally connected to a ground plane formed by the base, when the base is at least partially conductive, by conductive via openings or bonding wires passing through ears cut into a perimeter of the circuit substrate. The base may also be non-conductive such that the transmission line is a suspended CPW transmission line. The package may include a ceramic seal ring (110) substrate attached to the circuit substrate and having a second cavity larger than the first cavity, and a ceramic lid (114) attached thereto such that the transmission line forms a CPW, embedded CPW, and CPW transmission line. Alternatively, the package may include a dielectric sealing cap attached to the circuit substrate and having a chamber larger than the first cavity such that the line again forms a CPW, embedded CPW, and CPW transmission line.
    • 本文公开了一种适用于容纳高频电子器件的陶瓷微电子封装(200)及其制造方法。 所述封装包括基座(102),陶瓷电路基板(106),所述陶瓷电路基板(106)附接到所述基座的顶表面并具有用于接收高频电子器件(116)的第一腔,以及沉积在所述基座 电路基板的表面。 图案(204)包括形成共面波导(CPW)传输线的至少一部分的信号图案和侧面接地图案。 每个信号图案优选地是信号迹线,并且每个接地图案可以是接地迹线或平面。 接地图可以各自具有暴露在封装外部的部分,用于外部连接到电气接地。 或者,当基底至少部分导电时,接地图案可以内部连接到由基底形成的接地平面,通过导电通孔开口或穿过切入电路基板的周边的耳朵的接合线。 基座也可以是非导通的,使得传输线是悬挂的CPW传输线。 封装可以包括附接到电路基板并且具有大于第一空腔的第二空腔的陶瓷密封环(110)和附接到其上的陶瓷盖(114),使得传输线形成CPW,嵌入式CPW,以及 CPW传输线。 替代地,封装可以包括附接到电路基板并具有大于第一空腔的室的电介质密封盖,使得线再次形成CPW,嵌入式CPW和CPW传输线。