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1. 发明申请

WO2007002158A2 MULTI-LEVEL INTERCONNECTIONS FOR AN INTEGRATED CIRCUIT CHIP 审中-公开
标题翻译：集成电路芯片的多级互连
公开(公告)号：WO2007002158A2
公开(公告)日：2007-01-04
申请号：PCT/US2006024085
申请日：2006-06-21
申请人： IBM , GREENBERG DAVID R , PEKARIK JOHN J , SCHOLVIN JORG
发明人： GREENBERG DAVID R , PEKARIK JOHN J , SCHOLVIN JORG
IPC分类号： H01L23/52
CPC分类号： H01L23/528 , H01L23/4824 , H01L2924/0002 , H01L2924/00
摘要： Multilevel metallization layouts for an integrated circuit chip (30) including transistors having first (31 ), second (32) and third (33) elements to which metallization layouts connect. The layouts minimize current limiting mechanism including electromigration by positioning the connection (39) for the second contact vertically (32) from the chip (30), overlapping the planes and fingers of the metallization layouts to the first and second elements (31 ) and (32) and forming a pyramid or staircase of multilevel metallization layers (45) and (46) to smooth diagonal current flow.
摘要翻译：用于集成电路芯片（30）的多层金属化布局包括具有金属化布局连接的第一（31），第二（32）和第三（33）元件的晶体管。布局通过将来自芯片（30）的垂直（32）的第二触点的连接（39）定位成与金属化布局的平面和手指重叠到第一和第二元件（31）和（ 32）并且形成多层金属化层（45）和（46）的金字塔或楼梯以平滑对角线电流。

2. 发明申请

WO2007002158A3 MULTI-LEVEL INTERCONNECTIONS FOR AN INTEGRATED CIRCUIT CHIP 审中-公开
公开(公告)号：WO2007002158A3
公开(公告)日：2007-01-04
申请号：PCT/US2006/024085
申请日：2006-06-21
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , GREENBERG, David, R. , PEKARIK, John, J. , SCHOLVIN, Jorg
发明人： GREENBERG, David, R. , PEKARIK, John, J. , SCHOLVIN, Jorg
IPC分类号： H01L29/41
摘要： Multilevel metallization layouts for an integrated circuit chip (30) including transistors having first (31 ), second (32) and third (33) elements to which metallization layouts connect. The layouts minimize current limiting mechanism including electromigration by positioning the connection (39) for the second contact vertically (32) from the chip (30), overlapping the planes and fingers of the metallization layouts to the first and second elements (31 ) and (32) and forming a pyramid or staircase of multilevel metallization layers (45) and (46) to smooth diagonal current flow.

3. 发明申请

WO2005004206A3 INTEGRATED CIRCUIT HAVING PAIRS OF PARALLEL COMPLEMENTARY FINFETS 审中-公开
标题翻译：集成电路具有平行互补鳍状件对
公开(公告)号：WO2005004206A3
公开(公告)日：2005-02-17
申请号：PCT/US2004021279
申请日：2004-06-30
申请人： IBM , BRYANT ANDRES , CLARK WILLIAM F , FRIED DAVID M , JAFFE MARK D , NOWAK EDWARD J , PEKARIK JOHN J , PUTNAM CHRISTOPHER S
发明人： BRYANT ANDRES , CLARK WILLIAM F , FRIED DAVID M , JAFFE MARK D , NOWAK EDWARD J , PEKARIK JOHN J , PUTNAM CHRISTOPHER S
IPC分类号： H01L21/308 , H01L21/336 , H01L21/84 , H01L27/12 , H01L29/786 , H01L29/06 , H01L21/00 , H01L21/8238 , H01L29/76
CPC分类号： H01L21/84 , H01L21/3086 , H01L21/3088 , H01L27/1203 , H01L29/66795 , H01L29/785 , Y10S438/947
摘要： A method and structure for an integrated circuit structure that utilizes complementary fin-type field effect transistors (FinFETs) is disclosed. The invention has a first-type of FinFET which includes a first fin (100), and a second-type of FinFET which includes a second fin (102) running parallel to the first fin (100). The invention also has an insulator fin positioned between the source/drain regions (130) of the first first-type of FinFET and the second-type of FinFET. The insulator fin has approximately the same width dimensions as the first fin (100) and the second fin (102), such that the spacing between the first-type of FinFET and the second-type of FinFET is approximately equal to the width of one fin. The invention also has a common gate (106) formed over channel regions of the first-type of FinFET and the second-type of FinFET. The gate (106) includes a first impurity doping region adjacent the first-type of FinFET and a second impurity doping region adjacent the second-type of FinFET. The differences between the first impurity doping region and the second impurity doping region provide the gate with different work functions related to differences between the first-type of FinFET and the second-type of FinFET. The first fin (100) and the second fin (102) have approximately the same width.
摘要翻译：公开了一种利用互补鳍型场效应晶体管（FinFET）的集成电路结构的方法和结构。本发明具有包括第一鳍片（100）的第一类型FinFET以及包括平行于第一鳍片（100）延伸的第二鳍片（102）的第二类型FinFET。本发明还具有位于第一第一类型FinFET的源极/漏极区域（130）与第二类型FinFET之间的绝缘体鳍状物。绝缘体鳍状物具有与第一鳍状物（100）和第二鳍状物（102）大致相同的宽度尺寸，使得第一类型的FinFET和第二类型的FinFET之间的间隔大致等于一个鳍。本发明还具有在第一类型FinFET和第二类型FinFET的沟道区上形成的共同栅极（106）。栅极（106）包括与第一类型FinFET相邻的第一杂质掺杂区域和与第二类型FinFET相邻的第二杂质掺杂区域。第一杂质掺杂区域和第二杂质掺杂区域之间的差异为栅极提供与第一类型的FinFET和第二类型的FinFET之间的差异有关的不同的功函数。第一翅片（100）和第二翅片（102）具有大致相同的宽度。

4. 发明申请

WO2005004206A2 INTEGRATED CIRCUIT HAVING PAIRS OF PARALLEL COMPLEMENTARY FINFETS 审中-公开
标题翻译：具有并联补偿器件对的集成电路
公开(公告)号：WO2005004206A2
公开(公告)日：2005-01-13
申请号：PCT/US2004/021279
申请日：2004-06-30
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , BRYANT, Andres , CLARK, William, F. , FRIED, David, M. , JAFFE, Mark, D. , NOWAK, Edward, J. , PEKARIK, John, J. , PUTNAM, Christopher, S.
发明人： BRYANT, Andres , CLARK, William, F. , FRIED, David, M. , JAFFE, Mark, D. , NOWAK, Edward, J. , PEKARIK, John, J. , PUTNAM, Christopher, S.
IPC分类号： H01L
CPC分类号： H01L21/84 , H01L21/3086 , H01L21/3088 , H01L27/1203 , H01L29/66795 , H01L29/785 , Y10S438/947
摘要： A method and structure for an integrated circuit structure that utilizes complementary fin-type field effect transistors (FinFETs) is disclosed. The invention has a first-type of FinFET which includes a first fin (100), and a second-type of FinFET which includes a second fin (102) running parallel to the first fin (100). The invention also has an insulator fin positioned between the source/drain regions (130) of the first first-type of FinFET and the second-type of FinFET. The insulator fin has approximately the same width dimensions as the first fin (100) and the second fin (102), such that the spacing between the first-type of FinFET and the second-type of FinFET is approximately equal to the width of one fin. The invention also has a common gate (106) formed over channel regions of the first-type of FinFET and the second-type of FinFET. The gate (106) includes a first impurity doping region adjacent the first-type of FinFET and a second impurity doping region adjacent the second-type of FinFET. The differences between the first impurity doping region and the second impurity doping region provide the gate with different work functions related to differences between the first-type of FinFET and the second-type of FinFET. The first fin (100) and the second fin (102) have approximately the same width.
摘要翻译：公开了利用互补翅片型场效应晶体管（FinFET）的集成电路结构的方法和结构。本发明具有第一类型的FinFET，其包括第一鳍片（100）和第二类型的FinFET，其包括平行于第一鳍片（100）延伸的第二鳍片（102）。本发明还具有位于第一第一类型的FinFET的源极/漏极区域（130）和第二类型的FinFET之间的绝缘体鳍片。绝缘体鳍片具有与第一翅片（100）和第二翅片（102）大致相同的宽度尺寸，使得第一类型的FinFET和第二类型的FinFET之间的间距近似等于一个鳍。本发明还具有形成在第一类型FinFET和第二类型FinFET的沟道区上的公共栅极（106）。栅极（106）包括与第一类型的FinFET相邻的第一杂质掺杂区域和与第二类型的FinFET相邻的第二杂质掺杂区域。第一杂质掺杂区域和第二杂质掺杂区域之间的差异为栅极提供与第一类型FinFET和第二类型FinFET之间的差异有关的不同功函数。第一翅片（100）和第二翅片（102）具有大致相同的宽度。

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