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1. 发明申请

WO2012175041A1 RF TRANSMITTER ARCHITECTURE, INTEGRATED CIRCUIT DEVICE, WIRELESS COMMUNICATION UNIT AND METHOD THEREFOR 审中-公开
标题翻译：射频发射机架构，集成电路设备，无线通信单元及其方法
公开(公告)号：WO2012175041A1
公开(公告)日：2012-12-27
申请号：PCT/CN2012/077358
申请日：2012-06-21
申请人： MEDIATEK SINGAPORE PTE. LTD. , PENG, Chun-Hsien , LIU, Julia , LU, Chao , WANG, Hua , LIANG, Paul Cheng Po
发明人： PENG, Chun-Hsien , LIU, Julia , LU, Chao , WANG, Hua , LIANG, Paul Cheng Po
IPC分类号： H04B1/04
CPC分类号： H04B1/0475 , H03F1/3241 , H03F1/3247 , H03F1/3294 , H03F3/2171 , H03F3/245 , H03F3/45179 , H03F2200/336 , H03F2201/3233 , H04B2001/0425 , H04L27/368
摘要： A radio frequency (RF) transmitter architecture includes at least one digital signal processing module. The at least one digital signal processing module is configurable to operate in at least a first mode wherein the at least one digital signal processing module is arranged to receive a digital input signal, select, from a reduced set of digital power amplifier (DPA) control values, a plurality of DPA control values based at least partly on the received digital input signal, perform interpolation of the plurality of selected DPA control values to determine a DPA control value from a non-reduced set of DPA control values representative of the received digital input signal, and output to at least one DPA component the determined DPA control value representative of the received digital input signal.
摘要翻译：射频（RF）发射机架构包括至少一个数字信号处理模块。所述至少一个数字信号处理模块可配置为以至少第一模式操作，其中所述至少一个数字信号处理模块被布置为接收数字输入信号，从数字功率放大器（DPA）控制值，至少部分地基于所接收的数字输入信号的多个DPA控制值执行所述多个所选择的DPA控制值的内插，以从代表所接收数字的DPA控制值的非减少集合来确定DPA控制值输入信号，并且将至少一个DPA分量输出到所接收的数字输入信号的DPA控制值。

2. 发明申请

WO2012142909A1 RF TRANSMITTER, INTEGRATED CIRCUIT DEVICE, WIRELESS COMMUNICATION UNIT AND METHOD THEREFOR 审中-公开
标题翻译：射频发射机，集成电路设备，无线通信单元及其方法
公开(公告)号：WO2012142909A1
公开(公告)日：2012-10-26
申请号：PCT/CN2012/073413
申请日：2012-03-31
申请人： MEDIATEK SINGAPORE PTE. LTD. , WANG, Hua , LIANG, Paul Cheng Po , PENG, Chun-Hsien , HUANG, Ho-Chi
发明人： WANG, Hua , LIANG, Paul Cheng Po , PENG, Chun-Hsien , HUANG, Ho-Chi
IPC分类号： H03F1/32
CPC分类号： H04B1/0475 , H03F1/3241 , H04B1/0483 , H04B2001/0425 , H04L27/368
摘要： A radio frequency (RF) transmitter including at least one digital signal processing module is described. The at least one digital signal processing module is arranged to receive a complex digital input signal, successively apply pre-distortion to the received complex digital input signal with a progressively finer granularity, simultaneously progressively increase a sampling rate of the received complex digital input signal, and output a first, in-phase digital control word and a second, quadrature, digital control word for controlling at least one digital power amplifier component to generate an RF signal representative of the received complex digital input signal.
摘要翻译：描述包括至少一个数字信号处理模块的射频（RF）发射机。所述至少一个数字信号处理模块被布置为接收复数字输入信号，以逐渐更细的粒度连续地对接收的复数数字输入信号应用预失真，同时逐渐增加接收的复数数字输入信号的采样率，并输出第一，同相数字控制字和第二正交数字控制字，用于控制至少一个数字功率放大器部件以产生表示所接收的复数数字输入信号的RF信号。

3. 发明申请

WO2010138291A1 PHASE LOCK LOOP WITH A MULTIPHASE OSCILLATOR 审中-公开
标题翻译：相位锁定与多相振荡器
公开(公告)号：WO2010138291A1
公开(公告)日：2010-12-02
申请号：PCT/US2010/034029
申请日：2010-05-07
申请人： PANASONIC CORPORATION , LIANG, Paul Cheng-Po , TAKINAMI, Koji
发明人： LIANG, Paul Cheng-Po , TAKINAMI, Koji
IPC分类号： H03L7/099
CPC分类号： H03L7/0995 , H03L7/1806 , H03L7/183 , H03L2207/50
摘要： A phase lock loop utilizes a multiphase oscillator having a plurality of digital inputs. A plurality of DQ flip-flops, offset in time from each other generate a plurality of control signals to remove control phase information from the oscillator in digital form. A DQ flip-flop connected between any two digital inputs on the oscillator determines direction of the traveling wave. The direction and phase information address a look-up table to determine the current fractional phase of the oscillator. A divide by N circuit is used to reduce the oscillator frequency. A total phase indicator signal for the oscillator is determined using the current fractional phase. The total phase is compared to a reference phase to produce a control signal for making adjustments to the oscillator. In a feed-forward path, frequency dividers divide a high frequency signal to a lower desired frequency, thereby increasing phase resolution.
摘要翻译：锁相环利用具有多个数字输入的多相振荡器。在时间上偏移的多个DQ触发器产生多个控制信号，以数字形式从振荡器中去除控制相位信息。连接在振荡器上的任何两个数字输入之间的DQ触发器决定行波的方向。方向和相位信息寻址查找表以确定振荡器的当前分数相位。使用N电路的除法来减少振荡器频率。使用当前的分数阶段确定振荡器的总相位指示信号。将总相位与参考相位进行比较，以产生用于调整振荡器的控制信号。在前馈路径中，分频器将高频信号分成较低的期望频率，从而增加相位分辨率。

4. 发明申请

WO2008099588A1 REAL TIME VCO GAIN NON LINEARITY CALIBRATION 审中-公开
标题翻译：实时VCO增益非线性校准
公开(公告)号：WO2008099588A1
公开(公告)日：2008-08-21
申请号：PCT/JP2008/000177
申请日：2008-02-07
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. , LIANG, Paul, Cheng-Po
发明人： LIANG, Paul, Cheng-Po
IPC分类号： H03C3/09 , H03L7/16
CPC分类号： H03C3/0966 , H03C3/0991 , H03L7/08 , H03L2207/06
摘要： A method of determining a gain nonlinearity receives a phase difference signal and generates an output frequency based on the received phase difference signal. The method reconstructs a waveform by using the output frequency. The method preprocesses the phase difference signal to generate a comparison waveform. The method compares the reconstructed waveform to the comparison waveform and determines a gain nonlinearity based on the comparison between the reconstructed and comparison waveforms. A modulation system includes a voltage controlled oscillator for receiving a phase difference signal and generating an output frequency. The system further includes a waveform reconstructor and a comparator. The waveform reconstructor is coupled to the voltage controlled oscillator, and is for reconstructing a waveform based on the output frequency. The comparator is coupled to the waveform reconstructor, and is for comparing the output of the waveform reconstructor with the phase difference signal. The comparator is configured for determining a gain nonlinearity exhibited by the voltage controlled oscillator. Particular embodiments further include a compensator.
摘要翻译：确定增益非线性的方法接收相位差信号，并根据接收到的相位差信号产生输出频率。该方法通过使用输出频率重建波形。该方法预处理相位差信号以产生比较波形。该方法将重建波形与比较波形进行比较，并基于重构和比较波形之间的比较确定增益非线性。调制系统包括用于接收相位差信号并产生输出频率的压控振荡器。该系统还包括波形重构器和比较器。波形重建器耦合到压控振荡器，并用于基于输出频率重建波形。比较器耦合到波形重构器，并且用于将波形重构器的输出与相位差信号进行比较。比较器被配置用于确定由压控振荡器显示的增益非线性。具体实施例还包括补偿器。

5. 发明申请

WO2011091028A1 HIGH-EFFICIENCY ALL-DIGITAL TRANSMITTER 审中-公开
标题翻译：高效全数字发射器
公开(公告)号：WO2011091028A1
公开(公告)日：2011-07-28
申请号：PCT/US2011/021702
申请日：2011-01-19
申请人： PANASONIC CORPORATION , WANG, Hua , MATSUURA, Toru , MERCEY, Gregoire Le Grand de , LIANG, Paul Cheng-Po , TAKINAMI, Koji , BOOTH, Richard W.D.
发明人： WANG, Hua , MATSUURA, Toru , MERCEY, Gregoire Le Grand de , LIANG, Paul Cheng-Po , TAKINAMI, Koji , BOOTH, Richard W.D.
IPC分类号： H04L25/03
CPC分类号： H04L27/36 , H03D7/165
摘要： A low cost high-efficiency all-digital transmitter using all-digital power amplifiers ("DPA") and various mapping techniques to generate an output signal, which substantially reproduces a baseband signal at a carrier frequency. A baseband signal generator generates a baseband signal which is quantized by a signal processor using a quantization map. A DPA control mapper outputs control signals to phase selectors using the quantized signal and a quantization table. Each phase selector receives one of the control signals and outputs a waveform at a carrier frequency with a phase corresponding to the control signals, or an inactive signal. Each DPA in a DPA array has an assigned weight, receives one of the waveforms from the phase selectors, and outputs a power signal according to the weight of the DPA and the phase of the received waveform. The combined power signal substantially reproduces the baseband signal at the carrier frequency.
摘要翻译：使用全数字功率放大器（“DPA”）和各种映射技术的低成本高效全数字发射机，以产生输出信号，其基本上以载波频率再现基带信号。基带信号发生器生成使用量化映射由信号处理器量化的基带信号。 DPA控制映射器使用量化信号和量化表将控制信号输出到相位选择器。每个相位选择器接收一个控制信号，并以对应于控制信号的相位或无效信号输出载波频率的波形。 DPA阵列中的每个DPA具有分配的权重，从相位选择器接收波形之一，并根据DPA的权重和接收波形的相位输出功率信号。组合功率信号基本上以载波频率再现基带信号。

6. 发明申请

WO2010011606A1 SIGNAL DECOMPOSITION METHODS AND APPARATUS FOR MULTI-MODE TRANSMITTERS 审中-公开
标题翻译：信号分解方法和多模式发射机的设备
公开(公告)号：WO2010011606A1
公开(公告)日：2010-01-28
申请号：PCT/US2009/051167
申请日：2009-07-20
申请人： PANASONIC CORPORATION , LIANG, Paul, Cheng-Po , TAKINAMI, Koji
发明人： LIANG, Paul, Cheng-Po , TAKINAMI, Koji
IPC分类号： H04L27/04
CPC分类号： H04B1/66
摘要： A multi-mode communications transmitter includes a signal decomposer that converts rectangular-coordinate in-channel and quadrature channel signals into polar-coordinate amplitude and angle component signals and forms first and second modulation signals. The signal decomposition process performed by the signal decomposer combines envelope-reduction and restoration (ERR) with filtering to reduce the bandwidths of the first and second modulation signals compared to the bandwidths of the unmodified amplitude and angle component signals. Reduction in signal bandwidths eases the design requirements of the electrical components needed to process and generate the signals applied to the power supply and radio frequency (RF) input ports of the multi-mode communications transmitter's power amplifier (PA). It makes the multi-mode communications transmitter more forgiving to gain and delay mismatches between the signals applied to the power supply and RF input ports of the PA, compared to conventional polar modulation transmitters.
摘要翻译：多模式通信发射机包括将矩形坐标信道和正交信道信号转换为极坐标振幅和角分量信号并形成第一和第二调制信号的信号分解器。由信号分解器进行的信号分解处理将包络减少和恢复（ERR）与滤波相结合，以与未修改的幅度和角度分量信号的带宽相比降低第一和第二调制信号的带宽。降低信号带宽可以减轻处理和产生施加到多模式通信发射机功率放大器（PA）的电源和射频（RF）输入端口的信号所需的电气部件的设计要求。与传统的极性调制发射机相比，它使得多模式通信发射机更宽容地获得并延迟施加到PA的电源和RF输入端口的信号之间的不匹配。

7. 发明申请

WO2012142873A1 RF TRANSMITTER, INTEGRATED CIRCUIT DEVICE, WIRELESS COMMUNICATION UNIT AND METHOD THEREFOR 审中-公开
标题翻译： RF发射机，集成电路设备，无线通信单元及其方法
公开(公告)号：WO2012142873A1
公开(公告)日：2012-10-26
申请号：PCT/CN2012/071661
申请日：2012-02-27
申请人： MEDIATEK SINGAPORE PTE. LTD. , WANG, Hua , LU, Chao , LIU, Julia , PENG, Chun-Hsien , SON, Sang Won , LIANG, Paul Cheng Po
发明人： WANG, Hua , LU, Chao , LIU, Julia , PENG, Chun-Hsien , SON, Sang Won , LIANG, Paul Cheng Po
IPC分类号： H04L25/49
CPC分类号： H04B1/0475 , H03F1/3241 , H04B1/0483 , H04B2001/0425 , H04L27/368
摘要： A radio frequency (RF) transmitter has at least one digital signal processing module and at least one power amplifier module. The digital signal processing module includes at least one digital pre-distortion component arranged to receive at least one complex input signal, perform two-dimensional non-uniform mapping of the complex input signal to a first, in- phase, digital pre-distortion control word and a further, quadrature, digital pre-distortion control word, and output the in-phase and quadrature pre-distortion digital control words. The power amplifier module includes a first, in-phase, array of switch-mode power cells and at least one further, quadrature, array of switch-mode power cells. The two-dimensional non- uniform mapping has a pre-distortion profile at least partly based on an input/output relationship for the power amplifier module arranged to generate an analogue RF signal based at least partly on the in-phase and quadrature digital pre-distortion control words.
摘要翻译：射频（RF）发射机具有至少一个数字信号处理模块和至少一个功率放大器模块。数字信号处理模块包括至少一个数字预失真分量，被布置为接收至少一个复合输入信号，执行复数输入信号到第一，同相数字预失真控制的二维非均匀映射字和另一个正交数字预失真控制字，并输出同相和正交预失真数字控制字。功率放大器模块包括开关模式功率单元的第一同相阵列和至少一个另外的正交阵列的开关模式功率单元。至少部分地基于用于功率放大器模块的输入/输出关系的二维非均匀映射具有预失真分布，该功率放大器模块被布置成至少部分地基于同相和正交数字预处理产生模拟RF信号，失真控制字。

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