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1. 发明申请

WO2006025609A3 THIN FILM TRANSISTOR AND ITS MANUFACTURING METHOD 审中-公开
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：WO2006025609A3
公开(公告)日：2006-04-27
申请号：PCT/JP2005016566
申请日：2005-09-02
申请人： CASIO COMPUTER CO LTD , ISHII HIROMITSU , HOKARI HITOSHI , YOSHIDA MOTOHIKO , YAMAGUCHI IKUHIRO
发明人： ISHII HIROMITSU , HOKARI HITOSHI , YOSHIDA MOTOHIKO , YAMAGUCHI IKUHIRO
IPC分类号： H01L29/45 , H01L21/336 , H01L29/417 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/45 , H01L29/66969 , H01L29/78618
摘要： A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).
摘要翻译：本发明的薄膜晶体管包括半导体薄膜（8）; 形成在半导体薄膜（8）的一个表面上的栅极绝缘膜（7）; 通过栅极绝缘膜形成为与半导体薄膜（8）相对的栅电极（6）; 电连接到半导体薄膜（8）的源电极（15）和漏电极（16）。源区; 漏区; 和通道区域。薄膜晶体管还包括形成在至少对应于半导体薄膜（8）的源极区域和漏极区域的周边部分上的绝缘膜（9），并且具有接触孔（10,11）源极区域和漏极区域中的至少一部分被暴露，其中源电极（15）和漏电极（16）通过接触孔（10,11）连接到半导体薄膜（8）。

2. 发明申请

WO2007089048A3 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：WO2007089048A3
公开(公告)日：2007-11-22
申请号：PCT/JP2007052310
申请日：2007-02-02
申请人： KOCHI IND PROMOTION CT , CASIO COMPUTER CO LTD , FURUTA MAMORU , HIRAO TAKASHI , FURUTA HIROSHI , MATSUDA TOKIYOSHI , HIRAMATSU TAKAHIRO , ISHII HIROMITSU , HOKARI HITOSHI , YOSHIDA MOTOHIKO
发明人： FURUTA MAMORU , HIRAO TAKASHI , FURUTA HIROSHI , MATSUDA TOKIYOSHI , HIRAMATSU TAKAHIRO , ISHII HIROMITSU , HOKARI HITOSHI , YOSHIDA MOTOHIKO
IPC分类号： H01L29/786 , H01L29/417
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/42384 , H01L29/66969 , H01L29/78606 , H01L29/78618
摘要： A thin film transistor includes a substrate (1, 11) , and a pair of source/drain electrodes (2, 14) (i.e. , a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films (10, 20) are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer (3, 15) is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.
摘要翻译：薄膜晶体管包括基板（1,11），以及形成在基板上并在其之间形成间隙的一对源极/漏极（2,14）（即源电极和漏电极）。提供一对低电阻导电薄膜（10,20），使得每个涂覆源极/漏极之一的至少一部分。低电阻导电薄膜在它们之间限定了间隙。在一对低电阻导电薄膜的上表面上连续地形成氧化物半导体薄膜层（3,15），并沿着限定在低电阻导电薄膜之间的间隙延伸，以作为通道。氧化物半导体薄膜层的侧表面和低电阻导电薄膜的相应侧表面在沟道的沟道宽度方向上彼此重合。

3. 发明申请

WO2007089048A2 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：WO2007089048A2
公开(公告)日：2007-08-09
申请号：PCT/JP2007/052310
申请日：2007-02-02
申请人： KOCHI INDUSTRIAL PROMOTION CENTER , CASIO COMPUTER CO., LTD. , FURUTA, Mamoru , HIRAO, Takashi , FURUTA, Hiroshi , MATSUDA, Tokiyoshi , HIRAMATSU, Takahiro , ISHII, Hiromitsu , HOKARI, Hitoshi , YOSHIDA, Motohiko
发明人： FURUTA, Mamoru , HIRAO, Takashi , FURUTA, Hiroshi , MATSUDA, Tokiyoshi , HIRAMATSU, Takahiro , ISHII, Hiromitsu , HOKARI, Hitoshi , YOSHIDA, Motohiko
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/42384 , H01L29/66969 , H01L29/78606 , H01L29/78618
摘要： A thin film transistor includes a substrate (1, 11), and a pair of source/drain electrodes (2, 14) (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films (10, 20) are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer (3, 15) is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.
摘要翻译：薄膜晶体管包括基板（1,11），以及形成在基板上并在其之间形成间隙的一对源极/漏极（2,14）（即源电极和漏电极）。提供一对低电阻导电薄膜（10,20），使得每个涂覆源极/漏极之一的至少一部分。低电阻导电薄膜在它们之间限定了间隙。在一对低电阻导电薄膜的上表面上连续地形成氧化物半导体薄膜层（3,15），并沿着限定在低电阻导电薄膜之间的间隙延伸，以作为通道。氧化物半导体薄膜层的侧表面和低电阻导电薄膜的相应侧表面在沟道的沟道宽度方向上彼此重合。

4. 发明申请

WO2006025609A2 THIN FILM TRANSISTOR AND ITS MANUFACTURING METHOD 审中-公开
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：WO2006025609A2
公开(公告)日：2006-03-09
申请号：PCT/JP2005/016566
申请日：2005-09-02
申请人： CASIO COMPUTER CO., LTD. , ISHII, Hiromitsu , HOKARI, Hitoshi , YOSHIDA, Motohiko , YAMAGUCHI, Ikuhiro
发明人： ISHII, Hiromitsu , HOKARI, Hitoshi , YOSHIDA, Motohiko , YAMAGUCHI, Ikuhiro
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/45 , H01L29/66969 , H01L29/78618
摘要： A thin film transistor of the present invention includes a semiconductor thin film (8); a gate insulating film (7) formed on one surface of the semiconductor thin film (8); a gate electrode (6) formed to be opposite to the semiconductor thin film (8) through the gate insulating film (7); a source electrode (15) and a drain electrode (16) electrically connected to the semiconductor thin film (8); a source region; a drain region; and a channel region. The thin film transistor further includes an insulating film (9) formed on a peripheral portion corresponding to at least the source region and the drain region of the semiconductor thin film (8), and having a contact hole (10, 11) through which at least a part of each of the source region and the drain region is exposed wherein the source electrode (15) and the drain electrode (16) are connected to the semiconductor thin film (8) through the contact hole (10, 11).
摘要翻译：本发明的薄膜晶体管包括半导体薄膜（8）;以及半导体薄膜（8）。在半导体薄膜（8）的一个表面上形成的栅绝缘膜（7）; 通过栅绝缘膜（7）形成为与半导体薄膜（8）相对的栅电极（6）; 与半导体薄膜（8）电连接的源电极（15）和漏电极（16）; 源区域; 一个漏极区域; 和一个频道区域。该薄膜晶体管还包括形成在与半导体薄膜（8）的至少源极区域和漏极区域相对应的周边部分上的绝缘膜（9），并具有接触孔（10,11），通过该接触孔源极区域和漏极区域的每一个的至少一部分被暴露，其中源电极（15）和漏电极（16）通过接触孔（10,11）连接到半导体薄膜（8）。 / p>

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