专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2017222559A1 DIGITAL VOLUME CONTROL 审中-公开
标题翻译：数字音量控制
公开(公告)号：WO2017222559A1
公开(公告)日：2017-12-28
申请号：PCT/US2016/039296
申请日：2016-06-24
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , PETERSON, Cory, Jay , HESTER, Dylan, Alexander
发明人： PETERSON, Cory, Jay , HESTER, Dylan, Alexander
IPC分类号： H03M1/66
CPC分类号： H03M1/661
摘要： A digital volume control may be implemented in a digital-to-analog controller (DAC) when an output rate of the DAC is higher than the input rate. The upsampling conversion process from the digital input to analog output may be controlled to adjust a volume of an output signal produced from the digital signals. The frames produced by the upsampling conversion process may include a fraction of scheduling blocks filled with the input data bit, where the fraction is based on a desired volume. The generated frames are provided to a finite impulse response (FIR) filter that produces an analog signal with a magnitude proportional to the determined fraction of scheduling blocks.
摘要翻译：当DAC的输出速率高于输入速率时，可以在数字 - 模拟控制器（DAC）中实现数字音量控制。可以控制从数字输入到模拟输出的上采样转换过程，以调整从数字信号产生的输出信号的音量。由上采样转换过程产生的帧可以包括用输入数据比特填充的一部分调度块，其中该部分基于期望的音量。产生的帧被提供给有限脉冲响应（FIR）滤波器，该滤波器产生具有与所确定的调度块比例成比例的量值的模拟信号。

2. 发明申请

WO2009143235A2 CONTROLLING PASSTHROUGH OF COMMUNICATIONS BETWEEN MULTIPLE BUSES 审中-公开
标题翻译：控制多个通讯之间的通信
公开(公告)号：WO2009143235A2
公开(公告)日：2009-11-26
申请号：PCT/US2009044661
申请日：2009-05-20
申请人： SILICON LAB INC , HABAN SCOTT , HESTER DYLAN , SUN RUIFENG
发明人： HABAN SCOTT , HESTER DYLAN , SUN RUIFENG
IPC分类号： H04B1/40 , H04B1/16
CPC分类号： G06F13/4282
摘要： A demodulator can include first data and clock pads to couple the demodulator to a host device via a first bus, and second data and clock pads to couple the demodulator to a radio frequency (RF) tuner via a second bus. The device may further include passthrough logic to couple host data and a host clock from the first bus to the second bus and to couple tuner data from the second bus to the first bus during a passthrough mode. During this mode, however, the two buses may remain electrically decoupled. When the passthrough mode is disabled, the RF tuner is thus shielded from noise present on the first bus.
摘要翻译：解调器可以包括经由第一总线将解调器耦合到主机设备的第一数据和时钟焊盘，以及经由第二总线将解调器耦合到射频（RF）调谐器的第二数据和时钟焊盘。该设备还可以包括用于将主机数据和主机时钟从第一总线耦合到第二总线的通过逻辑，并且在直通模式期间将调谐器数据从第二总线耦合到第一总线。然而，在这种模式下，两条总线可能保持电气分离。当禁用直通模式时，RF调谐器被屏蔽，避免了第一个总线上存在的噪声。

3. 发明申请

WO2006039543A1 CONTROLLING THE FREQUENCY OF AN OSCILLATOR 审中-公开
标题翻译：控制振荡器的频率
公开(公告)号：WO2006039543A1
公开(公告)日：2006-04-13
申请号：PCT/US2005/035276
申请日：2005-09-30
申请人： SILICON LABORATORIES INC. , MALIGEORGOS, James P. , HESTER, Dylan A. , MARQUES, Augusto M. , TUTTLE, G. Tyson
发明人： MALIGEORGOS, James P. , HESTER, Dylan A. , MARQUES, Augusto M. , TUTTLE, G. Tyson
IPC分类号： H03L7/00
CPC分类号： H03L7/00
摘要： An apparatus includes switches (126), a bank of capacitors (122) and an oscillator core (120). The oscillator core (120) is selectively coupled to the bank of capacitors (122) by the switches (126), and the oscillator core (120) provides a signal that has a frequency that is dependent on the selective coupling between the bank of capacitors (122) and the oscillator core (120). The apparatus also includes a circuit (300) that is adapted to change the coupling between the bank of capacitors (122) and the oscillator core (120) to change the frequency and impose a rate limit at which the frequency changes to avoid a significant glitch in the signal.
摘要翻译：一种装置包括开关（126），一组电容器（122）和振荡器芯（120）。振荡器芯（120）通过开关（126）选择性地耦合到电容器组（122），并且振荡器芯（120）提供具有取决于电容器组之间的选择耦合的频率的信号（122）和振荡器芯（120）。该装置还包括适于改变电容器组（122）和振荡器芯（120）之间的耦合的电路（300），以改变频率并施加频率变化的速率限制，以避免重大的毛刺在信号中。

4. 发明申请

WO2018140206A1 SINGLE-BIT VOLUME CONTROL 审中-公开
公开(公告)号：WO2018140206A1
公开(公告)日：2018-08-02
申请号：PCT/US2018/012401
申请日：2018-01-04
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , DUEWER, Bruce , KAMKAR, Shafagh , HESTER, Dylan
发明人： DUEWER, Bruce , KAMKAR, Shafagh , HESTER, Dylan
IPC分类号： H03M5/12 , H03M5/14 , H03M7/50 , H03M5/08 , H03M1/68
摘要： Audio content in a single-bit audio stream can be reproduced at a transducer by mapping the single-bit audio stream to symbols in a multi-bit audio stream. Volume control may be implemented, in part, in the digital domain and, in part, in the analog domain. In the digital domain, when converting the single-bit audio stream to a plurality of symbols, the plurality of symbols is selected based, at least in part, on audio content of the single-bit audio stream and a desired volume level. In the analog domain, when converting an analog current signal output from a current- steering DAC processing the plurality of symbols to an analog voltage signal, an analog gain value may be selected based, at least in part, on the desired volume level.

5. 发明申请

WO2018140205A1 DIRECT MAPPING OF SINGLE-BIT AUDIO STREAMS 审中-公开
公开(公告)号：WO2018140205A1
公开(公告)日：2018-08-02
申请号：PCT/US2018/012392
申请日：2018-01-04
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , KAMKAR, Shafagh , DUEWER, Bruce , HESTER, Dylan
发明人： KAMKAR, Shafagh , DUEWER, Bruce , HESTER, Dylan
IPC分类号： H03M5/12 , H03M5/14 , H03M7/50 , H03M5/08
摘要： A single-bit audio stream can be converted to a modified single-bit audio stream with a constant edge rate while maintaining a modulation index of the original audio stream using direct mapping. With direct mapping, a pre-filter bank may be combined with a multi-bit symbol mapper to select symbols for the modified audio stream with a constant edge rate per symbol and the same modulation index as the original audio stream. The output of the pre-filter bank may be an audio stream with no consecutive full-scale symbols. Using the output of the pre-filter bank, a multi-bit symbol mapper may use the symbol selector to output a symbol with a constant edge rate per symbol and the same modulation index as the original signal. The symbols may be converted to an analog signal for reproduction of audio content using a transducer.

6. 发明申请

WO2018140203A1 AUTO-MUTE AUDIO PROCESSING 审中-公开
公开(公告)号：WO2018140203A1
公开(公告)日：2018-08-02
申请号：PCT/US2018/012384
申请日：2018-01-04
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , KAMKAR, Shafagh , DUEWER, Bruce , HESTER, Dylan
发明人： KAMKAR, Shafagh , DUEWER, Bruce , HESTER, Dylan
IPC分类号： H03G3/00 , G11B20/10 , G11B27/10 , H03G3/34
摘要： An audio processing circuit may have a first path for processing multi-bit audio signals in parallel with a second path for processing single-bit audio signals. The parallel paths may share a common input node for receiving audio data and a common output node for reproducing audio at a transducer. Each path may have a volume control for adjusting an output of the path. The audio processing circuit may determine a type of an audio signal received at the input. The path not corresponding to the detected type of the audio signal is muted, and the path corresponding to the detected type of audio signal is unmuted.

7. 发明申请

WO2018107084A1 DATA ENCODING DETECTION 审中-公开
公开(公告)号：WO2018107084A1
公开(公告)日：2018-06-14
申请号：PCT/US2017/065402
申请日：2017-12-08
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , DUEWER, Bruce , HESTER, Dylan , KAMKAR, Shafagh
发明人： DUEWER, Bruce , HESTER, Dylan , KAMKAR, Shafagh
IPC分类号： G10L19/22
摘要： A data encoding may be determined by examining the data itself. By examining the data, such as by identifying characteristics of the data, the data encoding may be identified and the substantive information extracted from the data by decoding the data according to the identified data encoding. The data encoding may be identified without extra control or header information separate from the encoded data itself. The identification of data encoding may be determined by a plurality of detectors examining different characteristics of the data and determining an encoding of the data based on each of those individual characteristics. The output of the detectors may be collected and used to decide the encoding of the data. One example application involves determining if audio data is DSD- or PCM-encoded audio data by examining only the data itself.

8. 发明申请

WO2006039543A9 CONTROLLING THE FREQUENCY OF AN OSCILLATOR 审中-公开
标题翻译：控制振荡器的频率
公开(公告)号：WO2006039543A9
公开(公告)日：2007-04-19
申请号：PCT/US2005035276
申请日：2005-09-30
申请人： SILICON LAB INC , MALIGEORGOS JAMES P , HESTER DYLAN A , MARQUES AUGUSTO M , TUTTLE G TYSON
发明人： MALIGEORGOS JAMES P , HESTER DYLAN A , MARQUES AUGUSTO M , TUTTLE G TYSON
IPC分类号： H03L7/00
CPC分类号： H03L7/00
摘要： An apparatus includes switches (126), a bank of capacitors (122) and an oscillator core (120). The oscillator core (120) is selectively coupled to the bank of capacitors (122) by the switches (126), and the oscillator core (120) provides a signal that has a frequency that is dependent on the selective coupling between the bank of capacitors (122) and the oscillator core (120). The apparatus also includes a circuit (300) that is adapted to change the coupling between the bank of capacitors (122) and the oscillator core (120) to change the frequency and impose a rate limit at which the frequency changes to avoid a significant glitch in the signal.
摘要翻译：一种装置包括开关（126），一组电容器（122）和振荡器芯（120）。振荡器芯（120）通过开关（126）选择性地耦合到电容器组（122），并且振荡器芯（120）提供具有取决于电容器组之间的选择耦合的频率的信号（122）和振荡器芯（120）。该装置还包括适于改变电容器组（122）和振荡器芯（120）之间的耦合的电路（300），以改变频率并施加频率变化的速率限制，以避免重大的毛刺在信号中。

9. 发明申请

WO2017180172A1 MAGNITUDE COMPENSATION TECHNIQUE FOR PROCESSING SINGLE-BIT WIDE DATA 审中-公开
标题翻译：单位宽数据处理的幅度补偿技术
公开(公告)号：WO2017180172A1
公开(公告)日：2017-10-19
申请号：PCT/US2016/038545
申请日：2016-06-21
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , HESTER, Dylan, Alexander
发明人： HESTER, Dylan, Alexander
IPC分类号： H03H17/02 , H03H17/06 , H03M1/66
CPC分类号： H03M1/0626 , H03H17/0219 , H03M1/66
摘要： Droop caused by a filter may be compensated by applying a pre-filter to the audio signal that cancels out, at least in part, the droop caused by the filter. The pre-filter may implement magnitude compensation that causes an approximately flat passband response when the pre-filtered signal is passed through the filter. The pre-filter may be applied to one-bit wide data streams, such as high-fidelity direct stream digital (DSD) audio data or other one-bit wide data such as pulse-density modulation (PDM) encoded data. The pre-filtering and filtering may be implemented in components of an audio processor, such as in a digital-to-analog converter (DAC). The pre-filtering may include upsampling the one-bit wide data to form symbols and substituting an eighth bit of the symbol with an inverted version of an earlier-received bit.
摘要翻译：由滤波器引起的下垂可以通过对音频信号应用预滤波器来补偿，所述预滤波器至少部分抵消由滤波器引起的下垂。预滤波器可以实施幅度补偿，当预滤波信号通过滤波器时，该幅度补偿导致近似平坦的通带响应。预滤波器可以应用于诸如高保真直接流数字（DSD）音频数据的一位宽数据流或诸如脉冲密度调制（PDM）编码数据的其他一位宽数据。预滤波和滤波可以在音频处理器的组件中实现，例如在数模转换器（DAC）中。预滤波可以包括对一位宽数据进行上采样以形成符号，并用先前接收的比特的反转版本替换符号的第八位。

10. 发明申请

WO2017180171A1 OVER-SAMPLING DIGITAL PROCESSING PATH THAT EMULATES NYQUIST RATE (NON-OVERSAMPLING) AUDIO CONVERSION 审中-公开
标题翻译：超采样数字处理路径，实现NYQUIST速率（非超采样）音频转换
公开(公告)号：WO2017180171A1
公开(公告)日：2017-10-19
申请号：PCT/US2016/038539
申请日：2016-06-21
申请人： CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. , HESTER, Dylan, Alexander , RAO, Bala Vishnu, Shankar
发明人： HESTER, Dylan, Alexander , RAO, Bala Vishnu, Shankar
IPC分类号： H03H17/06
CPC分类号： H04R1/22 , H03H17/0657 , H04R2430/03
摘要： The behavior of a NOS DAC and an analog filter may be emulated by electronic components of an integrated circuit (IC) by upsampling data and applying a digital filter to the upsampled data. For example, the IC may include a zero-order-hold circuit that upsamples data from a first input sample rate to a second, higher input rate. The upsampled data may be passed to an Asynchronous Sample Rate Converter (ASRC) that performs further upsampling (e.g., from 8*Fs - 64*Fs). The upsampled data may be passed to a digital low pass filter. The digital low pass filter may emulate, for example, a response of a fifth order Butterworth analog filter to mimic the effect of analog processing. The IC may integrate the upsampling circuit, the low pass digital filter, a digital-to-analog converter (DAC) and an amplifier to provide an audio solution for playing high-fidelity music in a mobile device.
摘要翻译： NOS DAC和模拟滤波器的行为可以由集成电路（IC）的电子组件通过上采样数据和将数字滤波器应用于上采样数据来模拟。例如，IC可以包括将数据从第一输入采样率上采样到第二较高输入率的零阶保持电路。上采样的数据可以被传递给执行进一步上采样（例如，从8 * Fs-64 * Fs）的异步采样速率转换器（ASRC）。上采样数据可以被传递到数字低通滤波器。数字低通滤波器可以模拟例如五阶巴特沃斯模拟滤波器的模拟模拟处理效果的响应。该IC可以集成上采样电路，低通数字滤波器，数模转换器（DAC）和放大器，为在移动设备中播放高保真音乐提供音频解决方案。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式