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71. 发明申请

WO2013138122A2 AUTOMATIC REALTIME SPEECH IMPAIRMENT CORRECTION 审中-公开
标题翻译：自动实时语音补偿校正
公开(公告)号：WO2013138122A2
公开(公告)日：2013-09-19
申请号：PCT/US2013/029242
申请日：2013-03-06
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： MALKIN, Peter K. , TREWIN, Sharon M.
IPC分类号： G10L21/02
CPC分类号： G10L21/057 , G10L21/00 , G10L25/48 , G10L2021/0575
摘要： Automatic correcting of user's speech impairment in speech may include obtaining the audio signal of a given user's speech, and analyzing the obtained audio signal to identify artifacts caused by the user's impairment. The obtained audio signal may be modified by eliminating the identified artifacts from it. The modified audio signal may be provided, e.g., to be played or broadcast or transmitted.
摘要翻译：语音中的用户语音障碍的自动校正可以包括获得给定用户的语音的音频信号，并且分析所获得的音频信号以识别由用户的损伤引起的人为因素。所获得的音频信号可以通过从其中消除所识别的伪影来修改。经修改的音频信号可以被提供，例如被播放或广播或发送。

72. 发明申请

WO2013138096A1 PREFERENTIAL EXECUTION OF METHOD CALLS IN HYBRID SYSTEMS 审中-公开
标题翻译：混合系统中方法调用的优先执行
公开(公告)号：WO2013138096A1
公开(公告)日：2013-09-19
申请号：PCT/US2013/028795
申请日：2013-03-04
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： DAWSON, Michael, H. , DUBE, Parijat , FONG, Liana L. , GAO, Yuqing , GUERIN, Xavier, R. , HACK, Michel H., T. , ITO, Megumi , JOHNSON, Graeme , LING, Nai, K. , LIU, Yanbin , MENG, Xiaoqiao , NAGARAJA, Pramod, B. , SEELAM, Seetharami, R. , TAN, Wei , ZHANG, Li
IPC分类号： G06F9/46
CPC分类号： G06F9/5027 , G06F9/548 , G06F2209/501 , G06F2209/509 , G06F2209/542 , G06F2209/549 , Y02D10/22
摘要： Affinity-based preferential call technique, in one aspect, may improve performance of distributed applications in a hybrid system having heterogeneous platforms. A segment of code in a program being executed on a processor may be intercepted or trapped in runtime. A platform is selected in the hybrid system for executing said segment of code, the platform determined to run the segment of code with best efficiency among a plurality of platforms in the hybrid system. The segment of code is dynamically executed on the selected platform determined to run the segment of code with best efficiency.
摘要翻译：基于亲和度的优惠呼叫技术在一个方面可以提高具有异构平台的混合系统中的分布式应用的性能。在处理器上执行的程序中的一段代码可能在运行时被拦截或被捕获。在混合系统中选择用于执行所述代码段的平台，所述平台被确定为以混合系统中的多个平台中的最佳效率运行代码段。在所选择的平台上动态地执行代码段，以确保以最佳效率运行代码段。

73. 发明申请

WO2013119416A1 A SYSTEM TO VIEW AND MANIPULATE ARTIFACTS AT A TEMPORAL REFERENCE POINT 审中-公开
标题翻译：用于在时间参考点上查看和处理艺术品的系统
公开(公告)号：WO2013119416A1
公开(公告)日：2013-08-15
申请号：PCT/US2013/023578
申请日：2013-01-29
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： DIAMENT, Judah, M. , MARTINO, Jacquelyn, A. , THOMAS, JR., John, C.
IPC分类号： G06F17/30
CPC分类号： G06Q10/101
摘要： A system to view and manipulate artifacts at a temporal reference point, in one aspect, may include one or more artifact drafts associated with each of a plurality of artifacts, each of said one or more artifact drafts representing a state of the associated artifact at a point in time and one or more commands in a command stack that transformed said each artifact draft's parent into said each artifact draft. A plurality of traceability links and traceability vertices represent connections between said one or more artifact drafts of the plurality of artifacts, wherein a traceability link includes an edge between an artifact draft of an artifact in the plurality of artifacts and an artifact draft of another artifact in the plurality of artifacts, said artifact draft of an artifact in the plurality of artifacts and the artifact draft o another artifact in the plurality of artifacts forming the traceability vertices.
摘要翻译：在一个方面，在时间参考点上查看和操纵工件的系统可以包括与多个工件中的每一个相关联的一个或多个工件草图，所述一个或多个工件草图中的每一个表示相关工件的状态时间点和命令栈中的一个或多个命令，将每个工件草图的父项转换为所述每个工件草案。多个可追溯性链接和可追溯性顶点表示多个工件之间的所述一个或多个工件草图之间的连接，其中可追溯性链接包括多个工件中的工件的工件草图与另一个工件的工件草图之间的边缘所述多个工件，所述多个工件中的工件的所述工件草图和所述多个工件中的所述工件草图o所述多个工件中的另一个工件形成所述可追溯性顶点。

74. 发明申请

WO2013115938A1 SOLAR CONCENTRATOR COOLING BY VORTEX GAS CIRCULATION 审中-公开
标题翻译：太阳能集热器通过VORTEX气体循环冷却
公开(公告)号：WO2013115938A1
公开(公告)日：2013-08-08
申请号：PCT/US2013/020449
申请日：2013-01-07
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
发明人： MARTIN, Yves C. , SANDSTROM, Robert L. , VAN KESSEL, Theodore G. , KHONKAR, Hussam
IPC分类号： F24J2/08
CPC分类号： H01L31/052 , H01L31/0521 , H01L31/054 , H01L31/0543 , Y02E10/52
摘要： A convective method is employed to cool a solar concentrator device. The convective method employs formation of a vortex gas circulation inside an enclosure of the solar concentrator device, which is bounded by at least one light-path altering component, sidewalls, and a back panel. Optionally, a heat sink assembly can be provided within the enclosure. Internal convention through the vortex gas circulation transfers the heat generated at a photovoltaic cell to all surfaces of the solar concentrator device to facilitate radiative and/or convective cooling at the outside surfaces of the enclosure.
摘要翻译：采用对流方法来冷却太阳能集中器装置。对流方法采用在太阳能集中器装置的外壳内形成涡流气体循环，太阳能集中器装置由至少一个光路改变部件，侧壁和后面板限定。可选地，可以在外壳内提供散热器组件。通过涡流气体循环的内部惯例将在光伏电池处产生的热量转移到太阳能集中器装置的所有表面，以便于在外壳的外表面处的辐射和/或对流冷却。

75. 发明申请

WO2013074169A1 GERMANIUM OXIDE FREE ATOMIC LAYER DEPOSITION OF SILICON OXIDE AND HIGH-K GATE DIELECTRIC ON GERMANIUM CONTAINING CHANNEL FOR CMOS DEVICES 审中-公开
标题翻译：氧化锗无机原子层沉积硅氧化物和高K栅介质用于CMOS器件的包含通道的锗
公开(公告)号：WO2013074169A1
公开(公告)日：2013-05-23
申请号：PCT/US2012/052590
申请日：2012-08-28
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , BRODSKY, MaryJane , CHOWDHURY, Murshed M. , CHUDZIK, Michael P. , DAI, Min , KRISHNAN, Siddarth A. , NARASIMHA, Shreesh , SIDDIQUI, Shahab
发明人： BRODSKY, MaryJane , CHOWDHURY, Murshed M. , CHUDZIK, Michael P. , DAI, Min , KRISHNAN, Siddarth A. , NARASIMHA, Shreesh , SIDDIQUI, Shahab
IPC分类号： H01L21/336
CPC分类号： H01L29/518 , H01L21/28255 , H01L27/0922 , H01L29/51 , H01L29/513 , H01L29/66575 , H01L29/78
摘要： A semiconductor device including a germanium containing substrate including a gate structure on a channel region of the semiconductor substrate. The gate structure may include a silicon oxide layer that is in direct contact with an upper surface of the germanium containing substrate, at least one high-k gate dielectric layer in direct contact with the silicon oxide layer, and at least one gate conductor in direct contact with the high-k gate dielectric layer. The interface between the silicon oxide layer and the upper surface of the germanium containing substrate is substantially free of germanium oxide. A source region and a drain region may be present on opposing sides of the channel region.
摘要翻译：一种半导体器件，包括在所述半导体衬底的沟道区上包括栅极结构的含锗衬底。栅极结构可以包括与含锗衬底的上表面直接接触的氧化硅层，与氧化硅层直接接触的至少一个高k栅介质层和直接与锗氧化物层直接接触的至少一个栅极导体与高k栅介质层接触。氧化硅层和含锗衬底的上表面之间的界面基本上不含氧化锗。源极区域和漏极区域可以存在于沟道区域的相对侧上。

76. 发明申请

WO2013063182A1 HIGH SELECTIVITY NITRIDE ETCH PROCESS 审中-公开
标题翻译：高选择性氮气蚀刻过程
公开(公告)号：WO2013063182A1
公开(公告)日：2013-05-02
申请号：PCT/US2012/061775
申请日：2012-10-25
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , ZEON CORPORATION
发明人： CHANG, Josephine B. , ENGELMANN, Sebastian U. , FULLER, Nicholas C.M. , GUILLORN, Michael A. , NAKAMURA, Masahiro
IPC分类号： H01L21/31
CPC分类号： H01L29/6653 , H01L21/31116 , H01L21/76802 , H01L21/76897 , H01L29/6656 , H01L29/6659
摘要： An anisotropic silicon nitride etch provides selectivity to silicon and silicon oxide by forming a fluorohydrocarbon-containing polymer on silicon surfaces and silicon oxide surfaces. Selective fluorohydrocarbon deposition is employed to provide selectivity to non-nitride surfaces. The fluorohydrocarbon-containing polymer interacts with silicon nitride to form a volatile compound, thereby enabling etching of silicon nitride. The fluorohydrocarbon-containing polymer interacts with silicon oxide at a low reaction rate, retarding, or completely stopping, the etching of silicon oxide. The fluorohydrocarbon-containing polymer does not interact with silicon, and protects silicon from the plasma. The anisotropic silicon nitride etch can be employed to etch silicon nitride selective to silicon and silicon oxide in any dimension, including small dimensions less than 50 nm.
摘要翻译：各向异性氮化硅蚀刻通过在硅表面和氧化硅表面上形成含氟代烃的聚合物来提供对硅和氧化硅的选择性。使用选择性氟代烃沉积来提供对非氮化物表面的选择性。含氟烃聚合物与氮化硅相互作用以形成挥发性化合物，从而能够蚀刻氮化硅。含氟烃聚合物以低反应速率与氧化硅相互作用，阻止或完全停止氧化硅的蚀刻。含氟烃聚合物不与硅相互作用，并保护硅免受等离子体的影响。可以采用各向异性氮化硅蚀刻来蚀刻任选尺寸的硅和氧化硅的氮化硅，包括小于50nm的小尺寸。

77. 发明申请

WO2013009373A1 PHOTOVOLTAIC DEVICE WITH ALUMINUM PLATED BACK SURFACE FIELD AND METHOD OF FORMING SAME 审中-公开
标题翻译：具有铝背板表面的光伏器件及其形成方法
公开(公告)号：WO2013009373A1
公开(公告)日：2013-01-17
申请号：PCT/US2012/033178
申请日：2012-04-12
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , FISHER, Kathryn C. , HUANG, Qiang , PAPA RAO, Satyavolu S. , YEH, Ming-Ling
发明人： FISHER, Kathryn C. , HUANG, Qiang , PAPA RAO, Satyavolu S. , YEH, Ming-Ling
IPC分类号： H01L31/00
CPC分类号： H01L31/022425 , H01L31/068 , Y02E10/547
摘要： A photovoltaic device is provided that includes a semiconductor substrate including a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one on top of the other. A plurality of patterned antireflective coating layers is located on a p-type semiconductor surface of the semiconductor substrate, wherein at least one portion of the p-type semiconductor surface of the semiconductor substrate is exposed. Aluminum is located directly on the at least one portion of the p-type semiconductor surface of the semiconductor substrate that is exposed.
摘要翻译：提供一种光电器件，其包括半导体衬底，该半导体衬底包括具有p型半导体部分的p-n结和在另一个顶部上的n型半导体部分。多个图案化抗反射涂层位于半导体衬底的p型半导体表面上，其中露出半导体衬底的p型半导体表面的至少一部分。铝直接位于暴露的半导体衬底的p型半导体表面的至少一部分上。

78. 发明申请

WO2013006222A1 ADAPTIVE MULTI-BIT ERROR CORRECTION IN ENDURANCE LIMITED MEMORIES 审中-公开
标题翻译：自适应多重错误修正在有限的记忆中
公开(公告)号：WO2013006222A1
公开(公告)日：2013-01-10
申请号：PCT/US2012/033021
申请日：2012-04-11
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , RIVERS, Jude A. , SRINIVASAN, Vijayalakshmi
发明人： RIVERS, Jude A. , SRINIVASAN, Vijayalakshmi
IPC分类号： G11C29/00
CPC分类号： G11C29/52 , G06F11/1048 , G11C16/3418 , G11C29/028 , G11C2029/0409 , G11C2029/0411
摘要： Multi-bit stuck-at fault error recovery can be enabled by adaptive multi-bit error correction method, in which the overhead of error correction hardware is reduced without affecting the lifetime of the memory device. Error correction logic hardware is decoupled from memory blocks. An error correction logic block is partitioned such that error correction logic entries support different number of error correction capabilities based on the probability of occurrence of the different number of errors in different memory blocks. Faulty memory blocks are mapped to appropriate error correction logic entries. The mapping can be one-to-one or many-to-one depending on embodiments. The adaptive partitioning of the error correction logic entries can be configured to match projected statistical distribution of errors in logic blocks, and can reduce the total error correction logic overhead, provide sufficient error correction, and/or extend the lifetime of the memory device.
摘要翻译：可以通过自适应多位错误校正方法来实现多位卡滞故障恢复，其中降低了纠错硬件的开销，而不影响存储器件的使用寿命。纠错逻辑硬件与存储器块分离。错误校正逻辑块被分区，使得纠错逻辑条目基于在不同存储器块中出现不同数量的错误的概率来支持不同数量的纠错能力。错误的存储器块被映射到适当的纠错逻辑条目。取决于实施例，映射可以是一对一或多对一。错误校正逻辑条目的自适应分割可以被配置为匹配逻辑块中的误差的预测统计分布，并且可以减少总误差校正逻辑开销，提供足够的纠错和/或延长存储器件的寿命。

79. 发明申请

WO2012040674A3 PROVIDING ANSWERS TO QUESTIONS INCLUDING ASSEMBLING ANSWERS FROM MULTIPLE DOCUMENT SEGMENTS 审中-公开
公开(公告)号：WO2012040674A3
公开(公告)日：2012-03-29
申请号：PCT/US2011/053164
申请日：2011-09-24
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , BROWN, Eric W. , CHU-CARROLL, Jennifer , FERRUCCI, David A. , MURDOCK IV, James W.
发明人： BROWN, Eric W. , CHU-CARROLL, Jennifer , FERRUCCI, David A. , MURDOCK IV, James W.
IPC分类号： G06N5/00
摘要： A method, system and computer program product for generating answers to questions. In one embodiment, the method comprises receiving an input query, identifying a plurality of candidate answers to the query; and for at least one of these candidate answers, identifying at least one proof of the answer. This proof includes a series of premises, and a multitude of documents are identified that include references to the premises. A set of these documents is selected that include references to all of the premises. This set of documents is used to generate one or more scores for the one of the candidate answers. A defined procedure is applied to the candidate answers to determine a ranking for the answers, and this includes using the one or more scores for the at least one of the candidate answers in the defined procedure to determine the ranking for this one candidate answer.

80. 发明申请

WO2011139872A1 ENHANCED CAPACITANCE DEEP TRENCH CAPACITOR FOR EDRAM 审中-公开
标题翻译： EDRAM的增强电容深度电容器
公开(公告)号：WO2011139872A1
公开(公告)日：2011-11-10
申请号：PCT/US2011/034430
申请日：2011-04-29
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , KWON, Oh-Jung , LEE, Junedong , PEI, Chengwen , WANG, Geng
发明人： KWON, Oh-Jung , LEE, Junedong , PEI, Chengwen , WANG, Geng
IPC分类号： H01L29/94
CPC分类号： H01L28/82 , H01L27/10867 , H01L29/66181
摘要： A substrate including a stack of a handle substrate, an optional lower insulator layer, a doped polycrystalline semiconductor layer, an upper insulator layer, and a top semiconductor layer is provided. A deep trench is formed through the top semiconductor layer, the upper insulator layer, and the doped polycrystalline semiconductor layer. Exposed vertical surfaces of the polycrystalline semiconductor layer are crystallographically etched to form random facets in the deep trench, thereby increasing the total exposed surface area of the polycrystalline semiconductor layer in the deep trench. A node dielectric and at least one conductive material are deposited to fill the trench and to form a buried strap portion, which constitute a capacitor of an eDRAM. Access transistors and other logic devices can be formed.
摘要翻译：提供了包括手柄衬底，可选的下绝缘体层，掺杂多晶半导体层，上绝缘体层和顶部半导体层的衬底的衬底。通过顶部半导体层，上部绝缘体层和掺杂多晶半导体层形成深沟槽。多晶半导体层的暴露的垂直表面被晶体学蚀刻以在深沟槽中形成随机刻面，从而增加深沟槽中的多晶半导体层的总暴露表面积。沉积节点电介质和至少一种导电材料以填充沟槽并形成构成eDRAM的电容器的掩埋带部分。可以形成存取晶体管和其它逻辑器件。

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