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31. 发明申请

WO2005069723A3 SYSTEMS AND METHODS FOR OPERATING A BARRIER 审中-公开
标题翻译：操作障碍物的系统和方法
公开(公告)号：WO2005069723A3
公开(公告)日：2006-02-16
申请号：PCT/IB2005001149
申请日：2005-01-21
申请人： TSUI PHILIP Y W , TSUI GALLEN KA-LEUNG
发明人： TSUI PHILIP Y W , TSUI GALLEN KA-LEUNG
IPC分类号： E05B47/00 , E05C19/16 , E05F15/00 , E05F15/10 , E05F15/12 , E05F15/20 , G01L1/00
CPC分类号： E05C19/166 , E05B2047/0068 , E05F15/41 , E05F15/603 , E05F15/63 , E05F15/70 , E05Y2201/22 , E05Y2201/236 , E05Y2400/30 , E05Y2400/54 , E05Y2400/554 , E05Y2800/11 , E05Y2900/132
摘要： Disclosed are systems and methods for operating a barrier. In one embodiement, a door operator can be opened or closed by triggering either an internal device (e.g., wall button) or an external device. In one embodiment, if an obstacle is detected when the door is opening or closing, the door will either stop or swing in the reverse direction. In yet a further embodiment, the door operator is implemented using an alternating current (AC) synchronous motor.
摘要翻译：公开了用于操作屏障的系统和方法。在一个实施例中，门操作者可以通过触发内部装置（例如，墙壁按钮）或外部装置来打开或关闭。在一个实施例中，如果在门打开或关闭时检测到障碍物，则门将以相反的方向停止或摆动。在另一个实施例中，门操作者使用交流（AC）同步电动机来实现。

32. 发明申请

WO2004008071A1 METHODS AND APPARATUS FOR DELAY FREE PHASE SHIFTING IN CORRECTING PLL PHASE OFFSET 审中-公开
标题翻译：用于在纠正PLL相位偏移中进行自由相位移位的方法和装置
公开(公告)号：WO2004008071A1
公开(公告)日：2004-01-22
申请号：PCT/US2003/022004
申请日：2003-07-10
申请人： HONEYWELL INTERNATIONAL INC.
发明人： WHITE, Stanley, A.
IPC分类号： G01C19/42
CPC分类号： G01C19/5649 , E05Y2400/30 , G01C19/42 , H03L7/081 , H03L7/235
摘要： An apparatus eliminates a differential phase shift, Δθ (f ), between a double sideband suppressed carrier modulated angular rate information signal (24) and its sinusoidal demodulation reference signal (38) in a gyroscope angular rate sensing circuit including a signal reference source. The apparatus includes a demodulator (34), a phase shifter (50) in a demodulation reference signal path, the demodulation reference signal path being between the signal reference source and the demodulator. The phase shifter is configured to adjust a phase of the sinusoidal demodulation reference signal. A phase locked loop (PLL) (35) includes a phase detector (62), a servo equalizer (72), and a dual-frequency, numerically controlled oscillator (76). The PLL is configured to provide a demodulation signal based on the phase shifted demodulation reference signal, and a phase shift command source (56) is configured to provide an input to the phase shifter to command an appropriate phase adjustment.
摘要翻译：装置消除了包括信号参考源的陀螺仪角速度感测电路中的双边带抑制载波调制角速度信息信号（24）和其正弦解调参考信号（38）之间的差分相移Deltatheta（f）。该装置包括解调器（34），解调参考信号路径中的移相器（50），解调参考信号路径位于信号参考源和解调器之间。移相器被配置为调整正弦解调参考信号的相位。锁相环（PLL）（35）包括相位检测器（62），伺服均衡器（72）和双频数字振荡器（76）。 PLL被配置为基于相移解调参考信号提供解调信号，并且相移指令源（56）被配置为向移相器提供输入以指令适当的相位调整。

33. 发明申请

WO2003019782A2 A WIDE BAND DIGITAL PHASE LOCKED LOOP (PLL) WITH A HALF-FREQUENCY OUTPUT 审中-公开
标题翻译：具有半频率输出的宽带数字锁相环（PLL）
公开(公告)号：WO2003019782A2
公开(公告)日：2003-03-06
申请号：PCT/US2002/026693
申请日：2002-08-22
申请人： HONEYWELL INTERNATIONAL INC.
发明人： WHITE, Stanley, A.
IPC分类号： H03L7/08
CPC分类号： G01C19/56 , E05Y2400/30 , G01C21/16 , H03L7/08 , H03L7/0991 , H03L2207/50 , H04L27/1525
摘要： A digital phase locked loop includes an automatic gain control that applies a gain to an input signal in order to provide a gain controlled signal, A 90° phase shifter applies a 90° phase shift to the gain controlled signal in order to provide a 90° phase shifted version of the gain controlled signal. A phase detector is driven by the gain controlled signal, by the 90° phase shifted version of the gain controlled signal, and by sinusoidal and co-sinusoidal signals. A loop filter integrates an output of the phase detector and provide servo equalization for the phase-locked loop. A digital dual frequency oscillator has a fundamental frequency controlled by an output signal from the loop filter. Also, the digital dual frequency oscillator generates the sinusoidal and co-sinusoidal signals.
摘要翻译：数字锁相环包括自动增益控制，对输入信号施加增益以提供增益控制信号，90°移相器向增益控制信号施加90°相移，以提供90° 增益控制信号的相移版本。相位检测器由增益控制信号，增益控制信号的90°相移版本以及正弦和正弦信号驱动。环路滤波器集成了相位检测器的输出，并为锁相环提供伺服均衡。数字双频振荡器具有由环路滤波器的输出信号控制的基频。此外，数字双频振荡器产生正弦和正弦信号。

34. 发明申请

WO1996027881A1 DEVICE AND METHOD FOR REPRODUCING DATA FROM DISK, METHOD FOR CONTROLLING ROTATION OF DISK, AND REPRODUCTION CLOCK GENERATING DEVICE 审中-公开
标题翻译：用于从盘再现数据的装置和方法，用于控制盘的旋转的方法和生成时钟生成装置
公开(公告)号：WO1996027881A1
公开(公告)日：1996-09-12
申请号：PCT/JP1996000551
申请日：1996-03-07
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. , KOUDO, Toshikazu , IMURA, Masaharu , KUNO, Yoshiki , MASHIKO, Yasuhisa , ISHIBASHI, Hidefumi
发明人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
IPC分类号： G11B19/247
CPC分类号： G11B19/247 , E05Y2400/30 , G11B5/59616 , G11B5/59622 , G11B20/10 , G11B20/1403 , G11B27/105 , G11B27/11 , G11B27/3027 , G11B27/329 , G11B2220/213 , G11B2220/2545 , G11B2220/65 , H03L7/08
摘要： A reproducing device for disk is provided with a phase comparator circuit (39) which compares the phase of a virtual address generated by a virtual RAM read address generating circuit (41) based on the output signal of a crystal oscillation circuit (36) with that of a write address, and a spindle control circuit (3) which controls the rotation of a disk while referring to the outputs of a frequency comparator circuit (38) and the phase comparator circuit (39). Therefore, the phase error is fed back to a spindle motor, and the linear velocity does not vary in a steady state. When data recorded on a disk by the CLV system are reproduced by such a reproducing device by the variable linear velocity reproducing system, the quality of the reproduced data is ensured and both the access speed and power consumption are improved.
摘要翻译：一种盘再现装置，具有相位比较电路（39），该相位比较电路（39）根据晶体振荡电路（36）的输出信号，将由虚拟RAM读地址生成电路（41）生成的虚拟地址的相位与写入地址的主轴控制电路（3），以及参考频率比较器电路（38）和相位比较器电路（39）的输出来控制盘的旋转的主轴控制电路（3）。因此，相位误差被反馈到主轴电动机，并且线速度在稳定状态下不变化。当通过可变线速度再现系统由这种再现装置再现由CLV系统记录在盘上的数据时，确保再现数据的质量，并提高存取速度和功耗。

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