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21. 发明申请

WO2003079547A3 RECONFIGURABLE DISTRIBUTED ACTIVE TRANSFORMERS 审中-公开
公开(公告)号：WO2003079547A3
公开(公告)日：2003-09-25
申请号：PCT/US2003/007157
申请日：2003-03-10
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , KOMIJANI, Abbas , HAJIMIRI, Seyed-Ali , KEE, Scott, D. , AOKI, Ichiro
发明人： KOMIJANI, Abbas , HAJIMIRI, Seyed-Ali , KEE, Scott, D. , AOKI, Ichiro
IPC分类号： H03F3/42
摘要： Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided.

22. 发明申请

WO2009148668A2 EFFECTIVE-INDUCTANCE-CHANGE BASED MAGNETIC PARTICLE SENSING 审中-公开
标题翻译：基于有效电感变化的磁性粒子感测
公开(公告)号：WO2009148668A2
公开(公告)日：2009-12-10
申请号：PCT/US2009/036368
申请日：2009-03-06
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , WANG, Hua , HAJIMIRI, Seyed, Ali , CHEN, Yan
发明人： WANG, Hua , HAJIMIRI, Seyed, Ali , CHEN, Yan
CPC分类号： G01R33/1269
摘要： The invention relates to an integrated measurement system to detect a quantity of magnetic particles in a sample. The measurement system includes a substrate. An electromagnetic (EM) structure disposed on the surface of the substrate is configured to receive a sample including the magnetic particles in proximity thereof. The integrated measurement system also includes an electrical current generator disposed on the surface of the substrate which is electro-magnetically coupled to the EM structure. The electrical current generator is configured to cause an electrical current to flow in the EM structure. The integrated measurement system also includes an effective inductance sensor disposed on the surface of the substrate which is configured to measure a selected one of an effective inductance and a change in effective inductance. The invention also relates to a method to determine the number of and/or the locations of the magnetic particles in a sample.
摘要翻译：本发明涉及一种用于检测样品中的磁性颗粒的量的综合测量系统。测量系统包括基板。设置在基板的表面上的电磁（EM）结构被配置为接收包括邻近的磁性颗粒的样品。集成测量系统还包括设置在基板的表面上的电流发生器，其电磁耦合到EM结构。电流发生器被配置为使得电流在EM结构中流动。集成测量系统还包括设置在衬底的表面上的有效电感传感器，其被配置为测量有效电感和有效电感的变化中选定的一个。本发明还涉及确定样品中磁性颗粒数量和/或位置的方法。

23. 发明申请

WO2009142756A2 ON-CHIP HIGHLY-EFFICIENT ANTENNAS USING STRONG RESONANT COUPLING 审中-公开
标题翻译：使用强共振耦合的片上高效天线
公开(公告)号：WO2009142756A2
公开(公告)日：2009-11-26
申请号：PCT/US2009/003169
申请日：2009-05-22
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , BABAKHANI, Aydin , HAJIMIRI, Seyed, Ali
发明人： BABAKHANI, Aydin , HAJIMIRI, Seyed, Ali
IPC分类号： H01Q23/00 , H01Q3/24 , H01Q5/00
CPC分类号： H01Q15/08 , H01L2224/16225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2924/1461 , H01Q19/06 , H01Q23/00 , H01L2924/00014 , H01L2924/00
摘要： The invention relates to an antenna structure for coupling electromagnetic energy between a chip and an off-chip element, including a first resonant structure disposed on or in a chip. The first resonant structure is configured to have a first resonant frequency. The antenna structure also includes a second resonant structure disposed on or in an off-chip element. The second resonant structure is configured to have a second resonant frequency substantially the same as the first resonant frequency. The first resonant structure and the second resonant structure are mutually disposed within a near field distance of each other to form a coupled antenna structure that is configured to couple electromagnetic energy between the chip and the off-chip element. The electromagnetic energy has a selected wavelength in a wavelength range from microwave to sub-millimeter wave. The invention also relates to a method of calculating dimensions for a highly coupled antenna structure.
摘要翻译：本发明涉及一种用于在芯片和片外元件之间耦合电磁能的天线结构，包括设置在芯片上或芯片中的第一谐振结构。第一谐振结构被配置为具有第一谐振频率。天线结构还包括设置在片外元件上或芯片外元件上的第二谐振结构。第二谐振结构被配置为具有与第一谐振频率基本相同的第二谐振频率。第一共振结构和第二谐振结构相互配置在彼此的近场距离内，以形成耦合的天线结构，其被配置为在芯片和片外元件之间耦合电磁能。电磁能在从微波到亚毫米波的波长范围内具有选定的波长。本发明还涉及一种用于计算高度耦合的天线结构的尺寸的方法。

24. 发明申请

WO2009039289A2 EQUALIZATION OF THIRD-ORDER INTERMODULATION PRODUCTS IN WIDEBAND DIRECT CONVERSION RECEIVER 审中-公开
标题翻译：宽带直接变频接收机中三阶互调产物的均衡
公开(公告)号：WO2009039289A2
公开(公告)日：2009-03-26
申请号：PCT/US2008076874
申请日：2008-09-18
申请人： CALIFORNIA INST OF TECHN , KEEHR EDWARD , HAJIMIRI SEYED ALI
发明人： KEEHR EDWARD , HAJIMIRI SEYED ALI
IPC分类号： H04L27/01 , H04B7/005
CPC分类号： H03D7/14 , H04B1/123
摘要： A feedforward error-compensated receiver for minimizing undesired odd-order nonlinear distortion products. The receiver includes a first receiver path configured to receive an input signal. The first receiver path outputs a signal including at least one baseband (BB) frequency. At least one second receiver path is configured to receive the input signal and to provide a second receiver path output signal. The second receiver path includes at least one odd-order nonlinear distortion reference generator. The at least one odd-order nonlinear distortion reference generator and the mixer are configured to generate a synthetic odd-order nonlinear distortion signal. A combining element is configured to receive the output signal from the first path and the output signal from the second receiver path output and to combine the signals such that the odd-order nonlinear distortion signals are substantially attenuated at an output of the combining element.
摘要翻译：前馈误差补偿接收器，用于最小化不需要的奇数阶非线性失真产物。接收器包括被配置为接收输入信号的第一接收器路径。第一接收器路径输出包括至少一个基带（BB）频率的信号。至少一个第二接收器路径被配置为接收输入信号并提供第二接收器路径输出信号。第二接收机路径包括至少一个奇数阶非线性失真参考发生器。该至少一个奇数阶非线性失真参考发生器和混频器被配置为产生合成奇数阶非线性失真信号。组合元件被配置为接收来自第一路径的输出信号和来自第二接收器路径输出的输出信号并组合这些信号，使得奇数阶非线性失真信号在组合元件的输出处被显着衰减。

25. 发明申请

WO2009009652A2 SEGMENTED POWER AMPLIFIER 审中-公开
标题翻译： SEGMENTED功率放大器
公开(公告)号：WO2009009652A2
公开(公告)日：2009-01-15
申请号：PCT/US2008/069623
申请日：2008-07-10
申请人： AXIOM MICRODEVICES, INC. , AOKI, Ichiro , KEE, Scott, D. , HAJIMIRI, Seyed-Ali , JOO, Roberto, Aparicio , MAGOON, Rahul , MCCLYMONT, Donald
发明人： AOKI, Ichiro , KEE, Scott, D. , HAJIMIRI, Seyed-Ali , JOO, Roberto, Aparicio , MAGOON, Rahul , MCCLYMONT, Donald
IPC分类号： H03F1/02 , H03F3/68 , H03F3/72
CPC分类号： H03F3/72 , H03F1/0277 , H03F3/245
摘要： A system for amplifying a signal is provided. The system includes a plurality of driver stages, each having an input, an output, and a disable control. An output stage having an input is coupled to the outputs of the plurality of driver stages. A plurality of disable control signals is provided to the driver stages so as to controllably enable and disable one or more of the driver stages.
摘要翻译：提供一种放大信号的系统。该系统包括多个驱动器级，每个具有输入，输出和禁用控制。具有输入的输出级耦合到多个驱动级的输出。多个禁用控制信号被提供给驱动器级，以便可控制地启用和禁用一个或多个驱动器级。

26. 发明申请

WO2009009647A1 POWER AMPRIFIER AMPLITUDE MODULATOR SYSTEM AND METHOD 审中-公开
标题翻译：功率放大器振幅调制器系统及方法
公开(公告)号：WO2009009647A1
公开(公告)日：2009-01-15
申请号：PCT/US2008/069615
申请日：2008-07-10
申请人： AXION MICRODEVICES, INC. , MAGOON, Rahul , KEE, Scott, D. , HAJIMIRI, Seyed, Ali , AOKI, Ichiro , JOO, Roberto, Aparicio , DAMGAARD, Morten , MOHTA, Setu , HATCHER, Geoff
发明人： MAGOON, Rahul , KEE, Scott, D. , HAJIMIRI, Seyed, Ali , AOKI, Ichiro , JOO, Roberto, Aparicio , DAMGAARD, Morten , MOHTA, Setu , HATCHER, Geoff
IPC分类号： H03F1/02 , H03F3/19 , H03F1/32 , H03F1/52 , G01R19/04 , H03G3/20 , H03G3/30
CPC分类号： H03F1/02 , G01R19/04 , H03F1/32 , H03F1/52 , H03F3/19 , H03F2200/102 , H03F2200/324 , H03F2200/378 , H03F2200/393 , H03F2200/451 , H03F2200/453 , H03F2200/456 , H03F2200/462 , H03F2200/471 , H03F2200/541 , H03F2200/99 , H03G3/3047
摘要： A system (600) for controlling amplifier power (630) is provided. The system includes a voltage envelope detector (604) receiving a voltage signal and generating an attenuated voltage envelope signal (606). A current envelope detector (605) receives a current signal and generates an attenuated current envelope signal. (607) A controller (604) receives power level data and generates attenuation control data for the voltage envelope signal and the current envelope signal. A detector (608) receives the voltage envelope signal (606) and the current envelope signal (607) and generates a control signal based on the greater of the voltage envelope signal and the current envelope signal. A power amplifier level controller (617) receives the control signal and generates a power amplifier (630) level control signal.
摘要翻译：提供了一种用于控制放大器功率的系统（600）（630）。该系统包括接收电压信号并产生衰减的电压包络信号（606）的电压包络检测器（604）。电流包络检测器（605）接收电流信号并产生衰减的电流包络信号。（607）控制器（604）接收功率电平数据并产生用于电压包络信号和电流包络信号的衰减控制数据。检测器（608）接收电压包络信号（606）和电流包络信号（607），并且基于电压包络信号和电流包络信号中的较大者产生控制信号。功率放大器电平控制器（617）接收控制信号并产生功率放大器（630）电平控制信号。

27. 发明申请

WO2005107074A2 INTEGRATED CIRCUIT WITH BREAKDOWN VOLTAGE MULTIPLIER 审中-公开
标题翻译：具有断电电压乘法器的集成电路
公开(公告)号：WO2005107074A2
公开(公告)日：2005-11-10
申请号：PCT/US2005012758
申请日：2005-04-14
申请人： CALIFORNIA INST OF TECHN , MANDEGARAN SAM , HAJIMIRI SEYED ALI
发明人： MANDEGARAN SAM , HAJIMIRI SEYED ALI
IPC分类号： H03K19/003 , H03K19/0175
CPC分类号： H03K19/00315 , H03K19/00307
摘要： An apparatus and method for driving an output signal in a high speed integrated circuit. The apparatus and methods enable the output voltage swing from the driver to exceed the breakdown voltage of any individual element in the output driver. A high speed driver can utilize one or more transistors in a stacked configuration, such that the breakdown voltage of the entire stacked configuration is based on the number of transistors in the stack. The driver is configured to distribute the output voltage substantially equally among each of the stacked transistors, such that the driver is able to source an output voltage swing that is greater than the breakdown voltage of any individual transistor in the driver.
摘要翻译：一种用于驱动高速集成电路中的输出信号的装置和方法。该装置和方法使得来自驱动器的输出电压摆幅超过输出驱动器中任何单独元件的击穿电压。高速驱动器可以利用堆叠配置中的一个或多个晶体管，使得整个堆叠配置的击穿电压基于堆叠中的晶体管的数量。驱动器被配置为在每个堆叠的晶体管中基本上均等地分配输出电压，使得驱动器能够输出大于驱动器中的任何单独晶体管的击穿电压的输出电压摆幅。

28. 发明申请

WO2005094427A2 CROSSTALK EQUALIZER 审中-公开
标题翻译： CROSSTALK均衡器
公开(公告)号：WO2005094427A2
公开(公告)日：2005-10-13
申请号：PCT/US2005/006953
申请日：2005-03-02
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , BUCKWALTER, James , HAJIMIRI, Seyed, Ali
发明人： BUCKWALTER, James , HAJIMIRI, Seyed, Ali
IPC分类号： H04B3/32 , H04B3/46 , H04L25/03 , H04L25/493
CPC分类号： H04L25/493 , H04B3/32 , H04B3/462 , H04L25/03885
摘要： Apparatus and methods for equalizing the jitter on a communication line attributable to uncorrelated data coupled from one or more data lines in close proximity to the communication line. The crosstalk jitter induced by adjacent data lines can be equalized by detecting one or more data or state transitions in the adjacent data lines and comparing the timing of the one or more data or state transitions to the timing of one or more data or state transitions on the communication line. The state transitions can be compared to determine a mode and corresponding level of coupling. A time delay contributed by a variable time delay positioned in series with the communication line can be varied based in part on the level of coupling.
摘要翻译：用于均衡通信线路上的抖动的装置和方法，其归因于从紧邻通信线路的一个或多个数据线耦合的不相关数据。通过检测相邻数据线中的一个或多个数据或状态转换并将一个或多个数据或状态转换的定时与一个或多个数据或状态转换的定时进行比较，相邻数据线引起的串扰抖动可以相等化通信线路。可以比较状态转换以确定模式和相应的耦合水平。部分基于耦合水平可以改变与通信线路串联定位的可变时间延迟所引起的时间延迟。

29. 发明申请

WO2005060655A2 DETERMINISTIC JITTER EQUALIZER 审中-公开
标题翻译：决定性智力平衡机
公开(公告)号：WO2005060655A2
公开(公告)日：2005-07-07
申请号：PCT/US2004/042174
申请日：2004-12-14
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , BUCKWALTER, James , HAJIMIRI, Seyed, Ali , ANALUI, Behnam
发明人： BUCKWALTER, James , HAJIMIRI, Seyed, Ali , ANALUI, Behnam
IPC分类号： H03H11/26 , H04B1/10 , H04L1/20 , H04L7/033
CPC分类号： H03H11/265 , H04L1/205 , H04L7/0337
摘要： An equalizer for serial data communications can be configured to compensate for the effects of deterministic jitter. The equalizer can be configured to compensate a received serial data stream for the effects of data-dependent jitter as well as duty cycle distortion jitter. The equalizer can be configured to determine the value of one or more previously received symbols and compare them to a recovered symbol. The equalizer can adjust a variable delay positioned in the serial data path to introduce a delay into the data path that is based in part on the received data stream. The equalizer can be configured to vary the delay when any of the one or more previously received symbols is different from the recovered symbol, and can be configured to maintain a constant delay if the one or more previously received symbols is the same as the recovered symbol.
摘要翻译：串行数据通信的均衡器可以配置为补偿确定性抖动的影响。均衡器可以配置为补偿接收的串行数据流，以获得与数据相关的抖动以及占空比失真抖动的影响。均衡器可以被配置为确定一个或多个先前接收的符号的值，并将其与恢复的符号进行比较。均衡器可以调整位于串行数据路径中的可变延迟，以将延迟引入到部分基于所接收的数据流的数据路径中。均衡器可以被配置为当一个或多个先前接收到的符号中的任一个与恢复的符号不同时，改变延迟，并且如果一个或多个先前接收到的符号与恢复的符号相同，则可以配置为保持恒定的延迟。

30. 发明申请

WO2004036751A3 CIRCULAR GEOMETRY OSCILLATORS 审中-公开
公开(公告)号：WO2004036751A3
公开(公告)日：2004-04-29
申请号：PCT/US2003/033126
申请日：2003-10-17
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , HAJIMIRI, Seyed-Ali , APARICIO JOO, Roberto
发明人： HAJIMIRI, Seyed-Ali , APARICIO JOO, Roberto
IPC分类号： H03B5/26
摘要： An integrated voltage controlled oscillator is provided. The integrated voltage controlled oscillator includes a first slab inductor having two ends and a second slab inductor having two ends. A first oscillator core is connected to a first end of the first slab inductor and a second end of the second slab inductor, and a second oscillator core is connected to a second end of the first slab inductor and a first end of the second slab inductor. In this manner, the low-loss slab inductors provide the oscillator tank inductance.

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