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    • 2. 发明申请
    • DETERMINISTIC JITTER EQUALIZER
    • 决定性智力平衡机
    • WO2005060655A2
    • 2005-07-07
    • PCT/US2004/042174
    • 2004-12-14
    • CALIFORNIA INSTITUTE OF TECHNOLOGYBUCKWALTER, JamesHAJIMIRI, Seyed, AliANALUI, Behnam
    • BUCKWALTER, JamesHAJIMIRI, Seyed, AliANALUI, Behnam
    • H03H11/26H04B1/10H04L1/20H04L7/033
    • H03H11/265H04L1/205H04L7/0337
    • An equalizer for serial data communications can be configured to compensate for the effects of deterministic jitter. The equalizer can be configured to compensate a received serial data stream for the effects of data-dependent jitter as well as duty cycle distortion jitter. The equalizer can be configured to determine the value of one or more previously received symbols and compare them to a recovered symbol. The equalizer can adjust a variable delay positioned in the serial data path to introduce a delay into the data path that is based in part on the received data stream. The equalizer can be configured to vary the delay when any of the one or more previously received symbols is different from the recovered symbol, and can be configured to maintain a constant delay if the one or more previously received symbols is the same as the recovered symbol.
    • 串行数据通信的均衡器可以配置为补偿确定性抖动的影响。 均衡器可以配置为补偿接收的串行数据流,以获得与数据相关的抖动以及占空比失真抖动的影响。 均衡器可以被配置为确定一个或多个先前接收的符号的值,并将其与恢复的符号进行比较。 均衡器可以调整位于串行数据路径中的可变延迟,以将延迟引入到部分基于所接收的数据流的数据路径中。 均衡器可以被配置为当一个或多个先前接收到的符号中的任一个与恢复的符号不同时,改变延迟,并且如果一个或多个先前接收到的符号与恢复的符号相同,则可以配置为保持恒定的延迟 。