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    • 13. 发明申请
    • FRACTIONAL SAMPLING OF ELECTRICAL ENERGY
    • 电能的部分采样
    • WO2007131175A3
    • 2008-10-30
    • PCT/US2007068253
    • 2007-05-04
    • ELSTER ELECTRICITY LLCHOLDSCLAW SCOTT T
    • HOLDSCLAW SCOTT T
    • G01R13/34
    • G01R19/2513
    • A novel method and device for measuring electrical parameters in an energy meter in an electrical system is described. The novel method samples an electrical energy signal and determines a relevant portion of the sampled electrical energy signal. The relevant portion of the electrical energy signal is then separately multiplied by a first and second reference waveform. The relevant portion may be reflective of a particular line cycle at a particular frequency of interest. In addition, other samples in the line cycle may be accumulated. The samples whose portions may be determined may be the first and/or last signal, while other sampled signals may be evaluated in whole.
    • 描述了一种用于测量电气系统中的能量计中的电参数的新颖方法和装置。 该新颖方法对电能信号进行采样并确定采样的电能信号的相关部分。 电能信号的相关部分然后分别乘以第一和第二参考波形。 相关部分可以反映感兴趣的特定频率处的特定线路周期。 此外,可以累积行周期中的其他样本。 可以确定其部分的样本可以是第一和/或最后一个信号,而其他采样信号可以整体评估。
    • 15. 发明申请
    • TAPPED DELAY LINE HIGH SPEED REGISTER
    • TAPPED延迟线高速寄存器
    • WO02045213A2
    • 2002-06-06
    • PCT/US2001/043290
    • 2001-11-20
    • G01R13/34G01R31/28G01R31/30H01S
    • G01R13/345G01R31/2882G01R31/3016
    • A clockless time-of-flight interval timer includes a tapped delay line register comprising N buffers that each contribute a substantially identical incremental time delay. A latched version of a START pulse associated with an output of transmitted energy from a laser is propagated through the tapped delay line. A DATA signal representing a detected pulse returned from a target is coupled to a block of four comparators each having a different signal threshold. The output of each comparator lock is provided as input to one of four channel registers, each register comprising N D-type flipflops separately but synchronously triggerable by tapped incrementally delayed outputs from the N buffers. Channel register outputs are multiplexed and decoded and interfaced with a microprocessor. The microprocessor determines first signal time over threshold (FOT) information and total time over threshold (TOT) information from the channel registers. The FOT provides a measure of time-of-flight, which measure can be corrected using TOT information and a look-up table containing timing walk incremental delay corrections for individual ones of the N buffers. TOT information can be used as an indicator of signal strength and thus may be used to correct for systematic errors in measured delay, which arise from fluctuation in signal strength.
    • 无时钟时间间隔定时器包括抽头延迟线寄存器,其包括N个缓冲器,每个缓冲器贡献基本相同的增量时间延迟。 与来自激光器的发射能量的输出相关联的START脉冲的锁存版本通过抽头延迟线传播。 表示从目标返回的检测脉冲的DATA信号耦合到每个具有不同信号阈值的四个比较器的块。 每个比较器锁的输出作为输入提供给四个通道寄存器之一,每个寄存器分别包括N个D型触发器,但可通过来自N个缓冲区的抽头递增延迟输出同步触发。 通道寄存器输出被复用和解码并与微处理器连接。 微处理器从通道寄存器确定第一信号时间超过阈值(FOT)信息和总超时阈值(TOT)信息。 FOT提供飞行时间的测量,该测量可以使用TOT信息和包含N个缓冲区中各个缓冲区的定时步进增量延迟校正的查找表进行校正。 TOT信息可以用作信号强度的指标,因此可用于校正由信号强度波动引起的测量延迟中的系统误差。
    • 17. 发明申请
    • STREAMING ARCHITECTURE FOR WAVEFORM PROCESSING
    • 波浪加工流水建筑
    • WO02041103A2
    • 2002-05-23
    • PCT/US2001/043211
    • 2001-11-16
    • G01R13/20G01R13/02G01R13/34G01R19/25G05B15/02G06F9/445G06F
    • G06F9/44505G01R13/02G01R13/029G01R13/345G01R19/2506G05B15/02H04N21/47202H04N21/8173
    • An oscilloscope apparatus and method of processing waveform data using a streaming architecture. The apparatus has multiple processing objects (processors) that share a common cache memory in which the waveform data is stored during processing. Each processing object performs a sequential processing operation by retrieving a "chunk" or portion of the waveform from the memory, processes the chunk of data, and re-stores the processed data into the same location in the cache memory. This process is generally repeated until the entire waveform has been sequentially processed. The apparatus operates using a "pull" design wherein the last processor requests the next chunk to be processed from the preceeding processor. In this manner, the waveform data is essentially processed by pulling it thorugh the sequence of processing objects. The multiple processing objects may be implemented as a sequence of software processing objects in a processing thread or as separate hardware processors.
    • 使用流式架构处理波形数据的示波器装置和方法。 该装置具有共享公共高速缓冲存储器的多个处理对象(处理器),其中在处理期间存储波形数据。 每个处理对象通过从存储器检索“块”或波形的一部分来执行顺序处理操作,处理该数据块,并将处理的数据重新存储到高速缓冲存储器中的相同位置。 通常重复该过程直到整个波形被顺序处理。 该设备使用“拉”设计进行操作,其中最后的处理器从先前的处理器请求要处理的下一个块。 以这种方式,通过拉动它来处理对象的序列来基本上处理波形数据。 多个处理对象可以被实现为处理线程中的软件处理对象的序列或者作为单独的硬件处理器。
    • 18. 发明申请
    • PROCESSING WEB EDITOR FOR DATA PROCESSING IN A DIGITAL OSCILLOSCOPE OR SIMILAR INSTRUMENT
    • 处理数字处理数字处理器或类似仪器的WEB编辑器
    • WO02041102A2
    • 2002-05-23
    • PCT/US2001/043210
    • 2001-11-16
    • G01R13/20G01R13/02G01R13/34G01R19/25G05B15/02G06F9/445G06F
    • G06F9/44505G01R13/02G01R13/029G01R13/345G01R19/2506G05B15/02H04N21/47202H04N21/8173
    • A method and apparatus for generating a graphical representation of a processing web 100 of an instrument. The method comprises the steps of determining a first processing element of the processing web and placing the first processing element in a particular location based at least in part upon its location in said processing web and various inputs to and outputs from the first processing element. The method further comprises the steps of determining a second processing element of the processing web 100 and placing the second processing element in a particular location based at least in part upon its location in said processing web 100, various inputs to and outputs from the second processing element, and a relationship between the second processing element and the first processing element. At least one pin of the first processing element is connected to one pin of the second processing element.
    • 一种用于生成仪器的处理网100的图形表示的方法和装置。 该方法包括以下步骤:确定处理卷筒纸的第一处理元件,并至少部分地基于其在所述处理卷筒纸中的位置以及从第一处理元件输出的各种输入以及将第一处理元件放置在特定位置。 该方法还包括以下步骤:至少部分地基于其在所述处理网100中的位置,确定处理网100的第二处理元件并将第二处理元件放置在特定位置,对第二处理的输入和输出 元素,以及第二处理元件和第一处理元件之间的关系。 第一处理元件的至少一个引脚连接到第二处理元件的一个引脚。
    • 20. 发明申请
    • AUTOMATIC PROBE IDENTIFICATION SYSTEM
    • 自动探测识别系统
    • WO02010778A1
    • 2002-02-07
    • PCT/US2001/023683
    • 2001-07-27
    • G01R1/067G01R13/34G01R1/38G01R13/32G09F9/33G09G3/32
    • G01R1/06788G01R13/345
    • The automatic probe identification system of the present invention automatically identifies an electrical test probe 30 as being associated with a particular channel 22, 24, 26, 28. Specifically, an automatic probe identification system of the present invention includes a testing instrument 20 and at least one test probe 30. The testing instrument 20 preferably has at least one input channel, each input channel being visually represented by a unique channel identification such as a colored trace 42, 44, 46, 48. The test probe 20 has a probe identifier 34 such as a full-spectrum LED for selectively visually representing a unique probe channel identification 43, 45, 47, 49. The probe identifier 34 automatically visually represents a unique probe channel identification corresponding to the unique channel identification of the input channel to which it is coupled. An additional benefit of this system is that the probe identifier 34 used in one preferred embodiment of the test probe 30' provides additional illumination for shadowed or dark places.
    • 本发明的自动探针识别系统将电测试探针30自动识别为与特定通道22,24,26,28相关联。具体地,本发明的自动探针识别系统包括测试仪器20和至少 一个测试探针30.测试仪器20优选地具有至少一个输入通道,每个输入通道由诸如着色迹线42,44,46,48之类的唯一通道识别目视表示。测试探头20具有探针识别器34 例如用于选择性地视觉地表示唯一探测频道标识43,45,47,49的全频谱LED。探测器识别器34自动地视觉地表示对应于其所在输入通道的唯一信道标识的唯一探测信道标识符 再加。 该系统的另外的优点是在测试探针30'的一个优选实施例中使用的探针识别器34为阴影或暗处提供额外的照明。