专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20040262630A1 Group III nitride crystals usable as group III nitride substrate, method of manufacturing the same, and semiconductor device including the same 失效
标题翻译：可用作III族氮化物衬底的III族氮化物晶体及其制造方法和包括其的半导体器件
公开(公告)号：US20040262630A1
公开(公告)日：2004-12-30
申请号：US10856467
申请日：2004-05-27
申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. , Yusuke MORI
发明人： Yasuo Kitaoka , Hisashi Minemoto , Isao Kidoguchi , Takatomo Sasaki , Yusuke Mori , Fumio Kawamura , Masanori Morishita
IPC分类号： H01L031/0328 , H01L029/04 , H01L031/072 , H01L033/00
CPC分类号： H01L33/32 , H01L21/0237 , H01L21/02389 , H01L21/0243 , H01L21/02458 , H01L21/02494 , H01L21/02502 , H01L21/0254 , H01L21/02625 , H01L29/2003 , H01L29/66856
摘要： The present invention provides a method of manufacturing Group III nitride crystals that are of high quality, are manufactured highly efficiently, and are useful and usable as a substrate that is used in semiconductor manufacturing processes. The method of manufacturing Group III nitride crystals includes: forming a first layer made of a semiconductor that is expressed by a composition formula of AlsGatIn1-s-tN (where 0nullsnull1, 0nulltnull1, and snulltnull1); forming a second layer by bringing the surface of the first layer into contact with a melt in an atmosphere including nitrogen, wherein the second layer includes greater defects in a crystal structure, such as a dislocation density for example, than those of the first layer, and the melt includes alkali metal and at least one Group III element selected from the group consisting of gallium, aluminum, and indium; and forming a third layer through crystal growth in the melt in an atmosphere including nitrogen, wherein the third layer is made of a semiconductor that is expressed by a composition formula of AluGavIn1-u-vN (where 0nullunull1, 0nullvnull1, and unullvnull1), and the third layer has less defects in a crystal structure, such as a dislocation density for example, than those of the second layer.
摘要翻译：本发明提供一种制造高品质的III族氮化物晶体的方法，其制造高效率，并且可用和用作半导体制造工艺中使用的基板。制造III族氮化物晶体的方法包括：形成由AlsGatIn1-s-tN的组成式表示的半导体制成的第一层（其中0≤s≤1,0<= t <= 1，和 s + t <= 1）; 通过使第一层的表面在包括氮气的气氛中与熔体接触而形成第二层，其中第二层在诸如位错密度的晶体结构中具有比第一层更大的缺陷，并且熔体包括碱金属和至少一种选自镓，铝和铟的III族元素; 并且在包括氮气的气氛中通过在熔体中的晶体生长形成第三层，其中第三层由以下组成式表示的半导体制成：AlluGavIn1-u-vN（其中0 <= u <= 1,0 <= v <= 1，u + v <= 1），并且第三层在诸如位错密度的晶体结构中具有比第二层更少的缺陷。

2. 发明申请

US20040206981A1 Monolithic read-while-write flash memory device 有权
标题翻译：单片同时读写闪存器件
公开(公告)号：US20040206981A1
公开(公告)日：2004-10-21
申请号：US10445358
申请日：2003-05-27
申请人： M-SYSTEMS FLASH DISK PIONEERS, LTD.
发明人： Dana Gross , Menahem Lasser
IPC分类号： H01L031/072
CPC分类号： H01L27/115 , G11C16/0408 , G11C2216/22
摘要： A memory device includes an executable flash memory partition and a non-executable partition, both partitions being fabricated on a common die. Preferably, both partitions are fabricated using the same flash memory technology. Most preferably, the flash cells of both partitions have insulating floating gates.
摘要翻译：存储器设备包括可执行闪存分区和不可执行分区，两个分区被制造在公共模具上。优选地，使用相同的闪速存储器技术来制造两个分区。最优选地，两个分区的闪存单元具有绝缘浮动栅极。

3. 发明申请

US20040203212A1 Implementation of Si-Ge HBT module with CMOS process 审中-公开
标题翻译：采用CMOS工艺实现Si-Ge HBT模块
公开(公告)号：US20040203212A1
公开(公告)日：2004-10-14
申请号：US10838384
申请日：2004-05-04
申请人： LSI Logic Corporation
发明人： Robi Banerjee , Derryl J. Allman , David T. Price
IPC分类号： H01L031/0328 , H01L031/072
CPC分类号： H01L29/66242 , H01L21/8249 , H01L27/0623
摘要： A semiconductor device wherein Si-Ge is the base of a bipolar transistor and a Silicon layer is the emitter. A method of making such a semiconductor device including steps of forming a Silicon dioxide layer on a Silicon substrate, using a photo resist application and exposure to define where a HBT device will be placed. Plasma etching the Silicon dioxide layer to define an undercut, epitaxially growing an Si-Ge layer and a Silicon layer, and continuing manufacture to form one or more bipolar and CMOS devices and define interconnect and passivation.
摘要翻译：其中Si-Ge是双极晶体管的基极并且硅层是发射极的半导体器件。一种制造这种半导体器件的方法，包括以下步骤：在硅衬底上形成二氧化硅层，使用光刻胶应用和曝光来定义放置HBT器件的位置。等离子体蚀刻二氧化硅层以限定底切，外延生长Si-Ge层和硅层，并且继续制造以形成一个或多个双极和CMOS器件并限定互连和钝化。

4. 发明申请

US20040188717A1 Semiconductor laser drive apparatus, optical write apparatus, imaging apparatus, and semiconductor laser drive method 有权
标题翻译：半导体激光驱动装置，光写入装置，成像装置和半导体激光驱动方法
公开(公告)号：US20040188717A1
公开(公告)日：2004-09-30
申请号：US10757390
申请日：2004-01-15
发明人： Kenichi Ono
IPC分类号： H01L031/072
CPC分类号： H01S5/042 , B41J2/471 , H01S3/0912 , H01S5/0427 , H01S5/06808 , H01S5/0683
摘要： A semiconductor laser drive apparatus and method are disclosed in order to obtain an optimal laser emission pulse that can reduce inherent light emission that may cause fogging and degradation of a photoconductor and also reduce turn on delay. Specifically, a light emission command signal is delayed at a delay unit based on a delay control signal so that a modulation signal is output. The light emission command signal and the delay signal are logically added to a command signal from an external source at a threshold signal generation unit so that a threshold ON signal is output. The modulation signal and the threshold ON signal respectively drive a modulation current switch and a threshold current switch so that a semiconductor laser drive current is generated. The threshold current is sampled according to a sample hold signal supplied from an external source and APC is performed on the sampled threshold current. In a differential quantum efficiency detection unit, an operation of determining differential quantum efficiency based on a current for obtaining a predetermined amount of light and a current for obtaining a portion of the predetermined amount of light is performed, and a light emission current is calculated. By adding the calculated light emission current and an arbitrary current that may be externally set, a modulation current for switching the semiconductor laser can be obtained.
摘要翻译：公开了一种半导体激光器驱动装置和方法，以获得可以减少可能导致光电导体的起雾和劣化的固有光发射的最佳激光发射脉冲，并且还减少导通延迟。具体地，发光指令信号基于延迟控制信号以延迟单元被延迟，从而输出调制信号。光发射指令信号和延迟信号在阈值信号产生单元上从外部源逻辑地加到指令信号上，从而输出阈值ON信号。调制信号和阈值ON信号分别驱动调制电流开关和阈值电流开关，从而产生半导体激光器驱动电流。根据从外部源提供的采样保持信号对阈值电流进行采样，并对采样的阈值电流执行APC。在差分量子效率检测单元中，执行基于用于获得预定量的光的电流和用于获得预定量的光的一部分的电流来确定差分量子效率的操作，并且计算发光电流。通过添加计算出的发光电流和可以从外部设定的任意电流，可以获得用于切换半导体激光器的调制电流。

5. 发明申请

US20040188715A1 Reinforced material 审中-公开
标题翻译：加强材料
公开(公告)号：US20040188715A1
公开(公告)日：2004-09-30
申请号：US10460078
申请日：2003-06-12
发明人： Yuri Leonidovich Spirin , Vladimir Stepanovich Dubinin
IPC分类号： H01L031/072
CPC分类号： C04B35/76 , B28B23/02 , E04C5/04 , E04C5/07 , H01L41/183
摘要： A reinforced material comprising a solid body (1) having a plurality of intersecting holes formed therein and a plurality of elongate solid state reinforcing members (2) located within the holes, wherein the elongate solid state reinforcing members (2) are mutually joined by flexible joints (3) where they intersect with each other.
摘要翻译：一种增强材料，包括具有形成在其中的多个相交孔的固体（1）和位于所述孔内的多个细长固态加强构件（2），其中所述细长固态加强构件（2）通过柔性关节（3）彼此相交。

6. 发明申请

US20040173789A1 Semiconductor devices and methods 有权
公开(公告)号：US20040173789A1
公开(公告)日：2004-09-09
申请号：US10805454
申请日：2004-03-19
申请人： The Board of Trustees of The University of Illinois , and The Board of Regents, The University of Texas System
发明人： Nick Holonyak JR. , Russell Dupuis
IPC分类号： H01L031/072 , H01L021/00
CPC分类号： B82Y20/00 , B82Y10/00 , H01L29/125 , H01L29/127 , H01L33/06 , H01S5/341 , H01S5/3412 , H01S5/3416 , H01S5/3425
摘要： A method of forming a semiconductor device includes the following steps: providing a plurality of semiconductor layers; providing means for coupling signals to and/or from layers of the device; providing a quantum well disposed between adjacent layers of the device; and providing a layer of quantum dots disposed in one of the adjacent layers, and spaced from the quantum well, whereby carriers can tunnel in either direction between the quantum well and the quantum dots.

7. 发明申请

US20040169204A1 Multiply-complexed one-dimensional structure, multiply-twisted helix, multiply-looped ring structure and functional material 审中-公开
公开(公告)号：US20040169204A1
公开(公告)日：2004-09-02
申请号：US10795870
申请日：2004-03-08
发明人： Ryuichi Ugajin , Shintaro Hirata , Masakazu Ukita
IPC分类号： H01L031/072
CPC分类号： B82Y25/00 , B82Y10/00 , H01F1/0072 , H01F1/009 , H01L29/127 , H01L51/0595
摘要： In a multiply-complexed one-dimensional structure having a hierarchical structure in which a linear structure as an element of a one-dimensional structure having a finite curvature is made of a thinner one-dimensional structure having a finite curvature, at least two layers of one-dimensional unit structures are bonded in at least one site. For example, in a multiply-twisted helix having a hierarchical structure in which a linear structure as an element of a spiral structure is made of a thinner spiral structure, at least two layers of the unit spiral structures are bonded in at least one site. Alternatively, in a multiply-looped ring structure having a hierarchical structure in which a linear structure as an element of a ring structure is made of a thinner ring structure, at least two layers of ring unit structures are bonded in at least one site.

8. 发明申请

US20040169194A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20040169194A1
公开(公告)日：2004-09-02
申请号：US10737864
申请日：2003-12-18
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Takao Noda
IPC分类号： H01L031/072
CPC分类号： H01L29/7785 , H01L29/201 , H01L29/205
摘要： A semiconductor device comprises: a GaAs substrate; a buffer layer provided on the GaAs substrate; a laminated structure provided on the buffer layer; a Schottky contact layer provided on the laminated structure; a n-type Inx(Ga1nullyAly)1nullxP layer provided on the Schottky contact layer; a n-type Inu2Ga1nullu2As ohmic contact layer provided on the n-type Inx(Ga1nullyAly)1nullP layer; a gate electrode provided on the Schottky contact layer; and a source electrode and a drain electrode provided on the ohmic contact layer. The buffer layer is made of a semiconductor, and at least a part of the semiconductor has a lattice constant larger than a lattice constant of GaAs. The channel layer is made of Inu1Ga1nullu1As, and the electron supply layer is made of n-type Inv1Al1nullv1As. At least a part of the Schottky contact layer is made of non-doped Inv2Al1nullv2As. The Inx(Ga1nullyAly)1nullxP layer has a part where a bandgap has a distribution which shows a gradual or a stepwise decrease from the Schottky contact layer toward the ohmic contact layer.
摘要翻译：一种半导体器件包括：GaAs衬底; 设置在GaAs衬底上的缓冲层; 设置在缓冲层上的叠层结构; 设置在层叠结构上的肖特基接触层; 设置在肖特基接触层上的n型Inx（Ga1-yAly）1-xP层; 设置在n型Inx（Ga1-yAly）1-P层上的n型Inu2Ga1-u2As欧姆接触层; 设置在所述肖特基接触层上的栅电极; 以及设置在欧姆接触层上的源电极和漏电极。缓冲层由半导体制成，半导体的至少一部分具有大于GaAs晶格常数的晶格常数。沟道层由Inu1Ga1-u1As制成，电子供给层由n型Inv1Al1-v1A制成。肖特基接触层的至少一部分由非掺杂的Inv2Al1-v2A制成。 Inx（Ga1-yAly）1-xP层具有带隙具有从肖特基接触层朝向欧姆接触层逐渐或逐步降低的分布的部分。

9. 发明申请

US20040155236A1 Photoelectronic conversion device-use substrate 审中-公开
标题翻译：光电转换装置用基板
公开(公告)号：US20040155236A1
公开(公告)日：2004-08-12
申请号：US10479375
申请日：2004-03-03
发明人： Akira Fujisawa , Yukio Sueyoshi
IPC分类号： H01L029/06 , H01L031/0328 , H01L031/072
CPC分类号： H01L31/0392 , C03C17/3417 , C23C16/0236 , C23C16/407 , H01L31/02167 , H01L31/0236 , H01L31/1884 , Y02E10/50
摘要： The present invention provides a substrate for a photoelectric conversion device contributing to enhance further the effect of trapping light into a photoelectric conversion layer. The substrate includes a first undercoating film containing at least one selected from tin oxide, titanium oxide, indium oxide and zinc oxide as a main component, a second undercoating film and a conductive film formed in this order on a glass sheet containing an alkali component. Concavities are formed in the surface of the second undercoating film, and the area ratio of the concavities is in the range of 20% to 50%.
摘要翻译：本发明提供一种用于光电转换装置的衬底，其有助于进一步增强将光束捕获到光电转换层中的效果。基板包括含有选自氧化锡，氧化钛，氧化铟和氧化锌作为主要成分中的至少一种的第一底涂膜，第二底涂膜和在含有碱组分的玻璃板上依次形成的导电膜。在第二底涂膜的表面形成凹凸，凹部的面积比在20〜50％的范围内。

10. 发明申请

US20040106264A1 STRUCTURE AND METHOD OF MAKING A HIGH PERFORMANCE SEMICONDUCTOR DEVICE HAVING A NARROW DOPING PROFILE 有权
标题翻译：制造具有窄轨道型材的高性能半导体器件的结构和方法
公开(公告)号：US20040106264A1
公开(公告)日：2004-06-03
申请号：US10307590
申请日：2002-12-02
申请人： Semiconductor Components Industries, LLC
发明人： Gary H. Loechelt
IPC分类号： H01L031/0328 , H01L031/0336 , H01L031/072 , H01L031/109 , H01L021/331 , H01L021/8222 , H01L021/76
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/66272 , H01L29/7322
摘要： A structure and method of making an NPN heterojunction bipolar transistor (100) includes a semiconductor substrate (11) with a first region (82) containing a dopant (86) for forming a base region of the transistor. A second region (84) adjacent to the first region is used to form an emitter region of the transistor. An interstitial trapping material (81) reduces diffusion of dopants in the base region during subsequent thermal processing.
摘要翻译：制造NPN异质结双极晶体管（100）的结构和方法包括具有第一区域（82）的半导体衬底（11），该第一区域包含用于形成晶体管的基极区域的掺杂剂（86）。与第一区相邻的第二区（84）用于形成晶体管的发射极区。间隙捕获材料（81）在随后的热处理期间减少基底区域中的掺杂剂的扩散。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式