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    • 5. 发明授权
    • ESD-protected head gimbal assembly for use in a disk drive
    • 用于磁盘驱动器的ESD保护头万向架组件
    • US06801402B1
    • 2004-10-05
    • US10286170
    • 2002-10-31
    • Jai N. SubrahmanyamDarrell D. PalmerJack M. Chue
    • Jai N. SubrahmanyamDarrell D. PalmerJack M. Chue
    • G11B540
    • G11B5/4853G11B5/40G11B5/484G11B5/486H05K1/0259H05K1/056H05K1/167
    • A Head Gimbal Assembly (HGA) for use in a disk drive and further includes a head having a read element and a write element; and a Trace Gimbal Assembly (TGA) attached to the head. The TGA includes a conductor array having a first end connected to the read element and the write element and a distal end for connecting the read element and the write element to a signal processing circuit, a conductive substrate supporting the head and the conductor array and a dielectric layer disposed between the conductor array and the conductive substrate. The TGA further includes a shunt connected at the distal end for shunting the read element; and an anti-static coating, covering a substantial portion of the conductor array for neutralizing electrostatic charge accumulation on the conductor array.
    • 一种用于磁盘驱动器的磁头万向节组件(HGA),还包括具有读取元件和写入元件的磁头; 和一个跟踪云台组件(TGA)。 TGA包括具有连接到读取元件和写入元件的第一端的导体阵列和用于将读取元件和写入元件连接到信号处理电路的远端,支撑头部和导体阵列的导电基底和 布置在导体阵列和导电基底之间的介电层。 TGA还包括在远端连接用于分流读取元件的分流器; 以及防静电涂层,其覆盖导体阵列的大部分,以中和导体阵列上的静电电荷积聚。
    • 7. 发明授权
    • Device and method of reducing ESD damage in thin film read heads which enables measurement of gap resistances and method of making
    • 减薄薄膜读取头中的ESD损伤的装置和方法,能够测量间隙电阻和制作方法
    • US06678127B2
    • 2004-01-13
    • US09753804
    • 2001-01-02
    • Richard HsiaoJames D. JarrattEmo Hilbrand KlaassenIan Robson McFadyenTimothy J. Moran
    • Richard HsiaoJames D. JarrattEmo Hilbrand KlaassenIan Robson McFadyenTimothy J. Moran
    • G11B540
    • B82Y10/00G11B5/33G11B5/3967G11B5/40G11B5/455G11B33/10G11B2005/0013Y10T29/49032Y10T29/49036Y10T29/49039Y10T29/49043Y10T29/49044Y10T29/49071Y10T29/49073Y10T29/49078
    • A first read gap layer has a resistance RG1 between a first shield layer and one of the first and second lead layers of a read head and the second read gap layer has a resistance RG2 between a second shield layer and said one of the first and second lead layers of the read head. A connection is provided via a plurality of resistors between a first node and each of the first and second shield layers wherein the plurality of resistors includes at least first and second resistors RS1 and RS2 and the first node is connected to said one of the first and second lead layers. A second node is located between the first and second resistors RS1 and RS2. An operational amplifier has first and second inputs connected to the first and second nodes respectively so as to be across the first resistor RS1 and has an output connected to the first node for maintaining the first and second nodes at a common voltage potential. In a first embodiment the first and second shield layers are shorted together. A test instrument is then employed for determining the combined parallel resistance of the resistors RS1 and RS2 by having a first side of the test instrument connected to the first node and the second side connected to each of the first and second shield layers. In the second embodiment a third resistor RS3 is connected between the second node and one of the shield layers, such as the second shield layer. The test instrument can determine the resistances of the first and second gap layers separately by being connected between the first node and the first shield layer for the resistance of the first gap layer or between the first node and the second shield layer for the resistance of the second gap layer.
    • 第一读取间隙层在第一屏蔽层和读取头的第一和第二引线层中的一个之间具有电阻RG1,并且第二读取间隙层在第二屏蔽层和第一和第二引线之间的电阻RG2 读头的引导层。 通过第一节点和第一和第二屏蔽层中的每一个之间的多个电阻器提供连接,其中多个电阻器至少包括第一和第二电阻器RS1和RS2,并且第一节点连接到第一和第二屏蔽层中的所述第一和第二屏蔽层 第二铅层。 第二节点位于第一和第二电阻器RS1和RS2之间。 运算放大器具有分别连接到第一和第二节点的第一和第二输入,以跨过第一电阻器RS1并且具有连接到第一节点的输出,用于将第一和第二节点维持在共同的电压电位。 在第一实施例中,第一和第二屏蔽层被短路在一起。 然后通过使测试仪器的第一侧连接到第一节点并且第二侧连接到第一和第二屏蔽层中的每一个,然后采用测试仪器来确定电阻器RS1和RS2的组合并联电阻。 在第二实施例中,第三电阻器RS3连接在第二节点和其中一个屏蔽层之间,例如第二屏蔽层。 测试仪器可以通过连接在第一节点和第一屏蔽层之间来分别确定第一和第二间隙层的电阻,用于第一间隙层的电阻或第一节点和第二屏蔽层之间的电阻, 第二间隙层。
    • 9. 发明授权
    • Electrostatic protection for magnetic heads
    • 磁头防静电保护
    • US06687097B1
    • 2004-02-03
    • US09532485
    • 2000-03-22
    • Nathaniel C. AndersonRobert D. Ahmann
    • Nathaniel C. AndersonRobert D. Ahmann
    • G11B540
    • B82Y25/00B82Y10/00G11B5/11G11B5/40G11B5/4806G11B2005/3996H05K1/0259H05K1/167H05K2203/0191
    • The present invention provides an ESD and EOS protection method and apparatus that can be easily implemented in existing disk drive designs and manufacturing process. One apparatus embodiment includes a first conductive member electrically connected to a first terminal of a magnetic head element; a second conductive member electrically connected to a first second terminal of the magnetic head element; and a variable conductive member, such as a variably conductive member. One method embodiment includes operably connecting a first conductive member to a first terminal of a magnetic head element; operably connecting a second conductive member to a second terminal of the magnetic head element; and operably connecting a variably conductive member, such as a variably conductive polymer, to the first conductive member and to the second conductive member. The variably conductive member in these embodiments acts as a conductor when a sufficiently high potential exists between the first conductive member and the second conductive member.
    • 本发明提供了一种ESD和EOS保护方法和装置,其可以容易地在现有的磁盘驱动器设计和制造过程中实现。 一个装置实施例包括电连接到磁头元件的第一端子的第一导电构件; 电连接到所述磁头元件的第一第二端子的第二导电构件; 以及可变导电构件,例如可变导电构件。 一种方法实施例包括将第一导电构件可操作地连接到磁头元件的第一端子; 将第二导电构件可操作地连接到磁头元件的第二端子; 以及将可变导电构件(例如可变导电聚合物)可操作地连接到第一导电构件和第二导电构件。 这些实施例中的可变导电构件在第一导电构件和第二导电构件之间存在足够高的电势时用作导体。
    • 10. 发明授权
    • Integrated, on-board device and method for the protection of magnetoresistive heads from electrostatic discharge
    • 用于保护磁阻头免受静电放电的集成的板上器件和方法
    • US06667860B1
    • 2003-12-23
    • US09680661
    • 2000-10-05
    • Eric Leroy GranstromNed Tabat
    • Eric Leroy GranstromNed Tabat
    • G11B540
    • G11B5/40G11B5/11G11B5/3903G11B5/4806
    • This invention discloses a circuit including a magnetoresistive sensor and a tunnel junction device coupled to the MR sensor to dissipate the energy associated with an electrical signal exceeding operational voltages for the sensor. The tunnel junction can include a first conducting layer, a second conducting layer, and a barrier material positioned between the first and the second conducting layer. The barrier material can be positioned so that the first conducting layer and the second conducting layer do not make contact. The MR sensor can be connected in parallel to the first and second conducting layer. The tunnel junction can be made of a material with a resistance more than the MR sensor's resistance at operational voltages and a resistance below the MR sensor's resistance at larger voltages. In another aspect of the invention, a method for fabricating the protected circuit including integrating a MR sensor on the circuit and coupling a tunnel junction to the MR sensor to dissipate an electrical signal exceeding operational voltages for the MR sensor is presented. The tunnel junction device can be fabricated during the fabrication of the circuit. The method can include fabricating the tunnel junction on the MR sensor.
    • 本发明公开了一种包括磁阻传感器和耦合到MR传感器的隧道结装置的电路,以消散与超过传感器的操作电压的电信号相关联的能量。 隧道结可以包括位于第一和第二导电层之间的第一导电层,第二导电层和阻挡材料。 阻挡材料可以被定位成使得第一导电层和第二导电层不接触。 MR传感器可以与第一和第二导电层并联连接。 隧道结可以由电阻大于MR传感器在工作电压下的电阻和在较大电压下低于MR传感器电阻的电阻制成。 在本发明的另一方面,提供了一种用于制造保护电路的方法,包括将MR传感器集成在电路上并将隧道结耦合到MR传感器以耗散超过MR传感器的操作电压的电信号。 在制造电路期间可以制造隧道结装置。 该方法可以包括在MR传感器上制造隧道结。