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1. 发明授权

US07636006B2 Voltage supply interface circuit 有权
标题翻译：电源接口电路
公开(公告)号：US07636006B2
公开(公告)日：2009-12-22
申请号：US11518855
申请日：2006-09-11
申请人： Jerome Heurtier , Samuel Menard
发明人： Jerome Heurtier , Samuel Menard
IPC分类号： H03L5/00 , H03K17/687
CPC分类号： H01L29/0692 , H01L29/7395 , H03K19/017554
摘要： A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the reference voltage, comprising a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage and having its collector intended to provide a voltage to the terminal likely to be at a high voltage.
摘要翻译：一种单片接口电路，用于从由参考电压提供的电源电压提供的控制电路提供相对于参考电压可能处于高电压的端子，包括高电压N沟道MOS 其晶体管的栅极旨在接收参考参考电压的控制信号，并且其源极意图连接到参考电压;以及高压PNP晶体管，其基极连接到MOS晶体管的漏极，具有其发射极旨在接收电源电压并使其收集器旨在向可能处于高电压的端子提供电压。

2. 发明授权

US06498518B1 Low input impedance line/bus receiver 失效
标题翻译：低输入阻抗线路/总线接收器
公开(公告)号：US06498518B1
公开(公告)日：2002-12-24
申请号：US09617680
申请日：2000-07-14
申请人： Russell J. Houghton , Jack A. Mandelman , Azzouz Nezar , Wilbur D. Pricer , William R. Tonti
发明人： Russell J. Houghton , Jack A. Mandelman , Azzouz Nezar , Wilbur D. Pricer , William R. Tonti
IPC分类号： H03K522
CPC分类号： H04L25/0292 , H03K5/24 , H03K19/017554
摘要： A current sensing circuit connected to a power supply terminal and having at least one input terminal and at least one output terminal includes at least one bipolar transistor having a base, emitter and collector, at least one current mirror amplifier connected to the power supply terminal, the current mirror amplifier having an input connected to the collector and having at least one output connected to the emitter, and a DC voltage source connected to the base.
摘要翻译：连接到电源端子并且具有至少一个输入端子和至少一个输出端子的电流感测电路包括至少一个具有基极，发射极和集电极的双极晶体管，连接到电源端子的至少一个电流镜放大器，所述电流镜放大器具有连接到所述集电极并且具有连接到所述发射极的至少一个输出的输入端和连接到所述基极的DC电压源。

3. 发明公开

US20240313773A1 SIGNAL TRANSMISSION DEVICE, ELECTRONIC DEVICE, AND VEHICLE 审中-公开
公开(公告)号：US20240313773A1
公开(公告)日：2024-09-19
申请号：US18675884
申请日：2024-05-28
申请人： ROHM CO., LTD.
发明人： Masahiko ARIMURA
IPC分类号： H03K17/691 , H03K17/567 , H03K19/0175 , H03K19/0185
CPC分类号： H03K17/691 , H03K17/567 , H03K19/017554 , H03K19/018535
摘要： A signal transmission device for transmitting a pulse signal to drive a switching element includes: a first external terminal configured to receive a first input pulse signal for ordinary driving; a second external terminal configured to receive a second input pulse signal for forcible driving; and a first logic configured to generate a driving pulse signal according to the first and second input pulse signals. The first logic gives priority to the second input pulse signal over the first input pulse signal.

4. 发明授权

US06249148B1 Low power variable base drive circuit 失效
标题翻译：低功率可变基极驱动电路
公开(公告)号：US06249148B1
公开(公告)日：2001-06-19
申请号：US09501249
申请日：2000-02-10
申请人： David P. Morrill
发明人： David P. Morrill
IPC分类号： H03K19175
CPC分类号： H03K19/017554 , H03K19/0008
摘要： A variable base drive output circuit that is operational for low-potential power supplies. The output circuit includes a current regulating branch and a base drive branch. A control transistor is logically coupled to an enable signal and an input signal to be propagated. Activation of that control transistor establishes a current path to the base of a bipolar pulldown transistor that is coupled to output. The current regulating branch includes a resistance device in series with current limiting transistors. The resistance device is coupled to the control node of a base current transistor such that when the load on the output node drops, the current to the base of the pulldown transistor also drops. The result is a savings in Icc current for logic LOW signals at the output node. The variable base drive output circuit is operable for low supply potentials.
摘要翻译：可变基极驱动输出电路，适用于低电位电源。输出电路包括电流调节分支和基极驱动分支。控制晶体管逻辑耦合到使能信号和要传播的输入信号。该控制晶体管的激活建立到耦合到输出的双极下拉晶体管的基极的电流路径。电流调节分支包括与限流晶体管串联的电阻器件。电阻器件耦合到基极电流晶体管的控制节点，使得当输出节点上的负载下降时，到下拉晶体管基极的电流也下降。结果是节省输出节点上逻辑低电平信号的Icc电流。可变基极驱动输出电路可用于低电源电位。

5. 发明授权

US5994923A Correctable output driver and method of using the same 失效
标题翻译：可修正的输出驱动器及使用方法
公开(公告)号：US5994923A
公开(公告)日：1999-11-30
申请号：US947250
申请日：1997-10-08
申请人： Mohammad J. Navabi
发明人： Mohammad J. Navabi
IPC分类号： H03K19/003 , H03K19/0175
CPC分类号： H03K19/00376 , H03K19/017554
摘要： A driver circuit is presented which can transition between output voltage levels at a high switching speed. The preferred output driver is a PECL driver having both a correction circuit portion and a drive circuit portion. The correction circuit senses changes in the base-to-emitter forward bias voltage V.sub.BE of drive transistors within the drive circuit. Thus, any change in performance of those drive transistors is replicated in the correction circuit, which then produces a compensating current. The compensating current is modulated by a reference voltage value, and mirrored to the drive circuit. The drive circuit includes not only differential input transistors and differential drive transistors, but also a resistor coupled to the base terminal of each drive transistor. The resistor receives the compensating current which then offsets any change in voltage level (V.sub.OH or V.sub.OL) produced at the output of the drive transistors. The compensating current and specifically the compensating current as reflected upon the drive transistor outputs offset any dependence upon the forward bias voltage of the drive transistor caused by, for example, temperature or fabrication skews.
摘要翻译：提出了可以在高切换速度下在输出电压电平之间转换的驱动器电路。优选的输出驱动器是具有校正电路部分和驱动电路部分的PECL驱动器。校正电路感测驱动电路内的驱动晶体管的基极到发射极正向偏置电压VBE的变化。因此，在校正电路中复制那些驱动晶体管的性能的任何变化，然后校正电路产生补偿电流。补偿电流由参考电压值调制，并被镜像到驱动电路。驱动电路不仅包括差分输入晶体管和差分驱动晶体管，还包括耦合到每个驱动晶体管的基极端子的电阻器。电阻器接收补偿电流，该补偿电流然后抵消在驱动晶体管的输出处产生的电压电平（VOH或VOL）的任何变化。补偿电流，特别是反映在驱动晶体管上的补偿电流输出抵消了由例如温度或制造偏差引起的驱动晶体管的正向偏置电压的任何依赖。

6. 发明授权

US09473120B1 High-speed AC-coupled inverter-based buffer with replica biasing 有权
标题翻译：具有复制偏置的高速交流耦合逆变器缓冲器
公开(公告)号：US09473120B1
公开(公告)日：2016-10-18
申请号：US14714954
申请日：2015-05-18
申请人： QUALCOMM Incorporated
发明人： Wenjing Yin , Jeffrey Mark Hinrichs
IPC分类号： H03B1/00 , H03K3/00 , H03K3/356
CPC分类号： H03K3/356104 , H03K19/017554
摘要： Certain aspects of the present disclosure provide a high-speed AC-coupled inverter-based buffer, which may be used as a buffer for a voltage-controlled oscillator (VCO), for example. One example buffer for a VCO generally includes a first inverter stage having an input node configured to receive a first complementary signal of a differential pair, a second inverter stage having an input node configured to receive a second complementary signal of the differential pair, a biasing stage replicating the first inverter stage or the second inverter stage, wherein an output node of the biasing stage is connected with an input node of the biasing stage, a first impedance coupled between the input node of the first inverter stage and the input node of the biasing stage, and a second impedance coupled between the input node of the second inverter stage and the input node of the biasing stage.
摘要翻译：本公开的某些方面提供了例如可以用作压控振荡器（VCO）的缓冲器的高速AC耦合的基于逆变器的缓冲器。用于VCO的一个示例缓冲器通常包括具有被配置为接收差分对的第一互补信号的输入节点的第一反相器级，具有被配置为接收差分对的第二互补信号的输入节点的第二反相器级，其中所述偏置级的输出节点与所述偏置级的输入节点连接，所述第一阻抗耦合在所述第一反相器级的输入节点和所述第一反相器级的输入节点之间，偏置级，以及耦合在第二逆变器级的输入节点和偏置级的输入节点之间的第二阻抗。

7. 发明授权

US08358156B1 Voltage mode line driver and pre-emphasis circuit 有权
标题翻译：电压模式线路驱动器和预加重电路
公开(公告)号：US08358156B1
公开(公告)日：2013-01-22
申请号：US12790482
申请日：2010-05-28
申请人： Khaldoon S. Abugharbieh , Mark J. Marlett
发明人： Khaldoon S. Abugharbieh , Mark J. Marlett
IPC分类号： H03B1/00
CPC分类号： H04L25/0272 , H03K19/017554 , H03K19/017563 , H04L25/0286
摘要： In one embodiment of the invention, a voltage-mode line driver circuit is provided for transmitting a differential signal. The voltage-mode line driver includes a first voltage swing circuit having an input coupled to receive an input signal and an output coupled to a first transmission line. A second voltage swing circuit is included, the second voltage swing circuit having an input coupled to receive an inversion of the input signal and an output coupled to a second transmission line. First and second pre-emphasis circuits are respectively coupled to the first and second voltage swing circuits. The first and second pre-emphasis circuits are configured to supplement the slew rate of respective first and second voltage swing circuits in response to a transition of the input signal.
摘要翻译：在本发明的一个实施例中，提供了用于发送差分信号的电压模式线路驱动电路。电压模式线路驱动器包括具有耦合以接收输入信号的输入的第一电压摆幅电路和耦合到第一传输线的输出。包括第二电压摆幅电路，第二电压摆幅电路具有耦合以接收输入信号的反相的输入和耦合到第二传输线的输出。第一和第二预加重电路分别耦合到第一和第二电压摆幅电路。第一和第二预加重电路被配置为响应于输入信号的转变来补充相应的第一和第二电压摆幅电路的转换速率。

8. 发明申请

US20040232969A1 Voltage supply interface circuit 审中-公开
标题翻译：电源接口电路
公开(公告)号：US20040232969A1
公开(公告)日：2004-11-25
申请号：US10744411
申请日：2003-12-23
发明人： Jerome Heurtier , Samuel Menard
IPC分类号： H03L005/00
CPC分类号： H01L29/0692 , H01L29/7395 , H03K19/017554
摘要： A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the reference voltage, comprising a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage and having its collector intended to provide a voltage to the terminal likely to be at a high voltage.
摘要翻译：一种单片接口电路，用于从由参考电压提供的电源电压提供的控制电路提供相对于参考电压可能处于高电压的端子，包括高电压N沟道MOS 其晶体管的栅极旨在接收参考参考电压的控制信号，并且其源极意图连接到参考电压;以及高压PNP晶体管，其基极连接到MOS晶体管的漏极，具有其发射极旨在接收电源电压并使其收集器旨在向可能处于高电压的端子提供电压。

9. 发明授权

US10644699B2 Lower voltage switching of current mode logic circuits 有权
公开(公告)号：US10644699B2
公开(公告)日：2020-05-05
申请号：US15993725
申请日：2018-05-31
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Steven Ernest Finn
IPC分类号： H03K19/00 , H03K19/0944 , H03K19/0175
CPC分类号： H03K19/0016 , H03K19/001 , H03K19/0013 , H03K19/017554 , H03K19/09448
摘要： A circuit includes a first transistor comprising a first control input and first and second current terminals, the first control input coupled to receive a first input control signal, and the first current terminal coupled to a first power supply node. The circuit also includes a first resistor coupled to the first control input of the first transistor, a first capacitor coupled between the second current terminal of the first transistor and the first resistor and a second transistor comprising a second control input and third and fourth current terminals, the third current terminal coupled to the first resistor and to the first capacitor.

10. 发明授权

US08928365B2 Methods and devices for matching transmission line characteristics using stacked metal oxide semiconductor (MOS) transistors 有权
标题翻译：使用叠层金属氧化物半导体（MOS）晶体管匹配传输线特性的方法和装置
公开(公告)号：US08928365B2
公开(公告)日：2015-01-06
申请号：US13658778
申请日：2012-10-23
申请人： QUALCOMM Incorporated
发明人： Miao Li , Jingcheng Zhuang , Yan Hu , Xiaoliang Bai , Jing Kang
IPC分类号： H03K3/00
CPC分类号： H03K19/017554 , H03K19/0005
摘要： An output driver for electrostatic discharge (ESD) protection includes a first pair of stacked metal oxide semiconductor field-effect transistor (MOS) devices coupled between a power terminal and a first differential output terminal. The output driver also includes a second pair of stacked MOS devices coupled between a second differential output terminal and a ground terminal.
摘要翻译：用于静电放电（ESD）保护的输出驱动器包括耦合在电源端子和第一差分输出端子之间的第一对堆叠金属氧化物半导体场效应晶体管（MOS）器件。输出驱动器还包括耦合在第二差分输出端子和接地端子之间的第二对堆叠MOS器件。

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