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1. 发明申请

US20190240658A1 SYSTEM AND METHOD FOR FORMING A BIOLOGICAL MICRODEVICE 审中-公开
公开(公告)号：US20190240658A1
公开(公告)日：2019-08-08
申请号：US15887556
申请日：2018-02-02
申请人： University of Central Florida Research Foundation, Inc.
发明人： Swaminathan RAJARAMAN , Avra KUNDU , Tariq AUSAF
IPC分类号： B01L3/00 , B81B1/00 , B81C1/00 , G01N33/483 , A61M37/00
CPC分类号： B01L3/502707 , A61M37/0015 , A61M2037/0053 , B81B1/00 , B81B1/006 , B81B2203/0338 , B81B2203/0361 , B81B2203/04 , B81C1/00095 , B81C1/00111 , B81C2201/0146 , B81C2201/0159 , B81C2201/0185 , B81C2201/019 , G01N33/4836 , G03F7/162 , G03F7/168 , G03F7/2004
摘要： A method for forming a biological microdevice includes applying a biocompatible coarse scale additive process with an additive device and a biocompatible material to form an object. The coarse scale is a dimension not less than about 100 μm. The method also includes applying a biocompatible fine scale subtractive process with a subtractive device to the object. The fine scale is a dimension not greater than about 1000 μm. The method also includes moving the object between the additive device and the subtractive device. A system is also provided for performing the above method and includes the additive device, the subtractive device, a means for transporting the object between the additive device and subtractive device and a processor with a memory including instructions to perform one or more of the above method steps.

2. 发明授权

US06794261B2 Methods of forming void regions, dielectric regions and capacitor constructions 失效
标题翻译：形成空隙区域，电介质区域和电容器结构的方法
公开(公告)号：US06794261B2
公开(公告)日：2004-09-21
申请号：US10044206
申请日：2002-01-11
申请人： Jerome Michael Eldridge
发明人： Jerome Michael Eldridge
IPC分类号： H01L2120
CPC分类号： B81C1/00119 , B81B2203/0315 , B81B2203/0338 , B81C1/00047 , B81C2201/0109 , B81C2201/0146 , H01L21/31138 , H01L28/40
摘要： In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.
摘要翻译：一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。

3. 发明授权

US11673797B2 Microstructure and method for manufacturing same 有权
公开(公告)号：US11673797B2
公开(公告)日：2023-06-13
申请号：US17192126
申请日：2021-03-04
申请人： Shanghai Industrial μTechnology Research Institute
发明人： Shinan Wang
IPC分类号： B81C1/00 , B81B1/00 , G01L9/00
CPC分类号： B81C1/00047 , B81B1/002 , G01L9/0042 , B81B2201/0264 , B81B2201/051 , B81B2203/0315 , B81C2201/0143 , B81C2201/0146 , B81C2201/0181
摘要： A microstructure and a method for manufacturing the same includes: disposing a liquid film on a surface of a substrate, wherein a solid-liquid interface is formed where the liquid film is in contact with the substrate; and irradiating the substrate with a laser of a predetermined waveband to etch the substrate at the solid-liquid interface, wherein the position where the laser is irradiated on the solid-liquid interface moves at least along a direction parallel to the surface of the substrate, and the absorption rate of the liquid film for the laser is greater than the absorption rate of the substrate for the laser.

4. 发明授权

US08715468B2 Machine and method for machining a part by micro-electrical discharge machining 失效
标题翻译：通过微电加工加工零件的机器和方法
公开(公告)号：US08715468B2
公开(公告)日：2014-05-06
申请号：US13119490
申请日：2009-09-09
申请人： Michel Cabrera
发明人： Michel Cabrera
IPC分类号： C25F7/00 , C25F3/02 , B23H1/04 , B23H9/08
CPC分类号： B23H3/04 , B23H5/02 , B23H7/065 , B23H7/08 , B23H9/00 , B23H9/08 , B81C2201/0146
摘要： The invention relates to a machine for machining a part by micro-electrical discharge machining, said machine comprising a mechanism (44, 45, 46, 48) for modifying the configuration of the machine so as to alternatively and reversibly switch from a machining configuration to a sharpening configuration in which the tip of a same etching electrode (20) and another electrode (64) are dipped in an electrolyte bath in order to sharpen the tip of the etching electrode by electrochemnical corrosion.
摘要翻译：本发明涉及一种用于通过微放电加工来加工零件的机器，所述机器包括用于修改机器的构造的机构（44,45,46,48），以便可替代地且可逆地从加工构型切换到其中相同的蚀刻电极（20）的尖端和另一个电极（64）被浸入电解质浴中以通过电化学腐蚀来锐化腐蚀电极的尖端的锐化构造。

5. 发明申请

US20120264249A1 METHOD FOR ETCHED CAVITY DEVICES 有权
标题翻译：蚀刻孔装置的方法
公开(公告)号：US20120264249A1
公开(公告)日：2012-10-18
申请号：US13088100
申请日：2011-04-15
申请人： Srivatsa G. Kundalgurki , Scott Dye
发明人： Srivatsa G. Kundalgurki , Scott Dye
IPC分类号： H01L21/02 , H01L21/3065
CPC分类号： G01L9/0042 , B81C1/00047 , B81C2201/0123 , B81C2201/0146 , B81C2201/017 , H01L21/02057 , H01L21/30608 , H01L21/3065
摘要： MEMS devices (40) using etched cavities (42) are desirably formed using multiple etching steps. Preliminary cavities (20) formed by locally anisotropic etching to nearly the final depth have irregular (46) sidewalls (44) and steep and/or inconsistent sidewall (44) to bottom (54) intersection angles (48). This leads to less than desired cavity diaphragm (26) burst strengths. Final cavities (42) with smooth sidewalls (50), smaller and consistent sidewall (50) to bottom (54) intersection angles (58), and having more than doubled cavity diaphragm (26) burst strengths are obtained by treating the preliminary cavities (20) with TMAH etchant, preferably relatively dilute TMAH etchant. In a preferred embodiment, a cleaning step is performed between the etching step and the TMAH treatment step to remove any anisotropic etching by-products present on the preliminary cavities' (20) initial sidewalls (44). The multi-step cavity etching procedure is especially useful for forming robust MEMS pressure sensors, but is applicable to any type of MEMS device.
摘要翻译：期望使用多个蚀刻步骤形成使用蚀刻腔（42）的MEMS器件（40）。通过局部各向异性腐蚀形成的接近最终深度的初级腔（20）具有不规则的（46）侧壁（44）和陡峭和/或不一致的侧壁（44）至底部（54）交叉角（48）。这导致比所需的腔膜（26）突发强度小。通过处理预备空腔（2）获得具有平滑侧壁（50），更小且一致的侧壁（50）到底部（54）交叉角（58）并且具有多于两倍的腔隔膜（26）的突出强度的最终腔（42） 20）与TMAH蚀刻剂，优选相对稀释的TMAH蚀刻剂。在优选的实施方案中，在蚀刻步骤和TMAH处理步骤之间进行清洁步骤以去除预备空腔（20）初始侧壁（44）上存在的任何各向异性蚀刻副产物。多阶腔蚀刻程序对于形成坚固的MEMS压力传感器尤其有用，但适用于任何类型的MEMS器件。

6. 发明申请

US20090070979A1 Vertical indent production repair 有权
标题翻译：垂直缩进生产维修
公开(公告)号：US20090070979A1
公开(公告)日：2009-03-19
申请号：US11898837
申请日：2007-09-17
申请人： Bernabe J. Arruza , Ronald Bozak , Kenneth Gilbert Roessler , Andrew Dinsdale , Tod Evan Robinson , David Brinkley
发明人： Bernabe J. Arruza , Ronald Bozak , Kenneth Gilbert Roessler , Andrew Dinsdale , Tod Evan Robinson , David Brinkley
IPC分类号： B82B3/00 , B30B9/28 , B30B13/00
CPC分类号： B81C1/00634 , B81C2201/0146 , Y10T29/49778
摘要： A method of nanomachining is provided. The method includes plunging a nanometer-scaled tip into a surface of a substrate at a first location in a first direction that is substantially perpendicular to the surface, thereby displacing a first portion of the substrate with the tip. The method also includes withdrawing the tip from the substrate in a second direction that is substantially opposite to the first direction. The method further includes moving at least one of the tip and the substrate laterally relative to each other. In addition, the method also includes plunging the tip into the substrate at a second location in a third direction that is substantially parallel to the first direction, thereby displacing a second portion of the substrate with the tip and withdrawing the tip from the substrate in a fourth direction that is substantially opposite to the third direction.
摘要翻译：提供了一种纳米加工的方法。该方法包括在基本上垂直于表面的第一方向上的第一位置处将纳米级尖端突入基片的表面，从而使基片的第一部分与尖端移位。该方法还包括在基本上与第一方向相反的第二方向从衬底取出尖端。该方法还包括相对于彼此横向移动尖端和衬底中的至少一个。此外，该方法还包括在基本上平行于第一方向的第三方向上的第二位置处将尖端插入基板，从而使基板的第二部分与尖端移位，并且将尖端从基板中取出第四方向与第三方向基本相反。

7. 发明授权

US07169989B2 Process for creating a 3-dimensional configuration on a substrate 失效
标题翻译：在基板上产生三维结构的工艺
公开(公告)号：US07169989B2
公开(公告)日：2007-01-30
申请号：US10978877
申请日：2004-11-01
申请人： Robert Steven Marks , Levi Gheber , Rodica Ionescu
发明人： Robert Steven Marks , Levi Gheber , Rodica Ionescu
IPC分类号： B82B3/00 , C12P21/06 , C12P7/62
CPC分类号： B81C1/00492 , B01L3/0262 , B01L2300/0896 , B81B2203/0323 , B81C2201/0146 , B82Y30/00 , Y10S977/898 , Y10S977/902
摘要： The invention provides a process for introducing a three-dimensional configuration of micron to sub-micron size in a polymeric substrate comprising applying a catalyst for the selective removal of sub-unit parts of the polymer to at least one predetermined area of the polymer substrate via a pipette with a nano-sized orifice.
摘要翻译：本发明提供了一种在聚合物基材中引入微米至亚微米尺寸的三维构型的方法，包括施加催化剂以选择性地将聚合物的亚单元部分除去至聚合物基材的至少一个预定区域具有纳米尺寸孔的移液管。

8. 发明授权

US06551851B2 Production of diaphragms over a cavity by grinding to reduce wafer thickness 有权
标题翻译：通过研磨在空腔上生产隔膜以减少晶片厚度
公开(公告)号：US06551851B2
公开(公告)日：2003-04-22
申请号：US09881744
申请日：2001-06-18
申请人： Harold S Gamble , S J Neil Mitchell , Andrzej Prochaska , Stephen Peter Fitzgerald
发明人： Harold S Gamble , S J Neil Mitchell , Andrzej Prochaska , Stephen Peter Fitzgerald
IPC分类号： H01L21304
CPC分类号： B81C1/00158 , B41J2/16 , B41J2/1623 , B41J2/1628 , B41J2/1632 , B41J2/1639 , B81B2203/0315 , B81C2201/0115 , B81C2201/0146
摘要： A method of manufacturing a diaphragm utilising a precision grinding technique after etching a cavity in a wafer. A technique for preventing distortion of the diaphragm based on use of a sacrificial layer of porous silicon is disclosed.
摘要翻译：在蚀刻晶片中的空腔之后利用精密研磨技术制造隔膜的方法。公开了一种基于使用多孔硅牺牲层防止隔膜变形的技术。

9. 发明申请

US20020068430A1 Methods of forming void regions, dielectric regions and capacitor constructions 失效
标题翻译：形成空隙区域，电介质区域和电容器结构的方法
公开(公告)号：US20020068430A1
公开(公告)日：2002-06-06
申请号：US10044206
申请日：2002-01-11
发明人： Jerome Michael Eldridge
IPC分类号： H01L021/76 , H01L021/331
CPC分类号： B81C1/00119 , B81B2203/0315 , B81B2203/0338 , B81C1/00047 , B81C2201/0109 , B81C2201/0146 , H01L21/31138 , H01L28/40
摘要： In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.
摘要翻译：一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。

10. 发明公开

US20240124300A1 CAPLESS SEMICONDUCTOR PACKAGE WITH A MICRO-ELECTROMECHANICAL SYSTEM (MEMS) 审中-公开
公开(公告)号：US20240124300A1
公开(公告)日：2024-04-18
申请号：US18397930
申请日：2023-12-27
申请人： STMicroelectronics, Inc.
发明人： Jefferson Sismundo TALLEDO
IPC分类号： B81C1/00 , B81B7/00
CPC分类号： B81C1/00309 , B81B7/0061 , B81B2201/0264 , B81B2201/0278 , B81B2207/012 , B81B2207/07 , B81C2201/0108 , B81C2201/0143 , B81C2201/0146
摘要： A semiconductor package that contains an application-specific integrated circuit (ASIC) die and a micro-electromechanical system (MEMS) die. The MEMS die and the ASIC die are coupled to a substrate that includes an opening that extends through the substrate and is in fluid communication with an air cavity positioned between and separating the MEMS die from the substrate. The opening exposes the air cavity to an external environment and, following this, the air cavity exposes a MEMS element of the MEMS die to the external environment. The air cavity separating the MEMS die from the substrate is formed with a method of manufacturing that utilizes a thermally decomposable die attach material.

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