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    • 3. 发明申请
    • Low profile optoelectronic device package
    • 薄型光电器件封装
    • US20110057216A1
    • 2011-03-10
    • US12584779
    • 2009-09-10
    • Ming-Kuen ChiuChin-Ta FanChien-Cheng WeiPaul Panaccione
    • Ming-Kuen ChiuChin-Ta FanChien-Cheng WeiPaul Panaccione
    • H01L33/00H01L31/0232
    • H01L31/0203H01L33/54H01L2224/16225H01L2224/48091H01L2224/48247H01L2924/00014
    • A low profile optoelectronic device package has a matalized transparent substrate, a chip and a dam ring. The matalized transparent substrate has a transparent board, a window area, and a metal pattern formed on a face of the transparent board and around the window area and having at least one outer contact pad and at least two contact pads. An active face of the chip is mounted to the at least two inner contact pads and aligned to the window area. A bottom face of the chip, that is opposite to the active face is further added a soldering layer. The dam ring is sealed a joint between the chip and the matalized transparent substrate so as to define an air cavity among the chip, the matalized transparent substrate and the dam ring. The matalized transparent substrate is used as a substrate and an optical cover of a conventional device package, so the optoelectronic device package provides low profile, small area outline, low fabricating cost and high lighting efficiency.
    • 薄型光电子器件封装具有成熟的透明衬底,芯片和坝环。 成熟的透明基板具有透明板,窗口区域和形成在透明板的表面上并且在窗口区域周围的金属图案,并且具有至少一个外部接触垫和至少两个接触垫。 芯片的主动面被安装到至少两个内部接触垫并与窗口区域对准。 芯片的与有源面相反的底面进一步添加了焊接层。 该密封环密封在芯片和金属化的透明基板之间的接头,以便在芯片,成熟的透明基板和坝环之间形成空气腔。 成熟的透明基板用作传统器件封装的基板和光学盖,因此光电子器件封装提供低轮廓,小面积轮廓,低制造成本和高照明效率。
    • 8. 发明授权
    • Method of fabricating a thin film integrated circuit with thick film resistors
    • 用厚膜电阻制造薄膜集成电路的方法
    • US07100270B2
    • 2006-09-05
    • US10670416
    • 2003-09-25
    • Shao-Pin Ru
    • Shao-Pin Ru
    • H01C17/00
    • H05K1/167H05K1/092H05K3/108H05K3/388H05K2203/1461Y10T29/49082Y10T29/49117Y10T29/49124Y10T29/49155Y10T29/49174Y10T29/49194Y10T29/49204
    • A method of fabricating printed circuit boards integrating thick film resistor components and thin film circuit portions thereon is disclosed. This is a two-phase process, where the first phase is to create multiple thick film resistors, and the second phase is to create a thin film circuit portion on the substrate with thick film resistors in existence, involving the printing of the electrodes and the resistive coating for the thick film resistors, and the printing of a low temperature passivation layer over the resistors; and the thin film circuit is formed by titanium and copper layers over the substrate, and electroplating of interconnections to form copper plated circuit. The present fabrication process does not require drilling of holes nor electroplating of leads to the resistors, thus the whole process can be automated to a greater extent than with conventional techniques.
    • 公开了一种制造集成厚膜电阻器部件和薄膜电路部分的印刷电路板的方法。 这是一个两相工艺,其中第一阶段是制造多个厚膜电阻器,第二阶段是在存在厚膜电阻器的基板上产生薄膜电路部分,其中包括电极的印刷和 用于厚膜电阻器的电阻涂层,以及在电阻器上印刷低温钝化层; 并且薄膜电路由衬底上的钛和铜层形成,并且互连电镀形成镀铜电路。 本制造工艺不需要钻孔或将电极电镀到电阻器上,因此与常规技术相比,整个过程可以更大程度地自动化。
    • 10. 发明申请
    • Thin film circuit integrating thick film resistors thereon
    • 在其上集成厚膜电阻器的薄膜电路
    • US20060096780A1
    • 2006-05-11
    • US11312730
    • 2005-12-20
    • Shao-Pin Ru
    • Shao-Pin Ru
    • H05K1/16
    • H05K1/167H05K1/092H05K3/108H05K3/388H05K2203/1461Y10T29/49082Y10T29/49117Y10T29/49124Y10T29/49155Y10T29/49174Y10T29/49194Y10T29/49204
    • A method of fabricating printed circuit boards integrating thick film resistor components and thin film circuit portions thereon is disclosed. This is a two-phase process, where the first phase is to create multiple thick film resistors, and the second phase is to create a thin film circuit portion on the substrate with thick film resistors in existence, involving the printing of the electrodes and the resistive coating for the thick film resistors, and the printing of a low temperature passivation layer over the resistors; and the thin film circuit is formed by titanium and copper layers over the substrate, and electroplating of interconnections to form copper plated circuit. The present fabrication process does not require drilling of holes nor electroplating of leads to the resistors, thus the whole process can be automated to a greater extent than with conventional techniques.
    • 公开了一种制造集成厚膜电阻器部件和薄膜电路部分的印刷电路板的方法。 这是一个两相工艺,其中第一阶段是制造多个厚膜电阻器,第二阶段是在存在厚膜电阻器的基板上产生薄膜电路部分,其中包括电极的印刷和 用于厚膜电阻器的电阻涂层,以及在电阻器上印刷低温钝化层; 并且薄膜电路由衬底上的钛和铜层形成,并且互连电镀形成镀铜电路。 本制造工艺不需要钻孔或将电极电镀到电阻器上,因此与常规技术相比,整个过程可以更大程度地自动化。