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    • 3. 发明授权
    • Register robustness improvement circuit and method
    • 注册鲁棒性改进电路和方法
    • US4959836A
    • 1990-09-25
    • US130850
    • 1987-12-09
    • Paul M. BerardAjaib S. Bhadare
    • Paul M. BerardAjaib S. Bhadare
    • G06F11/00G06F11/14G06F11/16
    • G06F11/167G06F11/14G06F11/1625G06F11/00G06F11/0796
    • The present invention describes a robust register circuit for protecting critical control points in data transmission and telecommunications equipment against software included failures. A circuit is provided wherein duplicated data words are written into a pair of registers of any desired bit length. A digital comparator determines whether the two data words are the same, and initiates a data transfer into a third register for transmission to critical hardware control points only when two identical sequential data words are recognized. When no such recognition occurs, new data is not transferred to the third register, and the hardware control points remain controlled by the previous data in the third register.
    • 本发明描述了一种鲁棒的寄存器电路,用于保护数据传输和电信设备中的关键控制点免受包括软件的故障的影响。 提供了一种电路,其中复制的数据字被写入任何所需位长度的一对寄存器中。 数字比较器确定两个数据字是否相同,并且只有当识别出两个相同的顺序数据字时,才将数据传输发送到第三个寄存器以传输到关键的硬件控制点。 当不发生这种识别时,新的数据不会传送到第三个寄存器,并且硬件控制点由第三个寄存器中的先前数据保持控制。
    • 5. 发明授权
    • Digital activity loss detector
    • 数字活动损失检测器
    • US4887071A
    • 1989-12-12
    • US233702
    • 1988-08-18
    • Nirmal S. Virdee
    • Nirmal S. Virdee
    • G06F11/00
    • G06F11/0751
    • A digital activity detection circuit is provided for monitoring digital input signals such as telecommunications DS1 or DS2 signals, and for generating an alarm when a predetermined input signal loss threshold is reached, such that the input signal loss threshold does not vary with temperature, with component value or with power supply variations. Precise resolution and simplified hardware are achieved in a novel arrangement of counters in the signal activity detector to determine the resolution and signal loss threshold of the detector, all in a digital arrangement without the use of analog devices or retriggerable monostable multivibrators, and in an ASIC fabricable integrated circuit technology such as CMOS.
    • 提供了数字活动检测电路,用于监视诸如电信DS1或DS2信号的数字输入信号,并且当达到预定的输入信号损失阈值时产生报警,使得输入信号损失阈值不随温度变化, 价值或电源变化。 在信号活动检测器中的计数器的新颖布置中实现了精确的分辨率和简化的硬件,以确定检测器的分辨率和信号损耗阈值,所有这些都不需要使用模拟设备或可再触发单稳态多谐振荡器,而在ASIC中 可编程集成电路技术如CMOS。
    • 6. 发明授权
    • High resolution digital phase-lock loop circuit
    • 高分辨率数字锁相环电路
    • US4847870A
    • 1989-07-11
    • US125523
    • 1987-11-25
    • James S. Butcher
    • James S. Butcher
    • H03L7/081H04L7/033
    • H03L7/0814H04L7/0337
    • A high resolution digital phase-lock loop circuit is described, which is implemented with an input clock reference frequency which is approximately the same as the output frequency of the phase-lock loop. The output is derived from delaying the input clock a variable number of gate delays ranging from no delay to one period of the input clock. A shift register controls the number of gate delays and a 360 degree phase detector initializes the shift register when the output is delayed by one period of the input clock to provide no delay. Gate delay variations due to integrated circuit process, voltage and temperature are compensated for to provide a relatively constant clock phase correction.
    • 描述了一种高分辨率数字锁相环电路,其以与锁相环的输出频率近似相同的输入时钟参考频率来实现。 该输出是从输入时钟延迟输入时钟的无延迟到一个周期的可变数量的门延迟导出的。 移位寄存器控制门延迟的数量,当输出延迟输入时钟的一个周期时,360度相位检测器初始化移位寄存器,以提供延迟。 由于集成电路过程,电压和温度导致的门延迟变化被补偿以提供相对恒定的时钟相位校正。
    • 8. 发明授权
    • Non-intrusive fiber optic electromagnetic field probe apparatus and
associated methods
    • 非侵入式光纤电磁场探头设备及相关方法
    • US4928067A
    • 1990-05-22
    • US286545
    • 1988-12-19
    • Paul U. Lind
    • Paul U. Lind
    • G01R1/07G01R33/028
    • G01R33/028G01R1/07
    • A probe tip is employed to measure electromagnetic fields without the use of a metallic conducting wire or cable which would otherwise distort the field being measured. The probe tip includes a variety of different circuits, each of which contains a separate battery, a powered field measurement sensor and an amplifier. A light source, which is internal to the probe tip and coupled to the amplifier, operates to convert the measured field to an analog optical signal. The analog optical signal is transmitted via an optical fiber to a receiver/preamplifier circuit which converts the optical signal to an electrical signal at the fiber's far end. This receiver/preamplifier device can be coupled directly to an oscilloscope or other instrument which are employed and used for the display or recording the magnitude of the electromagnetic field as measured by the probe.
    • 探针尖端用于测量电磁场,而不使用金属导线或电缆,否则会导致测量场的变形。 探针尖端包括各种不同的电路,每个电路都包含单独的电池,电源场测量传感器和放大器。 探针尖端内部并耦合到放大器的光源用于将测量的场转换成模拟光信号。 模拟光信号通过光纤传输到接收器/前置放大器电路,该电路将光信号转换为光纤远端的电信号。 该接收器/前置放大器装置可以直接耦合到示波器或其他仪器,这些仪器被用于显示或记录由探头测量的电磁场的大小。
    • 10. 发明授权
    • High speed digital counter slip control circuit
    • 高速数字计数器滑差控制电路
    • US4780896A
    • 1988-10-25
    • US012513
    • 1987-02-09
    • Berton E. Dotter, Jr.
    • Berton E. Dotter, Jr.
    • H03K23/66H03K21/40H03K23/40H03L7/00
    • H03K23/667
    • A counter slip control circuit is described for digital transmission systems wherein the counter uses a feedback circuit to define the permissible counter states. The slip control input modifies the feedback function so that certain counter states are either repeated or skipped. A repeated counter state is equivalent to retardation of the counter output signal phase. A skipped counter state is equivalent to advancing the counter output signal phase. The slip control gate is eliminated from the clock input line to the counter and instead is included in the feedback path which eliminates the skew problem and permits the equivalent of adding clock pulses without the requirement for logic speeds of twice the normal clock speed.
    • 对于数字传输系统描述了一种反向滑移控制电路,其中计数器使用反馈电路来定义允许的计数器状态。 滑差控制输入修改反馈功能,使某些计数器状态重复或跳过。 重复的计数器状态等效于计数器输出信号相位的延迟。 跳过的计数器状态等于推进计数器输出信号相位。 滑差控制栅极从计时器的时钟输入线消除,而不是包含在反馈路径中,消除了偏斜问题,并允许等效于添加时钟脉冲,而不需要正常时钟速度的两倍的逻辑速度。