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1. 发明授权

US08225148B2 Systems and methods for achieving higher coding rate using parity interleaving 有权
标题翻译：使用奇偶交织实现更高编码率的系统和方法
公开(公告)号：US08225148B2
公开(公告)日：2012-07-17
申请号：US13112915
申请日：2011-05-20
申请人： Heng Tang , Gregory Burd , Zining Wu , Panu Chaichanavong
发明人： Heng Tang , Gregory Burd , Zining Wu , Panu Chaichanavong
IPC分类号： G06F11/00 , H03M13/00
CPC分类号： G11B20/1423 , H03M5/145
摘要： The disclosed technology provides systems and methods for encoding data based on a run-length-limited code and an error correction code to provide codewords. The codewords include RLL-encoded data that are produced based on the RLL code, and parity information that are produced based on the error correction code. The parity information is interleaved among the RLL-encoded data. In one embodiment, the codeword is produced by separately producing the RLL-encoded data and the parity information, and interleaving the parity information among the RLL-encoded data. In one embodiment, the codeword is produced by producing the RLL-encoded data, and using erasure decoding to compute the parity information.
摘要翻译：所公开的技术提供了基于游程长度限制代码和纠错码来编码数据以提供码字的系统和方法。码字包括基于RLL码产生的RLL编码数据和基于纠错码产生的奇偶校验信息。奇偶校验信息在RLL编码数据之间进行交织。在一个实施例中，通过分别产生RLL编码数据和奇偶校验信息，以及在RLL编码数据之间交织奇偶校验信息来产生码字。在一个实施例中，通过产生RLL编码数据并使用擦除解码来计算奇偶校验信息来产生码字。

2. 发明授权

US08086945B1 Tensor product codes containing an iterative code 有权
标题翻译：包含迭代代码的产品代码
公开(公告)号：US08086945B1
公开(公告)日：2011-12-27
申请号：US12946112
申请日：2010-11-15
申请人： Jun Xu , Panu Chaichanavong , Gregory Burd , Zining Wu
发明人： Jun Xu , Panu Chaichanavong , Gregory Burd , Zining Wu
IPC分类号： G06F11/00
CPC分类号： H03M13/2933 , H03M13/2909 , H03M13/2948
摘要： Systems and methods are provided for encoding a stream of datawords based on a tensor product code to provide a stream of codewords, and detecting and decoding a stream of received data based on a tensor product code to provide a decoded stream of data. In one aspect, the tensor product code is based on two codes including an inner code and an outer parity hiding code, where the outer parity hiding code is an iterative code. In certain embodiments, the outer parity hiding code is a Turbo code or a low density parity check (LDPC) code.
摘要翻译：提供了系统和方法，用于基于张量产品代码来编码数据词流，以提供码字流，并且基于张量产品代码检测和解码接收到的数据流，以提供经解码的数据流。在一个方面，张量乘积代码基于两个代码，包括内部代码和外部奇偶校验隐藏代码，其中外部奇偶校验隐藏代码是迭代代码。在某些实施例中，外部奇偶校验隐藏代码是Turbo码或低密度奇偶校验（LDPC）码。

3. 发明授权

US07934143B1 Parity insertion for inner architecture 有权
标题翻译：内部架构的奇偶校验插入
公开(公告)号：US07934143B1
公开(公告)日：2011-04-26
申请号：US11789334
申请日：2007-04-24
申请人： Zining Wu , Panu Chaichanavong , Gregory Burd
发明人： Zining Wu , Panu Chaichanavong , Gregory Burd
IPC分类号： G11C29/00
CPC分类号： H03M13/2945 , G11B20/1426 , G11B20/1833 , G11B2020/1222 , G11B2020/1836 , G11B2020/185 , G11B2020/1853 , G11B2020/1856 , G11B2220/2516 , G11B2220/2562 , H03M5/145 , H03M13/2906 , H03M13/31
摘要： A coding system for digital data includes a constrained encoder module that generates encoded data based on a first constrained code, a bit insertion module that inserts at least one bit location in the encoded data, an error correcting code (ECC) encoder module that generates ECC parity bits based on the at least one bit location and the encoded data, and an inner encoding module that generates inner-code parity bits based on the encoded data and programs the inner-code parity bits into the at least one bit location.
摘要翻译：一种用于数字数据的编码系统包括：受限编码器模块，其基于第一约束码生成编码数据，在编码数据中插入至少一个比特位置的比特插入模块，产生ECC的纠错码（ECC）编码器模块基于所述至少一个比特位置和所述编码数据的奇偶校验位，以及内部编码模块，其基于所述编码数据生成内部码奇偶校验位并将所述内部码奇偶校验位编程到所述至少一个比特位置。

4. 发明授权

US08255764B1 Embedded parity coding for data storage 有权
标题翻译：用于数据存储的嵌入式奇偶编码
公开(公告)号：US08255764B1
公开(公告)日：2012-08-28
申请号：US11827206
申请日：2007-07-11
申请人： Engling Yeo , Eugene Pan , Henri Sutioso , Jun Xu , Shaohua Yang , Panu Chaichanavong , Gregory Burd , Zining Wu
发明人： Engling Yeo , Eugene Pan , Henri Sutioso , Jun Xu , Shaohua Yang , Panu Chaichanavong , Gregory Burd , Zining Wu
IPC分类号： H03M13/00
CPC分类号： H03M13/6362 , H03M5/145 , H03M13/1128 , H03M13/116 , H03M13/1515 , H03M13/2906 , H03M13/2915 , H03M13/31 , H03M13/6343
摘要： A decoder system comprises a tensor-product code (TPC) decoder that decodes a received data stream to generate a decoded signal. A mark module that replaces low-density parity check (LDPC) parity bits of the decoded signal with 0s to generate a reset output signal. A deinterleave module deinterleaves error correction parity bits that are within the reset output signal to generate a deinterleaved signal that comprises a decoded portion and a concatenated portion. The concatenated portion comprises the error correction parity bits. A parity decoder module removes the concatenated portion from the deinterleaved signal.
摘要翻译：解码器系统包括对接收的数据流进行解码以产生解码信号的张量乘积码（TPC）解码器。标记模块，用0替换解码信号的低密度奇偶校验位（LDPC）奇偶校验位，以产生复位输出信号。解交织模块对位于复位输出信号内的错误校正奇偶校验位进行解交织，以生成包含解码部分和级联部分的去交错信号。连接部分包括纠错奇偶校验位。奇偶校验解码器模块从去交织的信号中去除级联部分。

5. 发明授权

US08015224B1 Entropy source for random number generation 有权
标题翻译：随机数生成的熵源
公开(公告)号：US08015224B1
公开(公告)日：2011-09-06
申请号：US11949487
申请日：2007-12-03
申请人： Panu Chaichanavong , Tze Lei Poo , Zining Wu , Saeed Azimi , Gregory Burd
发明人： Panu Chaichanavong , Tze Lei Poo , Zining Wu , Saeed Azimi , Gregory Burd
IPC分类号： G06F7/58
CPC分类号： G06F7/588 , H04L9/0861
摘要： In a device having a data channel, in which random numbers are needed, such as a data storage device that uses random numbers to generate keys for cryptographic applications, random numbers are generated by a deterministic random bit generator seeded by bits derived from noise on the channel itself. The bits may be extracted from the least significant bits of the data signal after it is digitized, because those bits correspond to the noise in the signal. The extraction may occur immediately after digitization, or after subsequent filtering. A data signal emulator may be provided to simulate a data signal if a seed is required at a time when there is no data activity on the channel. The extracted bits may be post-processed to remove bias before the seed is provided to the deterministic random bit generator.
摘要翻译：在具有需要随机数的数据信道的装置中，例如使用随机数生成加密应用密钥的数据存储装置，随机数是由确定性随机比特发生器产生的，该确定性随机比特发生器由频道本身。在数字信号被数字化之后，可以从数据信号的最低有效位中提取位，因为这些位对应于信号中的噪声。提取可能在数字化后立即进行，或在后续过滤之后发生。如果在通道上没有数据活动的时候需要种子，则可以提供数据信号仿真器来模拟数据信号。提取的比特可以在将种子提供给确定性随机比特发生器之前进行后处理以去除偏差。

6. 发明授权

US07962827B2 Systems and methods for achieving higher coding rate using parity interleaving 有权
标题翻译：使用奇偶交织实现更高编码率的系统和方法
公开(公告)号：US07962827B2
公开(公告)日：2011-06-14
申请号：US11589532
申请日：2006-10-30
申请人： Heng Tang , Gregory Burd , Zining Wu , Panu Chaichanavong
发明人： Heng Tang , Gregory Burd , Zining Wu , Panu Chaichanavong
IPC分类号： H03M13/00
CPC分类号： G11B20/1423 , H03M5/145
摘要： The disclosed technology provides systems and methods for encoding data based on a run-length-limited code and an error correction code to provide codewords. The codewords include RLL-encoded data that are produced based on the RLL code, and parity information that are produced based on the error correction code. The parity information is interleaved among the RLL-encoded data. In one embodiment, the codeword is produced by separately producing the RLL-encoded data and the parity information, and interleaving the parity information among the RLL-encoded data. In one embodiment, the codeword is produced by producing the RLL-encoded data, and using erasure decoding to compute the parity information.
摘要翻译：所公开的技术提供了基于游程长度限制代码和纠错码来编码数据以提供码字的系统和方法。码字包括基于RLL码产生的RLL编码数据和基于纠错码产生的奇偶校验信息。奇偶校验信息在RLL编码数据之间进行交织。在一个实施例中，通过分别产生RLL编码数据和奇偶校验信息，以及在RLL编码数据之间交织奇偶校验信息来产生码字。在一个实施例中，通过产生RLL编码数据并使用擦除解码来计算奇偶校验信息来产生码字。

7. 发明授权

US07861131B1 Tensor product codes containing an iterative code 有权
标题翻译：包含迭代代码的产品代码
公开(公告)号：US07861131B1
公开(公告)日：2010-12-28
申请号：US11449066
申请日：2006-06-07
申请人： Jun Xu , Panu Chaichanavong , Gregory Burd , Zining Wu
发明人： Jun Xu , Panu Chaichanavong , Gregory Burd , Zining Wu
IPC分类号： H03M13/00
CPC分类号： H03M13/2933 , H03M13/2909 , H03M13/2948
摘要： Systems and methods are provided for encoding a stream of datawords based on a tensor product code to provide a stream of codewords, and detecting and decoding a stream of received data based on a tensor product code to provide a decoded stream of data. In one aspect, the tensor product code is based on two codes including an inner code and an outer parity hiding code, where the outer parity hiding code is an iterative code. In certain embodiments, the outer parity hiding code is a Turbo code or a low density parity check (LDPC) code.
摘要翻译：提供了系统和方法，用于基于张量产品代码来编码数据词流，以提供码字流，并且基于张量产品代码检测和解码接收到的数据流，以提供经解码的数据流。在一个方面，张量乘积代码基于两个代码，包括内部代码和外部奇偶校验隐藏代码，其中外部奇偶校验隐藏代码是迭代代码。在某些实施例中，外部奇偶校验隐藏代码是Turbo码或低密度奇偶校验（LDPC）码。

8. 发明申请

US20070226582A1 Systems and methods for achieving higher coding rate using parity interleaving 有权
标题翻译：使用奇偶交织实现更高编码率的系统和方法
公开(公告)号：US20070226582A1
公开(公告)日：2007-09-27
申请号：US11589532
申请日：2006-10-30
申请人： Heng Tang , Gregory Burd , Zining Wu , Panu Chaichanavong
发明人： Heng Tang , Gregory Burd , Zining Wu , Panu Chaichanavong
IPC分类号： H03M13/00
CPC分类号： G11B20/1423 , H03M5/145
摘要： The disclosed technology provides systems and methods for encoding data based on a run-length-limited code and an error correction code to provide codewords. The codewords include RLL-encoded data that are produced based on the RLL code, and parity information that are produced based on the error correction code. The parity information is interleaved among the RLL-encoded data. In one embodiment, the codeword is produced by separately producing the RLL-encoded data and the parity information, and interleaving the parity information among the RLL-encoded data. In one embodiment, the codeword is produced by producing the RLL-encoded data, and using erasure decoding to compute the parity information.
摘要翻译：所公开的技术提供了基于游程长度限制代码和纠错码来编码数据以提供码字的系统和方法。码字包括基于RLL码产生的RLL编码数据和基于纠错码产生的奇偶校验信息。奇偶校验信息在RLL编码数据之间进行交织。在一个实施例中，通过分别产生RLL编码数据和奇偶校验信息，以及在RLL编码数据之间交织奇偶校验信息来产生码字。在一个实施例中，通过产生RLL编码数据并使用擦除解码来计算奇偶校验信息来产生码字。

9. 发明授权

US08543886B1 Parity insertion for inner architecture 失效
标题翻译：内部架构的奇偶校验插入
公开(公告)号：US08543886B1
公开(公告)日：2013-09-24
申请号：US13422364
申请日：2012-03-16
申请人： Zining Wu , Panu Chaichanavong , Gregory Burd
发明人： Zining Wu , Panu Chaichanavong , Gregory Burd
IPC分类号： H03M13/00
CPC分类号： H03M13/2945 , G11B20/1426 , G11B20/1833 , G11B2020/1222 , G11B2020/1836 , G11B2020/185 , G11B2020/1853 , G11B2020/1856 , G11B2220/2516 , G11B2220/2562 , H03M5/145 , H03M13/2906 , H03M13/31
摘要： A coding system for digital data. The coding system includes a constrained encoder module configured to generate encoded data based on a first constrained code; a bit insertion module configured to insert at least one bit location in the encoded data; and an inner encoding module configured to (i) generate inner-code parity bits based on the encoded data, and (ii) program the inner-code parity bits into the at least one bit location.
摘要翻译：数字数据编码系统。编码系统包括被配置为基于第一约束码产生编码数据的约束编码器模块; 配置成在编码数据中插入至少一个位位置的位插入模块; 以及内部编码模块，其被配置为（i）基于所述编码数据生成内部码奇偶校验位，以及（ii）将所述内部码奇偶校验位编程到所述至少一个比特位置中。

10. 发明授权

US08230312B1 Iterative decoder memory arrangement 有权
标题翻译：迭代解码器存储器布置
公开(公告)号：US08230312B1
公开(公告)日：2012-07-24
申请号：US12350885
申请日：2009-01-08
申请人： Engling Yeo , Panu Chaichanavong , Nedeljko Varnica , Gregory Burd , Zining Wu
发明人： Engling Yeo , Panu Chaichanavong , Nedeljko Varnica , Gregory Burd , Zining Wu
IPC分类号： H03M13/03
CPC分类号： H03M13/1117 , H03M13/114 , H03M13/116 , H03M13/2957 , H03M13/4138 , H03M13/6325 , H03M13/6343 , H03M13/6561
摘要： The present disclosure includes apparatus, systems and techniques relating to iterative decoder memory arrangement. In some implementations, an apparatus includes a memory module to communicate with an iterative code decoder. The memory module includes a single R memory component to store R data associated with a current codeword, and R data associated with a previous codeword. The memory module includes a Q memory component to store Q data associated with the current codeword, and Q data associated with the previous codeword. The memory module includes a channel detector memory component to store channel extrinsic information.
摘要翻译：本公开包括与迭代解码器存储器布置相关的装置，系统和技术。在一些实现中，装置包括与迭代码解码器通信的存储器模块。存储器模块包括用于存储与当前码字相关联的R数据的单个R存储器组件和与先前码字相关联的R数据。存储器模块包括用于存储与当前码字相关联的Q数据的Q存储器组件和与先前码字相关联的Q数据。存储器模块包括用于存储信道外在信息的信道检测器存储器组件。

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