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    • 8. 发明授权
    • Thin-film transistor and method of producing the same
    • 薄膜晶体管及其制造方法
    • US06613618B1
    • 2003-09-02
    • US09542200
    • 2000-04-04
    • Shiro NakanishiTsutomu Yamada
    • Shiro NakanishiTsutomu Yamada
    • H01L2184
    • H01L29/66757H01L29/66765H01L29/78675H01L29/78678
    • A thin-film transistor is provided in which the thickness of the insulating film is optimized. A gate electrode is formed on a transparent substrate. A silicon nitride film and a silicon oxide film, acting as a gate insulating film, are formed over the transparent substrate. A polycrystalline silicon film, being a semiconductor film, is formed acting as an active region. A stopper is formed on the polycrystalline silicon film corresponding to the gate electrode. A silicon oxide film and a silicon nitride film, acting as an interlayer insulating film, are deposited as to cover the stopper region. The total film thickness T1 of the stopper and the silicon oxide film is formed to be thinner than (the thickness T2 of the silicon nitride film×8000 Å)½. This structure allows hydrogen atoms to be sufficiently supplied from the silicon nitride film into the polycrystalline silicon film via the stopper and the silicon oxide film, so that crystalline defects in the polycrystalline silicon film can be filled with the hydrogen atoms.
    • 提供了薄膜晶体管,其中绝缘膜的厚度被优化。 在透明基板上形成栅电极。 在透明基板上形成用作栅极绝缘膜的氮化硅膜和氧化硅膜。 作为半导体膜的多晶硅膜被形成为起主动区域的作用。 在与栅电极相对应的多晶硅膜上形成止动件。 作为层间绝缘膜的氧化硅膜和氮化硅膜被沉积以覆盖阻挡区域。 阻挡层和氧化硅膜的总膜厚T1形成为比(氮化硅膜的厚度T2)薄。 这种结构使得氢原子能够通过阻挡层和氧化硅膜从氮化硅膜充分供给到多晶硅膜中,从而可以用氢原子填充多晶硅膜中的晶体缺陷。
    • 9. 发明授权
    • Thin film transistor having a stopper layer
    • 具有阻挡层的薄膜晶体管
    • US06191452B1
    • 2001-02-20
    • US09162836
    • 1998-09-29
    • Nobuhiko OdaShiro NakanishiShinji YudaTsutomu Yamada
    • Nobuhiko OdaShiro NakanishiShinji YudaTsutomu Yamada
    • H01L2900
    • H01L29/66765H01L29/78636
    • On a transparent substrate to which a gate electrode is arranged, a silicon nitride film and a silicon oxide film to be gate insulating films are deposited, and further, a polycrystalline silicon film as a semiconductor film to be an active region is formed. On the polycrystalline silicon film corresponding to the gate electrode, a stopper is arranged, and a silicon oxide film and a silicon nitride film to be an interlayer insulating films are deposited so as to cover this stopper. The film thickness T0 of the stopper is set in a range of 800 angstroms to 1200 angstroms. Furthermore, the film thickness T0 of the stopper is set in the range to fulfill the following expression: T0+T1≦(T2×8000 Å)½ where T1 is the film thickness of the silicon oxide film and T2 is the film thickness of the silicon nitride film.
    • 在配置有栅电极的透明基板上,淀积作为栅绝缘膜的氮化硅膜和氧化硅膜,形成作为有源区的半导体膜的多晶硅膜。 在对应于栅电极的多晶硅膜上,设置有阻挡层,并且沉积作为层间绝缘膜的氧化硅膜和氮化硅膜以覆盖该阻挡层。 挡块的膜厚度T0设定在800〜1200埃的范围内。 此外,阻挡层的膜厚度T0设定在满足以下表达式的范围内:其中,T1是氧化硅膜的膜厚度,T2是氮化硅膜的膜厚度。