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1. 发明授权

US09330960B2 Semiconductor devices including capacitors 有权
标题翻译：半导体器件包括电容器
公开(公告)号：US09330960B2
公开(公告)日：2016-05-03
申请号：US14296850
申请日：2014-06-05
申请人： Young-Seung Cho , Sung-Eui Kim , Ji-Young Kim , Hoon Jeong , Chan-Won Kim , Jong-Bom Seo , Seung-Jun Lee , Jun-Soo Lee
发明人： Young-Seung Cho , Sung-Eui Kim , Ji-Young Kim , Hoon Jeong , Chan-Won Kim , Jong-Bom Seo , Seung-Jun Lee , Jun-Soo Lee
IPC分类号： H01L21/00 , H01L21/764 , H01L49/02 , H01L27/108
CPC分类号： H01L28/88 , H01L21/764 , H01L27/10808 , H01L27/10811 , H01L27/10852 , H01L27/10894 , H01L28/90
摘要： A semiconductor device includes a first capacitor structure, a second capacitor structure, and an insulation pattern. The first capacitor structure includes a first lower electrode, a first dielectric layer and a first upper electrode sequentially stacked on a substrate. The second capacitor structure includes a second lower electrode, a second dielectric layer and a second upper electrode sequentially stacked on the substrate, and is adjacent to the first capacitor structure. The insulation pattern partially fills a space between the first and second capacitor structures, and an air gap is formed between the first and second capacitor structures on the insulation pattern.
摘要翻译：半导体器件包括第一电容器结构，第二电容器结构和绝缘图案。第一电容器结构包括顺序堆叠在基板上的第一下电极，第一电介质层和第一上电极。第二电容器结构包括第二下电极，第二电介质层和顺序堆叠在基板上并与第一电容器结构相邻的第二上电极。绝缘图案部分地填充第一和第二电容器结构之间的空间，并且在绝缘图案上的第一和第二电容器结构之间形成气隙。

2. 发明申请

US20140361403A1 SEMICONDUCTOR DEVICES INCLUDING CAPACITORS 有权
标题翻译：包括电容器的半导体器件
公开(公告)号：US20140361403A1
公开(公告)日：2014-12-11
申请号：US14296850
申请日：2014-06-05
申请人： Young-Seung Cho , Sung-Eui Kim , Ji-Young Kim , Hoon Jeong , Chan-Won Kim , Jong-Bom Seo , Seung-Jun Lee , Jun-Soo Lee
发明人： Young-Seung Cho , Sung-Eui Kim , Ji-Young Kim , Hoon Jeong , Chan-Won Kim , Jong-Bom Seo , Seung-Jun Lee , Jun-Soo Lee
IPC分类号： H01L49/02
CPC分类号： H01L28/88 , H01L21/764 , H01L27/10808 , H01L27/10811 , H01L27/10852 , H01L27/10894 , H01L28/90
摘要： A semiconductor device includes a first capacitor structure, a second capacitor structure, and an insulation pattern. The first capacitor structure includes a first lower electrode, a first dielectric layer and a first upper electrode sequentially stacked on a substrate. The second capacitor structure includes a second lower electrode, a second dielectric layer and a second upper electrode sequentially stacked on the substrate, and is adjacent to the first capacitor structure. The insulation pattern partially fills a space between the first and second capacitor structures, and an air gap is formed between the first and second capacitor structures on the insulation pattern.
摘要翻译：半导体器件包括第一电容器结构，第二电容器结构和绝缘图案。第一电容器结构包括顺序堆叠在基板上的第一下电极，第一电介质层和第一上电极。第二电容器结构包括第二下电极，第二电介质层和顺序堆叠在基板上并与第一电容器结构相邻的第二上电极。绝缘图案部分地填充第一和第二电容器结构之间的空间，并且在绝缘图案上的第一和第二电容器结构之间形成气隙。

3. 发明授权

US09287270B2 Semiconductor device and fabricating method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US09287270B2
公开(公告)日：2016-03-15
申请号：US14279301
申请日：2014-05-15
申请人： Jung-Hwan Oh , Hyun-Jun Kim , Jong-Bom Seo , Ki-Vin Im , Han-Jin Lim
发明人： Jung-Hwan Oh , Hyun-Jun Kim , Jong-Bom Seo , Ki-Vin Im , Han-Jin Lim
IPC分类号： H01L27/108 , H01L49/02
CPC分类号： H01L27/10805 , H01L27/10808 , H01L27/1085 , H01L28/91
摘要： Provided are a semiconductor device and a fabricating method thereof. The semiconductor device includes a storage electrode having a cylinder shape, a dielectric film formed on the storage electrode, and a plate electrode formed on the dielectric film, wherein the plate electrode includes a first semiconductor compound layer and a second semiconductor compound layer sequentially stacked one on the other, and the first semiconductor compound layer has a crystallinity different from that of the second semiconductor compound layer.
摘要翻译：提供一种半导体器件及其制造方法。半导体器件包括具有圆柱形状的存储电极，形成在存储电极上的电介质膜和形成在电介质膜上的平板电极，其中该平板电极包括一个第一半导体化合物层和第二半导体化合物层，另一方面，第一半导体化合物层的结晶度与第二半导体化合物层的结晶度不同。

4. 发明申请

US20080054400A1 Capacitor and method of manufacturing the same 审中-公开
标题翻译：电容器及其制造方法
公开(公告)号：US20080054400A1
公开(公告)日：2008-03-06
申请号：US11878698
申请日：2007-07-26
申请人： Woo-Sung Lee , Hong-Bum Park , Hyun-Jin Shin , Jong-Bom Seo
发明人： Woo-Sung Lee , Hong-Bum Park , Hyun-Jin Shin , Jong-Bom Seo
IPC分类号： H01L29/92 , H01L21/02
CPC分类号： H01L28/91 , H01L27/10814 , H01L27/10852
摘要： Example embodiments relate to a capacitor including p-type doped silicon germanium and a method of manufacturing the capacitor. The capacitor may include a lower electrode, a dielectric layer, an upper electrode, a barrier layer and a capping layer. The lower electrode may have a cylindrical shape. The dielectric layer may be on the lower electrode. The dielectric layer may have a uniform thickness. The upper electrode may be on the dielectric layer. The upper electrode may have a more uniform thickness. The capping layer may be on the upper electrode. The capping layer may include a silicon germanium layer doped with p-type impurities. The barrier layer may be between the upper electrode and the capping layer to prevent (or reduce) the p-type impurities from infiltrating into the dielectric layer.
摘要翻译：示例性实施例涉及包括p型掺杂硅锗的电容器和制造电容器的方法。电容器可以包括下电极，电介质层，上电极，阻挡层和封盖层。下部电极可以具有圆筒形状。电介质层可以在下电极上。介电层可以具有均匀的厚度。上电极可以在电介质层上。上部电极可以具有更均匀的厚度。覆盖层可以在上电极上。覆盖层可以包括掺杂有p型杂质的硅锗层。阻挡层可以在上电极和覆盖层之间，以防止（或减少）p型杂质渗透到电介质层中。

5. 发明申请

US20110222207A1 Methods of forming a dielectric layer structure, and methods of manufacturing a capacitor using the same 审中-公开
标题翻译：形成电介质层结构的方法，以及使用其形成电容器的方法
公开(公告)号：US20110222207A1
公开(公告)日：2011-09-15
申请号：US13064241
申请日：2011-03-14
申请人： Tae-Jong Lee , Jae-Young Park , Jong-Bom Seo , Seok-Woo Nam , Bong-Hyun Kim , Han-Jin Lim , Seung-Sik Chung
发明人： Tae-Jong Lee , Jae-Young Park , Jong-Bom Seo , Seok-Woo Nam , Bong-Hyun Kim , Han-Jin Lim , Seung-Sik Chung
IPC分类号： H01G4/10 , H01G7/00 , B05D5/12
CPC分类号： H01G4/10 , C23C16/403 , C23C16/405 , C23C16/45529 , C23C16/56 , H01G13/00 , Y10T29/43
摘要： In a method of forming a dielectric layer structure, a precursor thin film chemisorbed on a substrate in a process chamber is formed using a source gas including a metal precursor. The process chamber is purged and pumped out to remove a remaining source gas therein and to remove any metal precursor physisorbed on the precursor thin film. The forming of the precursor thin film and the purging and pumping out of the process chamber are alternately and repeatedly performed to form a multi-layer precursor thin film. An oxidant is provided onto the multilayer precursor thin film to form a bulk oxide layer.
摘要翻译：在形成电介质层结构的方法中，使用包括金属前体的源气体来形成化学吸附在处理室中的衬底上的前体薄膜。将处理室吹扫并抽出以除去其中的剩余源气体并除去在前体薄膜上物理吸附的任何金属前体。交替地重复进行前体薄膜的形成和处理室的清洗和泵送，以形成多层前体薄膜。在多层前体薄膜上提供氧化剂以形成体氧化物层。

6. 发明申请

US20120100687A1 METHODS FOR FABRICATING CAPACITOR AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING THE CAPACITOR 审中-公开
标题翻译：制造电容器的方法和制造包括电容器的半导体器件的方法
公开(公告)号：US20120100687A1
公开(公告)日：2012-04-26
申请号：US13274695
申请日：2011-10-17
申请人： Hanjin Lim , Jong-Bom Seo , Seokwoo Nam , Bonghyun Kim , Yongjae Lee , KiVin Im
发明人： Hanjin Lim , Jong-Bom Seo , Seokwoo Nam , Bonghyun Kim , Yongjae Lee , KiVin Im
IPC分类号： H01L21/02
CPC分类号： H01L28/90 , H01L27/10814 , H01L27/10855
摘要： Example embodiments relate to methods for fabricating a capacitor and methods for fabricating a semiconductor device including the capacitor. The methods for fabricating a capacitor may include forming a preliminary lower electrode with a first area on a substrate; implanting ions in the preliminary lower electrode to form a lower electrode with a second area that is larger or substantially larger than the first area; and forming a dielectric layer and an upper electrode on the lower electrode.
摘要翻译：示例性实施例涉及用于制造电容器的方法和用于制造包括该电容器的半导体器件的方法。制造电容器的方法可以包括在基板上形成具有第一区域的预备下电极; 在所述预备下电极中注入离子以形成具有比所述第一区域更大或显着大的第二区域的下电极; 并在下电极上形成电介质层和上电极。

7. 发明申请

US20100112777A1 METHOD OF FORMING A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：形成半导体器件的方法
公开(公告)号：US20100112777A1
公开(公告)日：2010-05-06
申请号：US12612320
申请日：2009-11-04
申请人： HanJin LIM , Seokwoo Nam , Junghee Chung , KyoungRyul Yoon , Jong-Bom Seo , Jun-Noh Lee , Sunghoon Bae
发明人： HanJin LIM , Seokwoo Nam , Junghee Chung , KyoungRyul Yoon , Jong-Bom Seo , Jun-Noh Lee , Sunghoon Bae
IPC分类号： H01L21/02
CPC分类号： H01L21/0228 , H01L21/02189 , H01L21/02299 , H01L21/3141 , H01L21/31641 , H01L28/91
摘要： A method of forming a semiconductor device includes forming a bottom electrode having a top surface and a side surface on a semiconductor substrate, performing a tilted ion implantation process to supply ions to the top surface of the bottom electrode and to a portion of the side surface of the bottom electrode, and forming a dielectric layer on the bottom electrode. The formation of the dielectric layer is delayed at the ion-supplied top surface of the bottom electrode and the ion-supplied portion of the side surface of the bottom electrode.
摘要翻译：一种形成半导体器件的方法包括：在半导体衬底上形成具有顶表面和侧表面的底电极，执行倾斜离子注入工艺以将离子供应到底电极的顶表面和侧表面的一部分的底部电极，并且在底部电极上形成电介质层。电介质层的形成在底电极的离子供给顶表面和底电极的侧表面的离子供给部分被延迟。

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