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    • 8. 发明申请
    • APPARATUS FOR MANUFACTURING LIQUID SILICON FOAM IN THE FORM OF ROLL
    • 用于制造滚筒形式的液体硅泡沫的装置
    • US20090263525A1
    • 2009-10-22
    • US12520599
    • 2007-12-27
    • Dong-Yun Kim
    • Dong-Yun Kim
    • B28B1/10
    • B29C44/467B29C44/30
    • The present invention relates to an apparatus for manufacturing a roll-type liquid silicone rubber foam having no surface viscosity and a thin film shape with a greatly reduced thickness of 0.2 mm, which is capable of manufacturing a roll-type liquid silicone rubber foam having a predetermined width (300 mm-1,000 mm) in a continuous process useful for mass production. The apparatus includes a first PET film-supplying unit, adapted to supply a first PET film having a predetermined width; a liquid silicone rubber-supplying unit, adapted to apply a liquid silicone rubber containing a foaming agent and a curing agent on a surface of the PET film, which is supplied from the first PET film-supplying unit; a second PET film-supplying unit, adapted to supply a second PET film having no stickiness on the liquid silicone rubber applied to the first PET film, which is transferred from the first PET film-supplying unit through the liquid silicone rubber-supplying unit; a second PET film-recovering unit, adapted to recover the second PET film transferred from the second PET film-supplying unit; a foaming and curing unit, positioned between the second PET film-supplying unit and the second PET film-recovering unit and adapted to foam and cure the liquid silicone rubber disposed between the first PET film and the second PET film and to control a thickness of the liquid silicone rubber which is being foamed; and a liquid silicone rubber foam-take-up unit, adapted to take up the liquid silicone rubber foam as the final product into a roll form, which is transferred from the foaming and curing unit during the recovery of the second PET film into the second PET film-recovering unit.
    • 本发明涉及一种用于制造没有表面粘度和薄膜形状的辊型液体硅橡胶泡沫的装置,其厚度大大减小为0.2mm,其能够制造具有 在大规模生产中有用的连续过程中的预定宽度(300mm-1,000mm)。 该装置包括:第一PET膜供应单元,适于提供具有预定宽度的第一PET膜; 液体硅橡胶供给单元,其适于在从所述第一PET膜供给单元供给的所述PET膜的表面上涂布含有发泡剂和固化剂的液体硅橡胶; 第二PET膜供给单元,其适于在通过液体硅橡胶供给单元从第一PET膜供给单元转移到第一PET膜上的液体硅橡胶上供给无粘性的第二PET膜; 第二PET膜回收单元,用于回收从第二PET膜供给单元转移的第二PET膜; 位于第二PET膜供给单元和第二PET膜回收单元之间的发泡和固化单元,其适于发泡和固化设置在第一PET膜和第二PET膜之间的液体硅橡胶,并且控制 正在发泡的液体硅橡胶; 以及液体硅橡胶泡沫拾取单元,其适于将作为最终产品的液体硅橡胶泡沫吸收成卷状,其在从第二PET膜回收到第二PET膜期间从发泡和固化单元转移 PET膜回收单元。
    • 9. 发明授权
    • System and method for selecting between a high and low speed clock in response to a decoded power instruction
    • 响应于解码的电源指令在高速和低速时钟之间进行选择的系统和方法
    • US06845454B2
    • 2005-01-18
    • US09818888
    • 2001-03-27
    • Dong-Yun Kim
    • Dong-Yun Kim
    • H04L7/00G06F1/04G06F1/32G06F1/26
    • G06F9/30083G06F1/04G06F1/3203G06F1/324G06F1/3278Y02D10/126Y02D10/157
    • A processor clock generation circuit and related method for a low power consumption modem chip design includes a first clock generator for generating a first clock signal in response to enable and disable signals; a second clock generator for generating a second clock signal that is lower in frequency than the first clock signal; a decoder for decoding an externally inputted instruction to check whether the inputted instruction is a power-down instruction or a power-up instruction, and generating control signals; a clock selection unit for, if the instruction is the power-down instruction, outputting the second clock signal as a processor clock signal and outputting a clock change end signal in response to a control signal outputted from the decoder and, if the instruction is the power-up instruction, outputting the first clock signal as the processor clock signal in response to the outputted control signal from the decoder and a first clock wake-up end signal; and a first clock controller for, if the instruction is the power-down instruction, outputting the disable signal for disabling clock generation of the first clock generator in response to the control signal outputted from the decoder and the clock change end signal outputted from the clock selection unit and, if the instruction is the power up instruction, outputting the enable signal for enabling the clock generation of the first clock generator in response to the control signal outputted from the decoder, and outputting the first wake-up end signal after a predetermined time.
    • 一种用于低功耗调制解调器芯片设计的处理器时钟产生电路和相关方法包括:第一时钟发生器,用于响应于使能和禁止信号产生第一时钟信号; 第二时钟发生器,用于产生频率低于所述第一时钟信号的第二时钟信号; 解码器,用于对外部输入的指令进行解码,以检查所输入的指令是否是掉电指令还是上电指令,并产生控制信号; 时钟选择单元,如果指令是掉电指令,则输出第二时钟信号作为处理器时钟信号,并且响应于从解码器输出的控制信号输出时钟转换结束信号,并且如果指令是 上电指令,响应于从解码器输出的控制信号和第一时钟唤醒结束信号,输出第一时钟信号作为处理器时钟信号; 以及第一时钟控制器,用于如果指令是掉电指令,则响应于从解码器输出的控制信号和从时钟输出的时钟改变结束信号输出用于禁止第一时钟发生器的时钟产生的禁止信号 选择单元,并且如果所述指令是所述上电指令,则响应于从所述解码器输出的控制信号,输出用于启用所述第一时钟发生器的时钟生成的使能信号,并且在预定的所述第一唤醒结束信号之后输出所述第一唤醒结束信号 时间。
    • 10. 发明授权
    • Method for manufacturing semiconductor device
    • 制造半导体器件的方法
    • US06723647B1
    • 2004-04-20
    • US09618097
    • 2000-07-17
    • Dong-Yun KimYong-Hyeon Park
    • Dong-Yun KimYong-Hyeon Park
    • H01L21302
    • H01L23/544H01L27/1052H01L2223/54433H01L2223/54453H01L2223/54493H01L2924/0002H01L2924/00
    • A method is disclosed for manufacturing a semiconductor device. Initially, a conductive layer is formed over a cell array region, in which high-integrated devices are formed, and over a non-cell region, which functions to assist a proper formation of the cell array region. An etching mask pattern is then formed over the conductive layer to form a conductive pattern over the cell array region and to remove the conductive layer formed on the non-cell region. The conductive pattern is actually formed by etching the conductive layer. An ion-assisted plasma etching is then implemented to form a pattern on the cell array region. This prevents the generation of arcing caused by independent conductive patterns formed on the non-cell region during the ion-assisted plasma etching.
    • 公开了制造半导体器件的方法。 最初,在形成高集成器件的单元阵列区域上形成导电层,并且在用于辅助电池阵列区域的适当形成的非电池区域上形成导电层。 然后在导电层上形成蚀刻掩模图案,以在单元阵列区域上形成导电图案,并去除在非单元区域上形成的导电层。 导电图案实际上是通过蚀刻导电层形成的。 然后执行离子辅助等离子体蚀刻以在单元阵列区域上形成图案。 这防止了在离子辅助等离子体蚀刻期间由非单元区域上形成的独立导电图案引起的电弧的产生。