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1. 发明授权

US06784055B2 Flash memory device and a method for fabricating the same 有权
标题翻译：闪存装置及其制造方法
公开(公告)号：US06784055B2
公开(公告)日：2004-08-31
申请号：US10418701
申请日：2003-04-18
申请人： You-Cheol Shin , Jong-Woo Park , Jung-Dal Choi
发明人： You-Cheol Shin , Jong-Woo Park , Jung-Dal Choi
IPC分类号： H01L21336
CPC分类号： H01L27/11568 , H01L27/115 , H01L29/792
摘要： A flash memory having a charge-storage dielectric layer and a method for forming the same are provided. According to one embodiment, charge-storage dielectric layers are formed over the first and second active regions. The charge-storage layer over the first active region is not connected to the charge-storage layer over the second active region. A gate line overlies the charge-storage layer and extends across the first and second active regions and the isolation region. The charge-storage layer can be formed only where a gate line intersects an active region of a semiconductor substrate, not on an isolation region. Thus, undesirable influence or disturbance from adjacent memory cells can be avoided.
摘要翻译：提供具有电荷存储介质层的闪速存储器及其形成方法。根据一个实施例，电荷存储电介质层形成在第一和第二有源区上。第一有源区上的电荷存储层在第二有源区上并未连接到电荷存储层。栅极线覆盖电荷存储层并且延伸穿过第一和第二有源区域和隔离区域。电荷存储层只能在栅极线与半导体衬底的有源区相交而不在隔离区上形成。因此，可以避免来自相邻存储单元的不期望的影响或干扰。

2. 发明授权

US06784481B2 Flash memory device with isolation regions and a charge storage dielectric layer formed only on an active region 有权
标题翻译：具有隔离区域的闪存器件和仅在有源区域上形成的电荷存储电介质层
公开(公告)号：US06784481B2
公开(公告)日：2004-08-31
申请号：US10098875
申请日：2002-03-15
申请人： You-Cheol Shin , Jong-Woo Park , Jung-Dal Choi
发明人： You-Cheol Shin , Jong-Woo Park , Jung-Dal Choi
IPC分类号： H01L2976
CPC分类号： H01L27/11568 , H01L27/115 , H01L29/792
摘要： A flash memory having a charge-storage dielectric layer. According to one embodiment, charge-storage dielectric layers are formed over the first and second active regions. The charge-storage layer over the first active region is not connected to the charge-storage layer over the second active region. A gate line overlies the charge-storage layer and extends across the first and second active regions and the isolation region. The charge-storage layer can be formed only where a gate line intersects an active region of a semiconductor substrate, not on an isolation region. Thus, undesirable influence or disturbance from adjacent memory cells can be avoided.
摘要翻译：具有电荷存储介电层的闪速存储器。根据一个实施例，电荷存储电介质层形成在第一和第二有源区上。第一有源区上的电荷存储层在第二有源区上并未连接到电荷存储层。栅极线覆盖电荷存储层并且延伸穿过第一和第二有源区域和隔离区域。电荷存储层只能在栅极线与半导体衬底的有源区相交而不在隔离区上形成。因此，可以避免来自相邻存储单元的不期望的影响或干扰。

3. 发明授权

US07081651B2 Non-volatile memory device with protruding charge storage layer and method of fabricating the same 失效
标题翻译：具有突出电荷存储层的非易失性存储器件及其制造方法
公开(公告)号：US07081651B2
公开(公告)日：2006-07-25
申请号：US10186153
申请日：2002-06-27
申请人： Jung-Dal Choi , Jong-Woo Park , Seong-Soon Cho , Chang-Hyun Lee
发明人： Jung-Dal Choi , Jong-Woo Park , Seong-Soon Cho , Chang-Hyun Lee
IPC分类号： H01L29/792
CPC分类号： H01L27/11568 , H01L27/105 , H01L27/11573
摘要： A non-volatile memory device includes a tunnel oxide layer, a charge storage layer, a blocking insulating layer, and a gate electrode that are sequentially stacked, as well as an impurity diffusion layer in an active region at both sides of the gate electrode. The gate electrode crosses active regions between device isolation layers formed in a predetermined area of a semiconductor substrate, and an edge of the charge storage layer is extended to have a protruding part that protrudes from the gate electrode. In order to form a charge storage layer having a protruding part, a stack insulating layer including first to third insulating layers is formed in an active region between the device isolation layers formed in the substrate. A plurality of gate electrodes crossing the active region are formed on the stack insulating layer, and a sidewall spacer is formed on both sidewalls of the gate electrode. Using the sidewall spacer and the gate electrode, the stack insulating layer is etched to form a charge storage layer that protrudes from the sidewall of the gate electrode.
摘要翻译：非易失性存储器件包括顺序层叠的隧道氧化物层，电荷存储层，阻挡绝缘层和栅电极，以及栅电极两侧的有源区中的杂质扩散层。栅电极跨越形成在半导体衬底的预定区域中的器件隔离层之间的有源区，并且电荷存储层的边缘延伸成具有从栅电极突出的突出部分。为了形成具有突出部分的电荷存储层，在形成在衬底中的器件隔离层之间的有源区域中形成包括第一至第三绝缘层的叠层绝缘层。在堆叠绝缘层上形成与激活区交叉的多个栅电极，并且在栅电极的两个侧壁上形成侧墙。使用侧壁间隔物和栅电极，对叠层绝缘层进行蚀刻以形成从栅电极的侧壁突出的电荷存储层。

4. 发明申请

US20120286655A1 ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：有机电致发光显示装置及其制造方法
公开(公告)号：US20120286655A1
公开(公告)日：2012-11-15
申请号：US13555985
申请日：2012-07-23
申请人： Chang-Ki SEO , Jong-Woo Park , Mi-Youn Yang , Kyung-Tak Oh , Dae-Sick Cho
发明人： Chang-Ki SEO , Jong-Woo Park , Mi-Youn Yang , Kyung-Tak Oh , Dae-Sick Cho
IPC分类号： H05B33/12
CPC分类号： H01L51/5259 , H01L27/3244 , H01L51/524 , H01L2251/5315 , H01L2251/558
摘要： A method for fabricating an organic electroluminescent display device including the steps of preparing first and second substrates, forming an organic electroluminescent display on the first substrate, forming a first etching mask film on an upper surface of the second substrate, forming a second etching mask film on a lower surface of the second substrate, performing a first etching process on the upper surface of the second substrate, forming a third etching mask film on an etched portion of the second surface of the glass substrate, performing a second etching process on the upper surface of the second substrate to form a plurality of grooves on the upper surface of the second substrate, removing the first and second etching mask films, the second etching film remaining on the etched portion of the second surface of the glass substrate, and encapsulating the organic electroluminescent display between the first and second substrates.
摘要翻译：一种制造有机电致发光显示装置的方法，包括以下步骤：制备第一和第二基板，在第一基板上形成有机电致发光显示器，在第二基板的上表面上形成第一蚀刻掩模膜，形成第二蚀刻掩模膜在所述第二基板的下表面上，对所述第二基板的上表面进行第一蚀刻处理，在所述玻璃基板的所述第二表面的蚀刻部分上形成第三蚀刻掩模膜，在所述第二基板的上表面上进行第二蚀刻处理表面，以在第二基板的上表面上形成多个凹槽，去除第一和第二蚀刻掩模膜，第二蚀刻膜残留在玻璃基板的第二表面的蚀刻部分上，并封装有机电致发光显示在第一和第二基板之间。

5. 发明授权

US10515911B2 Semiconductor devices 有权
公开(公告)号：US10515911B2
公开(公告)日：2019-12-24
申请号：US14832306
申请日：2015-08-21
申请人： HyunSuk Chun , Jong-Woo Park , Chul-Yong Park , Jeong-Won Yoon
发明人： HyunSuk Chun , Jong-Woo Park , Chul-Yong Park , Jeong-Won Yoon
IPC分类号： H01L23/00 , H01L23/522 , H01L23/532
摘要： Semiconductor devices include an interlayer insulating layer on a substrate, a first capacitor structure in the interlayer insulating layer, and a conductive layer including a terminal pad on the interlayer insulating layer. The first capacitor structure includes at least one first laminate, the at least one first laminate including a first lower electrode, a first capacitor insulating layer, and a first upper electrode sequentially on the substrate. The terminal pad does not overlap with the first capacitor structure.

6. 发明授权

US06649508B1 Methods of forming self-aligned contact structures in semiconductor integrated circuit devices 有权
标题翻译：在半导体集成电路器件中形成自对准接触结构的方法
公开(公告)号：US06649508B1
公开(公告)日：2003-11-18
申请号：US09556499
申请日：2000-04-24
申请人： Jong-Woo Park , Yun-Gi Kim , Dong-Gun Park
发明人： Jong-Woo Park , Yun-Gi Kim , Dong-Gun Park
IPC分类号： H01L214763
CPC分类号： H01L27/10855 , H01L21/76831 , H01L21/76897 , H01L27/10885
摘要： Methods of forming integrated circuit devices (e.g., memory devices) include the use of preferred self-aligned contact hole fabrication steps. These steps improve process reliability by reducing the likelihood that contact holes will become misaligned to underlying integrated circuit device structures and thereby potentially expose the structures in an adverse manner. Typical methods include the steps of forming a plurality of interconnection patterns on a substrate and then covering a surface of the interconnection patterns and a portion of the substrate with a capping insulating layer such as silicon nitride layer. The capping insulating layer is then covered with an upper interlayer insulating layer different from the capping insulating layer. The upper interlayer insulating layer and the capping insulating layer are then dry-etched in sequence to form a first narrow contact hole that exposes the substrate, but preferably does not expose the interconnection patterns. The first contact hole is then widened in a self-aligned manner using the capping insulating layer as an etch-stop layer. This widening step is performed by wet etching sidewalls of the first contact hole using an etchant that etches the upper interlayer insulating layer faster than the capping insulating layer. In this manner, the first contact hole may be formed to initially compensate for potential misalignment errors and then a self-aligned wet etching step may be performed to widen the first contact hole into a second contact hole so that low resistance contacts (e.g., contact plugs) can be provided therein.
摘要翻译：形成集成电路器件（例如，存储器件）的方法包括使用优选的自对准接触孔制造步骤。这些步骤通过减少接触孔将变得不对准到下面的集成电路器件结构并由此以不利的方式潜在地暴露结构的可能性来提高工艺可靠性。典型的方法包括以下步骤：在衬底上形成多个互连图案，然后用诸如氮化硅层的覆盖绝缘层覆盖互连图案的表面和衬底的一部分。然后用与封盖绝缘层不同的上层间绝缘层覆盖封盖绝缘层。然后依次对上层间绝缘层和封盖绝缘层进行干式蚀刻，形成露出基板的第一窄接触孔，但优选不暴露互连图案。然后使用封盖绝缘层作为蚀刻停止层，以自对准的方式加宽第一接触孔。通过使用蚀刻上层间绝缘层的蚀刻剂比封盖绝缘层更快地湿蚀刻第一接触孔的侧壁来进行该扩大步骤。以这种方式，可以形成第一接触孔以最初补偿潜在的未对准误差，然后可以执行自对准的湿蚀刻步骤，以将第一接触孔加宽成第二接触孔，使得低电阻接触（例如，接触插头）。

7. 发明授权

US06171942B2 Methods of forming electrically conductive lines in integrated circuit memories using self-aligned silicide blocking layers 有权
标题翻译：在使用自对准硅化物阻挡层的集成电路存储器中形成导电线的方法
公开(公告)号：US06171942B2
公开(公告)日：2001-01-09
申请号：US09283226
申请日：1999-04-01
申请人： Duck-Hyung Lee , Jong-Woo Park
发明人： Duck-Hyung Lee , Jong-Woo Park
IPC分类号： H01L2170
CPC分类号： H01L27/10888 , H01L21/76897 , H01L27/10894
摘要： Conductive lines are formed in integrated circuit memories using a Silicide blocking layer that is self-aligned. The Silicide blocking layer is self-aligned by etching an electrically insulating layer that is formed between a electrically conductive lines on a substrate in an integrated circuit memory. The etching removes the electrically insulating layer from the outer surfaces of the electrically conductive lines, but leaves a portion of the electrically insulating layer on the substrate between the electrically conductive lines. The portion of the electrically insulating layer remaining on the substrate may prevent the formation of a Silicide film on the substrate during a heating step used to form contacts on the outer surfaces of the electrically conductive lines. The self-aligned Silicide blocking layer may allow a reduction in the number of steps in the fabrication of the contacts and reduce the need to align a mask to the substrate to form the Silicide blocking layer.
摘要翻译：使用自对准的硅化物阻挡层在集成电路存储器中形成导电线。通过蚀刻形成在集成电路存储器中的基板上的导电线之间的电绝缘层，自对准硅化物阻挡层。该蚀刻从电导线的外表面去除电绝缘层，但是在导电线之间留下基板上的电绝缘层的一部分。保留在基板上的电绝缘层的部分可以防止在用于在导电线的外表面上形成接触的加热步骤中在基板上形成硅化硅膜。自对准的硅化物阻挡层可以允许减少接触的制造中的步骤数量，并且减少将掩模对准衬底以形成硅化物阻挡层的需要。

8. 发明授权

US08251766B2 Organic electroluminescent display device and method of fabricating the same 有权
标题翻译：有机电致发光显示装置及其制造方法
公开(公告)号：US08251766B2
公开(公告)日：2012-08-28
申请号：US12837990
申请日：2010-07-16
申请人： Chang-Ki Seo , Jong-Woo Park , Mi-Youn Yang , Kyung-Tak Oh , Dae-Sick Cho
发明人： Chang-Ki Seo , Jong-Woo Park , Mi-Youn Yang , Kyung-Tak Oh , Dae-Sick Cho
IPC分类号： H01J9/24
CPC分类号： H01L51/5259 , H01L27/3244 , H01L51/524 , H01L2251/5315 , H01L2251/558
摘要： A method for fabricating an organic electroluminescent display device including the steps of preparing first and second substrates, forming an organic electroluminescent display on the first substrate, forming a first etching mask film on an upper surface of the second substrate, forming a second etching mask film on a lower surface of the second substrate, performing a first etching process on the upper surface of the second substrate, forming a third etching mask film on an etched portion of the second surface of the glass substrate, performing a second etching process on the upper surface of the second substrate to form a plurality of grooves on the upper surface of the second substrate, removing the first and second etching mask films, the second etching film remaining on the etched portion of the second surface of the glass substrate, and encapsulating the organic electroluminescent display between the first and second substrates.
摘要翻译：一种制造有机电致发光显示装置的方法，包括以下步骤：制备第一和第二基板，在第一基板上形成有机电致发光显示器，在第二基板的上表面上形成第一蚀刻掩模膜，形成第二蚀刻掩膜膜在所述第二基板的下表面上，对所述第二基板的上表面进行第一蚀刻处理，在所述玻璃基板的所述第二表面的蚀刻部分上形成第三蚀刻掩模膜，在所述第二基板的上表面上进行第二蚀刻处理表面，以在第二基板的上表面上形成多个凹槽，去除第一和第二蚀刻掩模膜，第二蚀刻膜残留在玻璃基板的第二表面的蚀刻部分上，并封装有机电致发光显示在第一和第二基板之间。

9. 发明授权

US06799449B2 Apparatus for superplastic forming 失效
标题翻译：超塑性成型设备
公开(公告)号：US06799449B2
公开(公告)日：2004-10-05
申请号：US10392595
申请日：2003-03-20
申请人： Jong-Woo Park
发明人： Jong-Woo Park
IPC分类号： B21D2602
CPC分类号： B21D26/055 , B21D37/16 , Y10T29/49805
摘要： An apparatus of superplastic forming for massive production is able to install a plurality of forming sheets and plates in one apparatus using dies of multi-layer structure and to form the sheets and plates with compressed gas, and therefore, a plurality of products can be fabricated rapidly and massively with a cheap facility investment. If preforms are used instead of flat blank sheets, the productivity can be improved greatly and the products of uniform thickness can be formed massively.
摘要翻译：用于大规模生产的超塑性成形装置能够在一个装置中使用多层结构的模具来安装多个成形片材和板，并且可以用压缩气体形成片材和板，因此可以制造多个产品快速大量地利用便宜的设施投资。如果使用预成型坯而不是平板坯，则可以大大提高生产率，并且可以大量地形成均匀厚度的产品。

10. 发明授权

US06571593B1 Continuous shear deformation device 失效
标题翻译：连续剪切变形装置
公开(公告)号：US06571593B1
公开(公告)日：2003-06-03
申请号：US09653142
申请日：2000-08-31
申请人： Young-Hoon Chung , Jong-Woo Park , In-Ge Moon , Myung-Chul Shin
发明人： Young-Hoon Chung , Jong-Woo Park , In-Ge Moon , Myung-Chul Shin
IPC分类号： B21C2300
CPC分类号： B21C37/045 , B21C1/00 , B21C23/001 , B21C23/01 , B21C23/14
摘要： The present invention relates to a continuous shear deformation device, in particular, which is capable of mass-producing shear deformed materials by continuously supplying a sharply bent channel type mold with materials, particularly, which have a variety of thickness from thin sheet to thick plate. The continuous shear deformation device in accordance with the present invention includes a sharply bent channel type mold and a rotary guide apparatus installed at the inlet of the mold for guiding materials into the mold by frictional contact with the materials. In addition, the present invention can additionally include a rotary guide for exiting the shear-deformed material.
摘要翻译：连续剪切变形装置技术领域本发明涉及一种连续剪切变形装置，特别是能够通过连续地供给具有各种厚度的材料的材料，特别是从薄板到厚板。根据本发明的连续剪切变形装置包括锐利弯曲的通道型模具和安装在模具入口处的旋转引导装置，用于通过与材料的摩擦接触将材料引导到模具中。此外，本发明还可以包括用于离开剪切变形材料的旋转引导件。

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