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1. 发明申请

US20110275184A1 Semiconductor Device 有权
标题翻译：半导体器件
公开(公告)号：US20110275184A1
公开(公告)日：2011-11-10
申请号：US13184116
申请日：2011-07-15
申请人： Reika ICHIHARA , Yoshinori TSUCHIYA , Masato KOYAMA , Akira NISHIYAMA
发明人： Reika ICHIHARA , Yoshinori TSUCHIYA , Masato KOYAMA , Akira NISHIYAMA
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
摘要翻译：半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分的第一电介质面向第一金属栅电极。

2. 发明申请

US20100078731A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
公开(公告)号：US20100078731A1
公开(公告)日：2010-04-01
申请号：US12631891
申请日：2009-12-07
申请人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
发明人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.

3. 发明申请

US20120184096A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120184096A1
公开(公告)日：2012-07-19
申请号：US13434889
申请日：2012-03-30
申请人： Masato KOYAMA , Yoshinori TSUCHIYA , Seiji INUMIYA
发明人： Masato KOYAMA , Yoshinori TSUCHIYA , Seiji INUMIYA
IPC分类号： H01L21/283
CPC分类号： H01L21/823842 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66545
摘要： It is made possible to provide a method for manufacturing a semiconductor device that includes CMISs each having a low threshold voltage Vth and a Ni-FUSI/SiON or high-k gate insulating film structure. The method comprises: forming a p-type semiconductor region and an n-type semiconductor region insulated from each other in a substrate; forming a first and second gate insulating films on the p-type and n-type semiconductor regions, respectively; forming a first nickel silicide having a composition of Ni/Si
摘要翻译：可以提供一种半导体器件的制造方法，该半导体器件包括具有低阈值电压Vth和Ni-FUSI / SiON或高k栅极绝缘膜结构的CMIS。该方法包括：在衬底中形成彼此绝缘的p型半导体区域和n型半导体区域; 在p型和n型半导体区分别形成第一和第二栅极绝缘膜; 在所述第一栅极绝缘膜上方形成具有Ni / Si <31/12的组成的第一硅化镍和在所述第二栅极绝缘膜上具有Ni /Si≥31/ 12的组成的第二硅化镍; 以及通过使铝通过第一硅化镍扩散，在第一硅化镍和第一栅极绝缘膜之间的界面处分离铝。

4. 发明申请

US20100032765A1 SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20100032765A1
公开(公告)日：2010-02-11
申请号：US12549298
申请日：2009-08-27
申请人： Yoshinori TSUCHIYA , Masato Koyama
发明人： Yoshinori TSUCHIYA , Masato Koyama
IPC分类号： H01L27/092 , H01L29/78
CPC分类号： H01L29/4958 , H01L21/2807 , H01L21/28079 , H01L21/28088 , H01L21/76802 , H01L21/76877 , H01L21/823807 , H01L21/823828 , H01L21/823878 , H01L21/84 , H01L27/0922 , H01L27/1203 , H01L29/4966 , H01L29/4975 , H01L29/665
摘要： A semiconductor device includes a semiconductor substrate having a semiconductor layer, a gate electrode, a source region, a drain region, an element separation insulating film layer and a wiring. The gate electrode include a laminated structure having a gate insulating film formed on the semiconductor layer, a metal or a metallic compound formed on the gate insulating film and a polycrystalline silicon layer formed on the metal or metallic compound. The source region and drain region are formed on a surface portion of the semiconductor substrate and sandwich the gate electrode therebetween. The element separation insulating film layer surrounds the semiconductor layer. The wiring is in contact with the metal or metallic compound of the gate electrode.

5. 发明申请

US20100258880A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100258880A1
公开(公告)日：2010-10-14
申请号：US12824266
申请日：2010-06-28
申请人： Yoshinori TSUCHIYA , Masato Koyama , Masahiko Yoshiki
发明人： Yoshinori TSUCHIYA , Masato Koyama , Masahiko Yoshiki
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.
摘要翻译：半导体器件包括：n沟道MIS晶体管和p沟道MIS晶体管。 n沟道MIS晶体管包括：具有在第一源极/漏极区之间的p型半导体区域上形成的非晶层或外延层的第一栅极绝缘膜; 以及具有形成有第一金属层和第一化合物层的堆叠结构的第一栅电极。第一金属层形成在第一栅极绝缘膜上，由功函数为4.3eV以下的第一金属构成，第一金属层形成在第一金属层上，并且含有第二金属和 IV族半导体。第二种金属与第一种金属不同。 P沟道MIS晶体管包括具有第二化合物层的第二栅电极，第二化合物层含有与第一化合物层相同组成的化合物。

6. 发明申请

US20080029822A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080029822A1
公开(公告)日：2008-02-07
申请号：US11687834
申请日：2007-03-19
申请人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
发明人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
IPC分类号： H01L29/76 , H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.
摘要翻译：半导体器件包括：n沟道MIS晶体管和p沟道MIS晶体管。 n沟道MIS晶体管包括：具有在第一源极/漏极区之间的p型半导体区域上形成的非晶层或外延层的第一栅极绝缘膜; 以及具有形成有第一金属层和第一化合物层的堆叠结构的第一栅电极。第一金属层形成在第一栅极绝缘膜上，由功函数为4.3eV以下的第一金属构成，第一金属层形成在第一金属层上，并且含有第二金属和 IV族半导体。第二种金属与第一种金属不同。 P沟道MIS晶体管包括具有第二化合物层的第二栅电极，第二化合物层含有与第一化合物层相同组成的化合物。

7. 发明申请

US20130062624A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130062624A1
公开(公告)日：2013-03-14
申请号：US13404728
申请日：2012-02-24
申请人： Yoshinori TSUCHIYA , Takashi Shinohe
发明人： Yoshinori TSUCHIYA , Takashi Shinohe
IPC分类号： H01L29/16 , H01L21/336 , H01L21/265
CPC分类号： H01L29/7806 , H01L21/0485 , H01L21/26506 , H01L21/283 , H01L21/8213 , H01L29/0839 , H01L29/1608 , H01L29/45 , H01L29/4933 , H01L29/4975 , H01L29/66068 , H01L29/665 , H01L29/7395 , H01L29/7802 , H01L29/861 , H01L29/872
摘要： A semiconductor device according to an embodiment includes a silicon carbide, a metal silicide formed on the silicon carbide and including a first layer and a second layer having a carbon ratio lower than that of the first layer, and a metallic electrode formed on the metal silicide, wherein the second layer is formed on the first layer, and the second layer is in contact with the metallic electrode, and an average grain diameter of a metal silicide in the second layer is larger than an average grain diameter of a metal silicide in the first layer.
摘要翻译：根据实施例的半导体器件包括碳化硅，形成在碳化硅上的金属硅化物，并且包括第一层和碳比低于第一层的碳比的第二层，以及形成在金属硅化物上的金属电极其中，所述第二层形成在所述第一层上，所述第二层与所述金属电极接触，并且所述第二层中的金属硅化物的平均粒径大于所述第二层中的金属硅化物的平均粒径第一层

8. 发明申请

US20130062622A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130062622A1
公开(公告)日：2013-03-14
申请号：US13404349
申请日：2012-02-24
申请人： Yoshinori TSUCHIYA
发明人： Yoshinori TSUCHIYA
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/78 , H01L21/046 , H01L21/0485 , H01L29/045 , H01L29/1608 , H01L29/51 , H01L29/66068 , H01L29/7394 , H01L29/7827
摘要： A semiconductor device according to the present embodiment includes a semiconductor substrate having a first n-type silicon carbide layer and a second n-type silicon carbide layer, a first p-type impurity region formed in the n-type silicon carbide layer, a first n-type impurity region of 4H—SiC structure formed in the n-type silicon carbide layer, a second n-type impurity region of 3C—SiC structure formed in the n-type silicon carbide layer having a depth shallower than the first n-type impurity region, a gate insulating film, a gate electrode formed on the gate insulating film, and a metallic silicide layer formed above the first n-type impurity region and having a bottom portion and a side surface portion such that the second n-type impurity region is sandwiched between the first n-type impurity region and at least the side surface portion.
摘要翻译：根据本实施例的半导体器件包括具有第一n型碳化硅层和第二n型碳化硅层的半导体衬底，形成在n型碳化硅层中的第一p型杂质区，第一形成在n型碳化硅层中的4H-SiC结构的n型杂质区，在n型碳化硅层中形成的深度比第一n-型碳化物深度浅的3C-SiC结构的第二n型杂质区，栅极绝缘膜，形成在栅极绝缘膜上的栅极电极和形成在第一n型杂质区域上方的金属硅化物层，并且具有底部和侧表面部分，使得第二n型杂质区域杂质区域夹在第一n型杂质区域和至少侧面部分之间。

9. 发明申请

US20130234159A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130234159A1
公开(公告)日：2013-09-12
申请号：US13602704
申请日：2012-09-04
申请人： Yoshinori TSUCHIYA
发明人： Yoshinori TSUCHIYA
IPC分类号： H01L29/78 , H01L21/28 , H01L29/16
CPC分类号： H01L29/78 , H01L21/049 , H01L21/28008 , H01L21/28273 , H01L21/32155 , H01L29/1608 , H01L29/4933 , H01L29/4966 , H01L29/66068 , H01L29/7395 , H01L29/7802
摘要： A semiconductor device of an embodiment includes: a substrate formed of a single-crystal first semiconductor; a gate insulating film on the substrate; a gate electrode including a layered structure of a semiconductor layer formed of a polycrystalline second semiconductor and a metal semiconductor compound layer formed of a first metal semiconductor compound that is a reaction product of a metal and the second semiconductor; and electrodes formed of a second metal semiconductor compound that is a reaction product of the metal and the first semiconductor, and formed on the substrate with the gate electrode interposed therebetween, and an aggregation temperature of the first metal semiconductor compound on the polycrystalline second semiconductor is lower than an aggregation temperature of the second metal semiconductor compound on the single-crystal first semiconductor, and a cluster-state high carbon concentration region is included in an interface between the semiconductor layer and the metal semiconductor compound layer.
摘要翻译：实施例的半导体器件包括：由单晶体第一半导体形成的衬底; 基板上的栅极绝缘膜; 包括由多晶第二半导体形成的半导体层的层叠结构的栅电极和由作为金属与第二半导体的反应产物的第一金属半导体化合物形成的金属半导体化合物层; 以及由金属和第一半导体的反应产物形成的第二金属半导体化合物形成的电极，并且在基板上形成有栅极电极，多晶二次半导体上的第一金属半导体化合物的聚集温度为低于单晶体第一半导体上的第二金属半导体化合物的聚集温度，并且在半导体层和金属半导体化合物层之间的界面中包含簇状态的高碳浓度区域。

10. 发明申请

US20100062575A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20100062575A1
公开(公告)日：2010-03-11
申请号：US12618402
申请日：2009-11-13
申请人： Atsuhiro KINOSHITA , Yoshinori TSUCHIYA , Junji KOGA
发明人： Atsuhiro KINOSHITA , Yoshinori TSUCHIYA , Junji KOGA
IPC分类号： H01L21/8238
CPC分类号： H01L21/28105 , H01L21/28097 , H01L21/32155 , H01L21/82385 , H01L29/66651 , H01L29/785
摘要： A semiconductor device includes a semiconductor substrate; a first gate insulation film formed on the semiconductor substrate; a second gate insulation film formed on the semiconductor substrate; a first gate electrode formed on the first gate insulation film and fully silicided; and a second gate electrode formed on the second gate insulation film and fully silicided, a gate length or a gate width of the second gate electrode being larger than that of the first gate electrode, and a thickness of the second gate electrode being smaller than that of the first gate electrode.
摘要翻译：半导体器件包括半导体衬底; 形成在所述半导体基板上的第一栅极绝缘膜; 形成在所述半导体基板上的第二栅极绝缘膜; 形成在第一栅极绝缘膜上并完全硅化的第一栅电极; 以及形成在所述第二栅极绝缘膜上并完全硅化的第二栅电极，所述第二栅电极的栅极长度或栅极宽度大于所述第一栅电极的栅极长度或栅极宽度，并且所述第二栅电极的厚度小于所述第二栅电极的厚度的第一栅电极。

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