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1. 发明申请

US20080029822A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080029822A1
公开(公告)日：2008-02-07
申请号：US11687834
申请日：2007-03-19
申请人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
发明人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
IPC分类号： H01L29/76 , H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.
摘要翻译：半导体器件包括：n沟道MIS晶体管和p沟道MIS晶体管。 n沟道MIS晶体管包括：具有在第一源极/漏极区之间的p型半导体区域上形成的非晶层或外延层的第一栅极绝缘膜; 以及具有形成有第一金属层和第一化合物层的堆叠结构的第一栅电极。第一金属层形成在第一栅极绝缘膜上，由功函数为4.3eV以下的第一金属构成，第一金属层形成在第一金属层上，并且含有第二金属和 IV族半导体。第二种金属与第一种金属不同。 P沟道MIS晶体管包括具有第二化合物层的第二栅电极，第二化合物层含有与第一化合物层相同组成的化合物。

2. 发明申请

US20100078731A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
公开(公告)号：US20100078731A1
公开(公告)日：2010-04-01
申请号：US12631891
申请日：2009-12-07
申请人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
发明人： Yoshinori TSUCHIYA , Masato KOYAMA , Masahiko YOSHIKI
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L27/092 , H01L29/495 , H01L29/4975 , H01L29/517 , H01L29/665
摘要： A semiconductor device includes: an n-channel MIS transistor and a p-channel MIS transistor. An n-channel MIS transistor includes: a first gate insulating film having an amorphous layer or an epitaxial layer formed on a p-type semiconductor region between a first source/drain regions; and a first gate electrode having a stack structure formed with a first metal layer and a first compound layer. The first metal layer is formed on the first gate insulating film and made of a first metal having a work function of 4.3 eV or smaller, and the first compound layer is formed on the first metal layer and contains a compound of a second metal and a IV-group semiconductor. The second metal is different from the first metal. A p-channel MIS transistor includes a second gate electrode having a second compound layer containing a compound of the same composition as the first compound layer.

3. 发明申请

US20100155851A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100155851A1
公开(公告)日：2010-06-24
申请号：US12719952
申请日：2010-03-09
申请人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
发明人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.
摘要翻译：公开了一种包括P沟道MIS晶体管的半导体器件，其包括N型半导体层，形成在N型半导体层上并含有金属的碳化合物的第一栅极绝缘层和N沟道MIS 晶体管，其包括P型半导体层，形成在P型半导体层上的第二栅极绝缘层和形成在第二栅极绝缘层上的第二栅电极。

4. 发明申请

US20120184096A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120184096A1
公开(公告)日：2012-07-19
申请号：US13434889
申请日：2012-03-30
申请人： Masato KOYAMA , Yoshinori TSUCHIYA , Seiji INUMIYA
发明人： Masato KOYAMA , Yoshinori TSUCHIYA , Seiji INUMIYA
IPC分类号： H01L21/283
CPC分类号： H01L21/823842 , H01L21/28097 , H01L21/823835 , H01L21/823857 , H01L29/4975 , H01L29/517 , H01L29/665 , H01L29/66545
摘要： It is made possible to provide a method for manufacturing a semiconductor device that includes CMISs each having a low threshold voltage Vth and a Ni-FUSI/SiON or high-k gate insulating film structure. The method comprises: forming a p-type semiconductor region and an n-type semiconductor region insulated from each other in a substrate; forming a first and second gate insulating films on the p-type and n-type semiconductor regions, respectively; forming a first nickel silicide having a composition of Ni/Si
摘要翻译：可以提供一种半导体器件的制造方法，该半导体器件包括具有低阈值电压Vth和Ni-FUSI / SiON或高k栅极绝缘膜结构的CMIS。该方法包括：在衬底中形成彼此绝缘的p型半导体区域和n型半导体区域; 在p型和n型半导体区分别形成第一和第二栅极绝缘膜; 在所述第一栅极绝缘膜上方形成具有Ni / Si <31/12的组成的第一硅化镍和在所述第二栅极绝缘膜上具有Ni /Si≥31/ 12的组成的第二硅化镍; 以及通过使铝通过第一硅化镍扩散，在第一硅化镍和第一栅极绝缘膜之间的界面处分离铝。

5. 发明申请

US20110275184A1 Semiconductor Device 有权
标题翻译：半导体器件
公开(公告)号：US20110275184A1
公开(公告)日：2011-11-10
申请号：US13184116
申请日：2011-07-15
申请人： Reika ICHIHARA , Yoshinori TSUCHIYA , Masato KOYAMA , Akira NISHIYAMA
发明人： Reika ICHIHARA , Yoshinori TSUCHIYA , Masato KOYAMA , Akira NISHIYAMA
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device includes a semiconductor substrate, an nMISFET formed on the substrate, the nMISFET including a first dielectric formed on the substrate and a first metal gate electrode formed on the first dielectric and formed of one metal element selected from Ti, Zr, Hf, Ta, Sc, Y, a lanthanoide and actinide series and of one selected from boride, silicide and germanide compounds of the one metal element, and a pMISFET formed on the substrate, the pMISFET including a second dielectric formed on the substrate and a second metal gate electrode formed on the second dielectric and made of the same material as that of the first metal gate electrode, at least a portion of the second dielectric facing the second metal gate electrode being made of an insulating material different from that of at least a portion of the first dielectric facing the first metal gate electrode.
摘要翻译：半导体器件包括半导体衬底，形成在衬底上的nMISFET，nMISFET包括形成在衬底上的第一电介质和形成在第一电介质上的第一金属栅极，并由选自Ti，Zr，Hf， Ta，Sc，Y，镧系元素和锕系和选自所述一种金属元素的硼化物，硅化物和锗化合物的一种，以及形成在所述衬底上的pMISFET，所述pMISFET包括形成在所述衬底上的第二电介质和第二金属栅电极形成在第二电介质上并由与第一金属栅电极相同的材料制成，第二电介质面向第二金属栅电极的至少一部分由绝缘材料制成，绝缘材料与至少一部分的第一电介质面向第一金属栅电极。

6. 发明申请

US20080258230A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
公开(公告)号：US20080258230A1
公开(公告)日：2008-10-23
申请号：US12133583
申请日：2008-06-05
申请人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
发明人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
IPC分类号： H01L27/092
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.

7. 发明申请

US20080254581A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080254581A1
公开(公告)日：2008-10-16
申请号：US12133605
申请日：2008-06-05
申请人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
发明人： Masato KOYAMA , Akira Nishiyama , Yoshinori Tsuchiya , Reika Ichihara
IPC分类号： H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28079 , H01L21/28088 , H01L29/495 , H01L29/4966 , H01L29/517
摘要： There is disclosed a semiconductor device comprising a P-channel MIS transistor which includes an N-type semiconductor layer, a first gate insulating layer formed on the N-type semiconductor layer and containing a carbon compound of a metal, and an N-channel MIS transistor which includes a P-type semiconductor layer, a second gate insulating layer formed on the P-type semiconductor layer, and a second gate electrode formed on the second gate insulating layer.
摘要翻译：公开了一种包括P沟道MIS晶体管的半导体器件，其包括N型半导体层，形成在N型半导体层上并含有金属的碳化合物的第一栅极绝缘层和N沟道MIS 晶体管，其包括P型半导体层，形成在P型半导体层上的第二栅极绝缘层和形成在第二栅极绝缘层上的第二栅电极。

8. 发明申请

US20090194797A1 INSULATING FILM AND SEMICONDUCTOR DEVICE INCLUDING THE SAME 审中-公开
标题翻译：绝缘膜和包括其的半导体器件
公开(公告)号：US20090194797A1
公开(公告)日：2009-08-06
申请号：US12358466
申请日：2009-01-23
申请人： Tatsuo SHIMIZU , Masato KOYAMA
发明人： Tatsuo SHIMIZU , Masato KOYAMA
IPC分类号： H01L29/78 , C09K3/00
CPC分类号： H01L29/517 , H01L21/02145 , H01L21/02148 , H01L21/02153 , H01L21/02156 , H01L21/02159 , H01L21/02161 , H01L21/02178 , H01L21/02181 , H01L21/02186 , H01L21/02189 , H01L21/02192 , H01L21/02194 , H01L21/02271 , H01L21/02332 , H01L21/0234 , H01L21/28194 , H01L21/31155 , H01L21/316 , H01L21/318 , H01L28/40 , H01L29/40114 , H01L29/40117 , H01L29/518 , H01L29/66545 , H01L29/66553 , H01L29/788 , H01L29/792
摘要： It is made possible to provide an insulating film that can reduce the leakage current. An insulating film includes: an amorphous oxide dielectric film containing a metal, hydrogen, and nitrogen. The nitrogen amount [N] and the hydrogen amount [H] in the oxide dielectric film satisfy the following relationship: {[N]−[H]}/2≦1.0×1021 cm−3.
摘要翻译：可以提供能够减小漏电流的绝缘膜。绝缘膜包括：含有金属，氢和氮的非晶氧化物介电膜。氧化物介电膜中的氮量[N]和氢量[H]满足以下关系：{[N] - [H]} / 2 <= 1.0×10 21 cm -3。

9. 发明申请

US20070190704A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20070190704A1
公开(公告)日：2007-08-16
申请号：US11736261
申请日：2007-04-17
申请人： Masato KOYAMA , Akira Nishiyama , Yuuichi Kamimuta
发明人： Masato KOYAMA , Akira Nishiyama , Yuuichi Kamimuta
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L21/823814 , H01L21/823864
摘要： A semiconductor device includes a silicon substrate, a channel region formed in a surface of the silicon substrate, a gate insulating film formed on the channel region, a gate electrode formed on the gate insulating film, first gate side walls formed on the gate insulating film to sandwich the gate electrode in a gate length direction, second gate side walls which sandwich the gate electrode and the first gate side wall, first diffused layers formed on the surface of the silicon substrate to sandwich the channel region, second diffused layers which sandwich the channel region and the first diffused layer and have a larger depth than that of the first diffused layer, and low resistance layers which are formed between the first diffused layer and the second gate side wall and contain nitride, boride or carbide of Ti, Zr, Hf or Ta.
摘要翻译：半导体器件包括硅衬底，形成在硅衬底的表面中的沟道区，形成在沟道区上的栅极绝缘膜，形成在栅极绝缘膜上的栅极，形成在栅极绝缘膜上的第一栅极侧壁夹着栅极电极和第一栅极侧壁的第二栅极侧壁，形成在硅衬底的表面上以夹持沟道区域的第一扩散层，夹着所述栅极电极和第二栅极侧壁的第二扩散层，沟道区域和第一扩散层，并且具有比第一扩散层的深度更大的深度，以及形成在第一扩散层和第二栅极侧壁之间的低电阻层，并且包含Ti，Zr的氮化物，硼化物或碳化物， Hf或Ta。

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