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1. 发明申请

US20120043604A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20120043604A1
公开(公告)日：2012-02-23
申请号：US13317781
申请日：2011-10-28
申请人： Yoshimitsu MURASE , Kenya KOBAYASHI , Hideo YAMAMOTO , Atsushi KANEKO
发明人： Yoshimitsu MURASE , Kenya KOBAYASHI , Hideo YAMAMOTO , Atsushi KANEKO
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/4236 , H01L29/66734
摘要： A semiconductor device includes a semiconductor layer, a first diffused region formed in the semiconductor layer, a second diffused region formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode disposed in the trench, a top surface of the gate electrode being lower than a top surface of the semiconductor layer and sagging downwards in a center thereof, a non-doped silicate glass film disposed in the trench and formed over the gate electrode, a top surface of the silicate glass film sagging downwards in a center thereof, an oxide film disposed in the trench and formed over the non-doped silicate glass film, a top surface of the oxide film sagging downwards in a center, and a source electrode formed over the semiconductor layer so that the source electrode contacts the first and second diffusion regions, and the oxide film at the top surface thereof.
摘要翻译：半导体器件包括半导体层，形成在半导体层中的第一扩散区域，形成在第一扩散区域中的第二扩散区域，形成在半导体层中的沟槽，设置在沟槽中的栅极电极，栅电极低于半导体层的顶表面并且在其中心向下流动，设置在沟槽中并形成在栅电极上的未掺杂硅酸盐玻璃膜，硅酸盐玻璃膜的顶表面向下垂下中心，设置在沟槽中并形成在非掺杂硅酸盐玻璃膜上的氧化物膜，氧化膜在中心向下垂的顶表面和形成在半导体层上的源电极，使得源电极接触第一和第二扩散区，以及其顶表面处的氧化物膜。

2. 发明申请

US20090179260A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US20090179260A1
公开(公告)日：2009-07-16
申请号：US12348467
申请日：2009-01-05
申请人： Kenya KOBAYASHI
发明人： Kenya KOBAYASHI
IPC分类号： H01L29/768 , H01L21/336 , H01L21/04 , H01L29/06 , H01L29/739
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/0869 , H01L29/1095 , H01L29/456 , H01L29/66734 , H01L29/7808
摘要： A method of manufacturing a semiconductor device, includes: forming a first and a second trench regions adjacent from each other in a first conductivity type semiconductor base; forming a second conductivity type semiconductor region in the semiconductor base between the first and second trench regions; forming a mask on the second conductivity type semiconductor region, the mask covering a central portion between the first and second trench regions; performing ion implantation of a first conductivity type impurity in the second conductivity type semiconductor region with the mask to form a first conductivity type first region and a first conductivity type second region separated from the first conductivity type first region; and performing heat treatment to diffuse the impurity in the first and second regions and to form a connection region between the first and second regions, connection region being shallower than the first and second regions after the heat treatment.
摘要翻译：一种制造半导体器件的方法包括：在第一导电类型半导体基底中形成彼此相邻的第一和第二沟槽区域; 在所述第一和第二沟槽区域之间的所述半导体基底中形成第二导电类型半导体区域; 在所述第二导电类型半导体区域上形成掩模，所述掩模覆盖所述第一和第二沟槽区域之间的中心部分; 在所述第二导电型半导体区域中用所述掩模进行第一导电型杂质的离子注入，以形成与所述第一导电类型的第一区域分离的第一导电类型的第一区域和第一导电类型的第二区域; 并且进行热处理以扩散第一和第二区域中的杂质，并且在第一和第二区域之间形成连接区域，连接区域比热处理后的第一和第二区域浅。

3. 发明申请

US20080111168A1 TRANSISTOR AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：晶体管及其制造方法
公开(公告)号：US20080111168A1
公开(公告)日：2008-05-15
申请号：US11936106
申请日：2007-11-07
申请人： Takayoshi ANDOU , Kenya KOBAYASHI
发明人： Takayoshi ANDOU , Kenya KOBAYASHI
IPC分类号： H01L29/78 , H01L21/04
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/086 , H01L29/0869 , H01L29/456 , H01L29/66734
摘要： An improved coupling stability between the source region and the source electrode of the transistor is achieved. In the method for manufacturing the MOSFET, the p-type base region is formed in a semiconductor layer, and after the p-type base region is formed in the surface portion of the n+ type source region, the higher concentration source region extending from the side edge of the n+ type source region to the lateral side of the n+ type source region is formed in the surface portion of the p-type base region. Then, the source electrode coupled to the higher concentration source region is formed. This allows providing an improved coupling stability between the source electrode and the source region when a misalignment is occurred in the location for forming the source electrode during the formation of the source electrode to be coupled to the first source region.
摘要翻译：实现了晶体管的源极区域和源极之间的耦合稳定性的改善。在MOSFET的制造方法中，在半导体层中形成p型基极区域，在n +型源极区域的表面部分形成p型基极区域后，从在p型基极区域的表面部分形成有n +型源极区域的侧面与n +型源极区域的侧面。然后，形成耦合到较高浓度源极区的源电极。这允许当在要耦合到第一源极区域的源电极的形成期间在用于形成源电极的位置中发生未对准时，在源电极和源极区域之间提供改进的耦合稳定性。

4. 发明申请

US20080274599A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A TRENCH SURROUNDING PLURAL UNIT CELLS 有权
标题翻译：制造具有TRENCH环绕的PLUAL单元电池的半导体器件的方法
公开(公告)号：US20080274599A1
公开(公告)日：2008-11-06
申请号：US12165991
申请日：2008-07-01
申请人： Kenya KOBAYASHI
发明人： Kenya KOBAYASHI
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0696 , H01L29/1095 , H01L29/66734
摘要： A semiconductor device comprises a plurality of unit cells, each comprising a vertical metal oxide semiconductor field effect transistor (MOSFET). The unit cell includes a first source region formed in a first base region, a second source region formed in the first base region and separated from the first source region, and a second base region formed in the first base region and disposed between the first and second source regions. The semiconductor device further comprises a trench gate formed in a vicinity of each of the plurality of unit cells. The second base region of an unit cell is separated from the second base region of an adjacent unit cell, and the first or second source region of an unit cell is separated from the first or second source region of an adjacent unit cell.
摘要翻译：半导体器件包括多个单元电池，每个单元电池包括垂直金属氧化物半导体场效应晶体管（MOSFET）。单位电池包括形成在第一基极区域中的第一源极区域，形成在第一基极区域中并与第一源极区域分离的第二源极区域和形成在第一基极区域中并且设置在第一和第二基极区域之间的第二基极区域第二源区。半导体器件还包括形成在多个单元电池中的每一个附近的沟槽栅极。单位单元的第二基区与相邻单元的第二基区分离，并且单位单元的第一或第二源区与相邻单元的第一或第二源区分离。

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