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    • 4. 发明授权
    • Semiconductor device and method for manufacturing the same
    • 半导体装置及其制造方法
    • US07704827B2
    • 2010-04-27
    • US11984043
    • 2007-11-13
    • Yoshimitsu MuraseKenya KobayashiHideo YamamotoAtsushi Kaneko
    • Yoshimitsu MuraseKenya KobayashiHideo YamamotoAtsushi Kaneko
    • H01L21/8242
    • H01L29/7813H01L29/4236H01L29/66734
    • An epitaxial layer is formed on an n+ semiconductor substrate by epitaxial growth. A gate trench is formed to the surface of gate trench so that the bottom of gate trench reaches middle of the epitaxial layer. A gate insulator is formed on the inner wall of gate trench and a polysilicon is formed in the gate trench with the gate insulator interposed therebetween. An HTO film is formed on the surface of the polysilicon and the n− epitaxial layer. At this time, an ion plantation is performed to the epitaxial layer through the HTO film. Hence, a p diffused base layer, an n+ diffused source layer, an n+ diffused source layer is formed. A CVD oxide film is formed on the HTO film. After a BPSG having flowability is deposited on the CVD oxide film, the BPSG film is planarized with a heat treatment of 900-1100 degree Celsius.
    • 通过外延生长在n +半导体衬底上形成外延层。 栅极沟槽形成在栅极沟槽的表面,使得栅极沟槽的底部到达外延层的中间。 栅极绝缘体形成在栅极沟槽的内壁上,并且栅极沟槽中形成多晶硅,栅极绝缘体插入其间。 在多晶硅和n外延层的表面上形成HTO膜。 此时,通过HTO膜对外延层进行离子种植。 因此,形成p扩散基极层,n +扩散源极层,n +扩散源极层。 在HTO膜上形成CVD氧化膜。 在具有流动性的BPSG沉积在CVD氧化物膜上之后,通过900-1100摄氏度的热处理将BPSG膜平坦化。
    • 8. 发明申请
    • Semiconductor device and method for manufacturing the same
    • 半导体装置及其制造方法
    • US20120043604A1
    • 2012-02-23
    • US13317781
    • 2011-10-28
    • Yoshimitsu MURASEKenya KOBAYASHIHideo YAMAMOTOAtsushi KANEKO
    • Yoshimitsu MURASEKenya KOBAYASHIHideo YAMAMOTOAtsushi KANEKO
    • H01L29/78
    • H01L29/7813H01L29/4236H01L29/66734
    • A semiconductor device includes a semiconductor layer, a first diffused region formed in the semiconductor layer, a second diffused region formed in the first diffused region, a trench formed in the semiconductor layer, a gate electrode disposed in the trench, a top surface of the gate electrode being lower than a top surface of the semiconductor layer and sagging downwards in a center thereof, a non-doped silicate glass film disposed in the trench and formed over the gate electrode, a top surface of the silicate glass film sagging downwards in a center thereof, an oxide film disposed in the trench and formed over the non-doped silicate glass film, a top surface of the oxide film sagging downwards in a center, and a source electrode formed over the semiconductor layer so that the source electrode contacts the first and second diffusion regions, and the oxide film at the top surface thereof.
    • 半导体器件包括半导体层,形成在半导体层中的第一扩散区域,形成在第一扩散区域中的第二扩散区域,形成在半导体层中的沟槽,设置在沟槽中的栅极电极, 栅电极低于半导体层的顶表面并且在其中心向下流动,设置在沟槽中并形成在栅电极上的未掺杂硅酸盐玻璃膜,硅酸盐玻璃膜的顶表面向下垂下 中心,设置在沟槽中并形成在非掺杂硅酸盐玻璃膜上的氧化物膜,氧化膜在中心向下垂的顶表面和形成在半导体层上的源电极,使得源电极接触 第一和第二扩散区,以及其顶表面处的氧化物膜。