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1. 发明申请

US20110179868A1 PHYSICAL QUANTITY SENSOR SYSTEM AND PHYSICAL QUANTITY SENSOR DEVICE 审中-公开
标题翻译：物理量传感器系统和物理量传感器装置
公开(公告)号：US20110179868A1
公开(公告)日：2011-07-28
申请号：US13085823
申请日：2011-04-13
申请人： Yoichi KAINO , Motonori Taniguchi , Fumihito Inukai
发明人： Yoichi KAINO , Motonori Taniguchi , Fumihito Inukai
IPC分类号： G01P15/097
CPC分类号： G01C19/5607 , G01C19/5614 , G01C19/5776 , H03M1/64
摘要： A physical quantity sensor system drives a physical quantity sensor and detects a physical quantity signal from a sensor signal. An analog-to-digital conversion circuit respectively converts a monitor signal and the sensor signal to a digital monitor signal and a digital sensor signal. A drive control circuit controls a drive signal according to the digital monitor signal. A phase adjustment circuit adjusts the phase difference between the digital monitor signal and the digital sensor signal. A detection circuit detects the physical quantity signal by multiplying the digital monitor signal by the digital sensor signal after the phase difference adjustment by the phase adjustment circuit.
摘要翻译：物理量传感器系统驱动物理量传感器并从传感器信号检测物理量信号。模拟 - 数字转换电路分别将监视信号和传感器信号转换为数字监视信号和数字传感器信号。驱动控制电路根据数字监视信号控制驱动信号。相位调整电路调整数字监视信号与数字传感器信号之间的相位差。检测电路通过在由相位调整电路进行相位差调整之后将数字监视信号乘以数字传感器信号来检测物理量信号。

2. 发明申请

US20110179872A1 DRIVE CIRCUIT AND PHYSICAL QUANTITY SENSOR DEVICE 审中-公开
标题翻译：驱动电路和物理量传感器器件
公开(公告)号：US20110179872A1
公开(公告)日：2011-07-28
申请号：US13052855
申请日：2011-03-21
申请人： Yoichi Kaino , Motonori Taniguchi , Fumihito Inukai
发明人： Yoichi Kaino , Motonori Taniguchi , Fumihito Inukai
IPC分类号： G01H17/00
CPC分类号： G01C19/5614
摘要： An amplitude detection circuit detects the amplitude value of a monitor signal responsive to self-excited vibration of a physical quantity sensor. A waveform shaping circuit converts the monitor signal to a pulse signal. A pulse amplitude modulation circuit adjusts the amplitude of the pulse signal according to the amplitude value obtained by the amplitude detection circuit and outputs the result as a drive signal for control of the self-excited vibration of the physical quantity sensor.
摘要翻译：振幅检测电路响应于物理量传感器的自激振动来检测监视信号的振幅值。波形整形电路将监视信号转换成脉冲信号。脉冲幅度调制电路根据由振幅检测电路获得的振幅值来调节脉冲信号的幅度，并输出该结果作为用于物理量传感器的自激振动的控制的驱动信号。

3. 发明授权

US08013647B2 Physical quantity detection circuit and physical quantity sensor device 有权
标题翻译：物理量检测电路和物理量传感器装置
公开(公告)号：US08013647B2
公开(公告)日：2011-09-06
申请号：US12621837
申请日：2009-11-19
申请人： Fumihito Inukai , Seiichi Muroya , Yoichi Kaino
发明人： Fumihito Inukai , Seiichi Muroya , Yoichi Kaino
IPC分类号： H03L7/00
CPC分类号： G01C19/5607 , G01P15/125
摘要： A physical quantity detection circuit (12) is used for a physical quantity sensor (10) that outputs a sensor signal according to a physical quantity given externally. A phase adjustment circuit (100) receives a reference clock (CKref) and operates in synchronization with an operation clock (CKa), to delay a transition edge of the reference clock by a predetermined number of pulses of the operation clock. A detection circuit (104) detects a physical quantity signal from the sensor signal (Ssnc) using a transition edge of a clock (SSS) from the phase adjustment circuit (100) as the reference.
摘要翻译：物理量检测电路（12）用于根据外部给出的物理量输出传感器信号的物理量传感器（10）。相位调整电路（100）接收参考时钟（CKref）并与操作时钟（CKa）同步地操作，以将参考时钟的转换边缘延迟预定数量的操作时钟的脉冲。检测电路（104）使用来自相位调整电路（100）的时钟（SSS）的转移边缘作为基准，从传感器信号（Ssnc）检测物理量信号。

4. 发明授权

US08069009B2 Physical quantity detection circuit and physical quantity sensor device 有权
标题翻译：物理量检测电路和物理量传感器装置
公开(公告)号：US08069009B2
公开(公告)日：2011-11-29
申请号：US12618055
申请日：2009-11-13
申请人： Fumihito Inukai , Seiichi Muroya , Yoichi Kaino
发明人： Fumihito Inukai , Seiichi Muroya , Yoichi Kaino
IPC分类号： G04F5/14 , G04F3/06 , G06F3/05 , G06F13/20
CPC分类号： G01P15/125 , G01C19/5607 , G01P2015/0828
摘要： A physical quantity detection circuit (12) is used for a physical quantity sensor (10) that outputs a sensor signal according to a physical quantity given externally. A sampling phase adjustment circuit (100) adjusts the phase of a sampling clock (CKa). An analog-to-digital converter circuit (104) converts the sensor signal (Ssnc) to a digital sensor signal (Dsnc) in synchronization with the sampling clock (CKsp) phase-adjusted by the sampling phase adjustment circuit. A detection circuit (107) detects the physical quantity based on the digital sensor signal (Dsnc) from the analog-to-digital converter circuit.
摘要翻译：物理量检测电路（12）用于根据外部给出的物理量输出传感器信号的物理量传感器（10）。采样相位调整电路（100）调整采样时钟（CKa）的相位。模数转换器电路（104）与由采样相位调整电路相位调制的采样时钟（CKsp）同步地将传感器信号（Ssnc）转换为数字传感器信号（Dsnc）。检测电路（107）根据来自模拟 - 数字转换器电路的数字传感器信号（Dsnc）检测物理量。

5. 发明申请

US20100237909A1 PHYSICAL QUANTITY DETECTION CIRCUIT AND PHYSICAL QUANTITY SENSOR DEVICE 有权
标题翻译：物理量检测电路和物理量传感器器件
公开(公告)号：US20100237909A1
公开(公告)日：2010-09-23
申请号：US12599779
申请日：2009-01-27
申请人： Fumihito Inukai , Yoichi Kaino
发明人： Fumihito Inukai , Yoichi Kaino
IPC分类号： H03K3/00 , G06G7/16
CPC分类号： G01C19/5607 , G01P15/125 , G01P2015/0828
摘要： A physical quantity detection circuit (12) is used for a physical quantity sensor (10) that outputs a sensor signal according to a physical quantity given externally. In the physical quantity detection circuit (12), an analog-to-digital converter (104) converts an analog sensor signal (Ssnc) to a digital sensor signal (Dsnc). A digital filter (100) attenuates a frequency component of the digital sensor signal (Dsnc) that is higher than a predetermined cutoff frequency. A multiplier (106) multiplies a digital sensor signal (Dps) having passed the digital filter (100) by a digital detection signal (Ddet) to detect a digital physical quantity signal (Dphy).
摘要翻译：物理量检测电路（12）用于根据外部给出的物理量输出传感器信号的物理量传感器（10）。在物理量检测电路（12）中，模拟数字转换器（104）将模拟传感器信号（Ssnc）转换为数字传感器信号（Dsnc）。数字滤波器（100）衰减高于预定截止频率的数字传感器信号（Dsnc）的频率分量。乘法器（106）将通过数字滤波器（100）的数字传感器信号（Dps）乘以数字检测信号（Ddet）以检测数字物理量信号（Dphy）。

6. 发明授权

US08093926B2 Physical quantity detection circuit and physical quantity sensor device 有权
标题翻译：物理量检测电路和物理量传感器装置
公开(公告)号：US08093926B2
公开(公告)日：2012-01-10
申请号：US12599779
申请日：2009-01-27
申请人： Fumihito Inukai , Yoichi Kaino
发明人： Fumihito Inukai , Yoichi Kaino
IPC分类号： H03K3/00
CPC分类号： G01C19/5607 , G01P15/125 , G01P2015/0828
摘要： A physical quantity detection circuit (12) is used for a physical quantity sensor (10) that outputs a sensor signal according to a physical quantity given externally. In the physical quantity detection circuit (12), an analog-to-digital converter (104) converts an analog sensor signal (Ssnc) to a digital sensor signal (Dsnc). A digital filter (100) attenuates a frequency component of the digital sensor signal (Dsnc) that is higher than a predetermined cutoff frequency. A multiplier (106) multiplies a digital sensor signal (Dps) having passed the digital filter (100) by a digital detection signal (Ddet) to detect a digital physical quantity signal (Dphy).
摘要翻译：物理量检测电路（12）用于根据外部给出的物理量输出传感器信号的物理量传感器（10）。在物理量检测电路（12）中，模拟数字转换器（104）将模拟传感器信号（Ssnc）转换为数字传感器信号（Dsnc）。数字滤波器（100）衰减高于预定截止频率的数字传感器信号（Dsnc）的频率分量。乘法器（106）将通过数字滤波器（100）的数字传感器信号（Dps）乘以数字检测信号（Ddet）以检测数字物理量信号（Dphy）。

7. 发明申请

US20100126271A1 INERTIAL VELOCITY SENSOR SIGNAL PROCESSING CIRCUIT AND INERTIAL VELOCITY SENSOR DEVICE INCLUDING THE SAME 审中-公开
标题翻译：惯性速度传感器信号处理电路和包括其中的惯性速度传感器装置
公开(公告)号：US20100126271A1
公开(公告)日：2010-05-27
申请号：US12599008
申请日：2008-10-30
申请人： Fumihito Inukai , Hitoshi Kobayashi
发明人： Fumihito Inukai , Hitoshi Kobayashi
IPC分类号： G01C19/56
CPC分类号： G01C19/5607 , G01C19/56
摘要： An inertial velocity sensor signal processing circuit (12, 13, 14) used together with an inertial velocity sensor element (11) includes a first signal processing circuit (12, 13) which operates with a first clock (CLK1) and a second signal processing circuit (14) which operates with a second clock (CLK2) which does not synchronize with the first clock.
摘要翻译：与惯性速度传感器元件（11）一起使用的惯性速度传感器信号处理电路（12,13,14）包括第一信号处理电路（12,13），其以第一时钟（CLK1）和第二信号处理电路（14），其以与第一时钟不同步的第二时钟（CLK2）操作。

8. 发明授权

US07148829B2 Delta-sigma modulation circuit with gain control function 有权
标题翻译：具增益控制功能的Δ-Σ调制电路
公开(公告)号：US07148829B2
公开(公告)日：2006-12-12
申请号：US11240575
申请日：2005-10-03
申请人： Fumihito Inukai
发明人： Fumihito Inukai
IPC分类号： H03M1/62
CPC分类号： H03M3/492 , H03M3/486
摘要： A delta-sigma modulation circuit with a gain control function includes a variable gain amplifier, a control unit that controls the gain of the variable gain amplifier, a delta-sigma modulator that inputs an output from the variable gain amplifier, and a filter circuit that inputs an output from the delta-sigma modulator. The control unit that controls the gain of the variable gain amplifier gain controls the delta-sigma modulator. By this, the optimum dynamic range is obtained according to the setting level of the variable gain amplifier without causing the dynamic range to vary depending on the setting level of the variable gain amplifier.
摘要翻译：具有增益控制功能的Δ-Σ调制电路包括可变增益放大器，控制可变增益放大器的增益的控制单元，输入可变增益放大器的输出的Δ-Σ调制器和滤波电路，输入来自Δ-Σ调制器的输出。控制可变增益放大器增益增益的控制单元控制Δ-Σ调制器。由此，可根据可变增益放大器的设定电平获得最佳动态范围，而不会使动态范围根据可变增益放大器的设定电平而变化。

9. 发明申请

US20060164274A1 Cascade-type variable-order delta-sigma modulator 有权
标题翻译：级联型可变阶Δ-Σ调制器
公开(公告)号：US20060164274A1
公开(公告)日：2006-07-27
申请号：US11338651
申请日：2006-01-25
申请人： Masato Nakakita , Fumihito Inukai , Hitoshi Kobayashi
发明人： Masato Nakakita , Fumihito Inukai , Hitoshi Kobayashi
IPC分类号： H03M3/00
CPC分类号： H03M3/394 , H03M3/414
摘要： A cascade-type variable-order delta-sigma modulator with low power consumption that can change the number of stages of the quantization loops, which are connected in a cascade configuration, to an optimum number depending on peripheral circuitries in a configuration as simple as possible. The present invention includes first to nth stages of delta-sigma modulating type quantization loops (n is an integer equal to or more than 2) connected in a cascade configuration, and a noise rejecting circuit. Each quantization loop quantizes an input signal, outputs the quantization result, and feeds back the quantization result to itself. The noise rejecting circuit rejects a quantization noise of the first stage of quantization loop, and comprises (n−1) selectors for activating and de-activating the respective output signals of the second and succeeding stages of the quantization loops in compliance with the control signal.
摘要翻译：具有低功耗的级联型可变阶Δ-Σ调制器，其可以将串联配置中连接的量化循环的级数改变为最佳数量，这取决于尽可能简单的配置中的外设电路。本发明包括以级联配置连接的Δ-Σ调制型量化环（n为等于或大于2的整数）的第一至第N级，以及噪声抑制电路。每个量化环对输入信号进行量化，输出量化结果，并将量化结果反馈给自身。噪声抑制电路拒绝量化环路的第一级的量化噪声，并且包括用于根据控制信号激活和去激活量化环路的第二级和后级的各个输出信号的（n-1）个选择器。

10. 发明授权

US07084797B2 Delta sigma modulating apparatus 有权
标题翻译：三角Σ调制装置
公开(公告)号：US07084797B2
公开(公告)日：2006-08-01
申请号：US10973254
申请日：2004-10-27
申请人： Akio Yokoyama , Hitoshi Kobayashi , Fumihito Inukai
发明人： Akio Yokoyama , Hitoshi Kobayashi , Fumihito Inukai
IPC分类号： H03M3/00
CPC分类号： H03M3/418
摘要： A first second- or higher-order delta sigma modulator and a second second- or higher-order delta sigma modulator having a notch characteristic are cascaded together, and a delayed signal of the output of the first delta sigma modulator and a differential signal of the output of the second delta sigma modulator are added together. The amount of feedback from the output portion to the input portion of the first delta sigma modulator and the amount of feedback from the output portion to the input portion of the second delta sigma modulator are made the same.
摘要翻译：具有陷波特性的第一第二或更高阶ΔΣ调制器和第二二阶或更高阶ΔΣ调制器级联在一起，并且第一ΔΣ调制器的输出的延迟信号和将第二ΔΣ调制器的输出相加在一起。使得从第一Δ-Σ调制器的输出部分到输入部分的反馈量和从第二ΔΣ调制器的输出部分到输入部分的反馈量相同。

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