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1. 发明授权

US07474244B2 Current addition type digital analog converter 失效
标题翻译：当前加法型数字模拟转换器
公开(公告)号：US07474244B2
公开(公告)日：2009-01-06
申请号：US11889129
申请日：2007-08-09
申请人： Akira Kawabe , Akio Yokoyama
发明人： Akira Kawabe , Akio Yokoyama
IPC分类号： H03M1/66
CPC分类号： H03M1/002 , H03M1/745
摘要： A digital analog converter includes a current conversion section and a voltage conversion section. The current conversion section has a first output terminal and a second output terminal. The first output terminal outputs a first current and a second output terminal outputs a second current, the first current varying in value according to inputted digital data, the sum of the first current and the second current becoming a constant current. The voltage conversion section converts the first current to a corresponding first voltage and produces an offset voltage on the basis of the constant current and outputs the sum of the first voltage and the offset voltage as an output voltage.
摘要翻译：数字模拟转换器包括电流转换部分和电压转换部分。电流转换部分具有第一输出端和第二输出端。第一输出端子输出第一电流，第二输出端子输出第二电流，第一电流根据输入的数字数据变化值，第一电流和第二电流的和变为恒定电流。电压转换部将第一电流转换为对应的第一电压，并根据恒定电流产生偏移电压，并输出第一电压和偏移电压的和作为输出电压。

2. 发明申请

US20060262230A1 Receiver if system having image rejection mixer and band-pass filter 审中-公开
标题翻译：接收机如果系统具有镜像抑制混频器和带通滤波器
公开(公告)号：US20060262230A1
公开(公告)日：2006-11-23
申请号：US11431324
申请日：2006-05-10
申请人： Manabu Ookubo , Akio Yokoyama , Masayuki Ozasa , Takao Soramoto
发明人： Manabu Ookubo , Akio Yokoyama , Masayuki Ozasa , Takao Soramoto
IPC分类号： H04N5/50
CPC分类号： H04B1/28 , H04N5/4446
摘要： The receiver IF system or the signal selection device of the present invention includes: frequency converters that obtain polyphase intermediate-frequency signals for suppressing an image component of an RF signal from an input signal; a polyphase filter for removing an image component from the polyphase intermediate-frequency signals; and a band-pass filter composed of an N-pass filter for selecting a channel of an intermediate-frequency signal that is obtained by removing an image component from an output of the polyphase filter. An image rejection filter and a channel selection filter can be integrated at low cost with higher performance, and an area of a substrate for reception can be reduced.
摘要翻译：本发明的接收机IF系统或信号选择装置包括：频率转换器，其从输入信号获得用于抑制RF信号的图像分量的多相中频信号; 用于从所述多相中频信号中去除图像分量的多相滤波器; 以及带通滤波器，其由用于选择通过从多相滤波器的输出去除图像分量而获得的中频信号的通道的N通滤波器组成。可以以低成本，高性能地集成图像抑制滤波器和通道选择滤波器，并且可以减少用于接收的基板的面积。

3. 发明授权

US07528659B2 Fully differential amplification device 有权
标题翻译：全差分放大器
公开(公告)号：US07528659B2
公开(公告)日：2009-05-05
申请号：US11963944
申请日：2007-12-24
申请人： Akio Yokoyama , Makoto Ikuma
发明人： Akio Yokoyama , Makoto Ikuma
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45659 , H03F2203/45008 , H03F2203/45681
摘要： An auxiliary current source is provided that includes MOS transistors feeding startup auxiliary current to the input portion of an output common mode voltage generation circuit amplifying the output of a differential amplifier and generating an output common voltage, and a correction current source is provided that includes MOS transistors feeding correction current corresponding to the auxiliary current to a common mode feedback comparator. Thereby, a control loop that controls the output common voltage to a predetermined voltage even when the input of the differential amplifier is outside the dynamic range at the beginning is correctly started up, thereby stabilizing the output common voltage at a desired voltage.
摘要翻译：提供辅助电流源，其包括MOS晶体管，其将启动辅助电流馈送到放大差分放大器的输出并产生输出公共电压的输出共模电压产生电路的输入部分，并且提供包括MOS的校正电流源晶体管馈送对应于辅助电流的校正电流到共模反馈比较器。因此，即使在差分放大器的输入在开始的动态范围之外的情况下，也可以正确启动将输出公共电压控制为预定电压的控制回路，从而将输出公共电压稳定在期望的电压。

4. 发明申请

US20080157873A1 FULLY DIFFERENTIAL AMPLIFICATION DEVICE 有权
标题翻译：完全差分放大器件
公开(公告)号：US20080157873A1
公开(公告)日：2008-07-03
申请号：US11963944
申请日：2007-12-24
申请人： Akio Yokoyama , Makoto Ikuma
发明人： Akio Yokoyama , Makoto Ikuma
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45659 , H03F2203/45008 , H03F2203/45681
摘要： An auxiliary current source is provided that includes MOS transistors feeding startup auxiliary current to the input portion of an output common mode voltage generation circuit amplifying the output of a differential amplifier and generating an output common voltage, and a correction current source is provided that includes MOS transistors feeding correction current corresponding to the auxiliary current to a common mode feedback comparator. Thereby, a control loop that controls the output common voltage to a predetermined voltage even when the input of the differential amplifier is outside the dynamic range at the beginning is correctly started up, thereby stabilizing the output common voltage at a desired voltage.
摘要翻译：提供辅助电流源，其包括MOS晶体管，其将启动辅助电流馈送到放大差分放大器的输出并产生输出公共电压的输出共模电压产生电路的输入部分，并且提供包括MOS的校正电流源晶体管馈送对应于辅助电流的校正电流到共模反馈比较器。因此，即使在差分放大器的输入在开始的动态范围之外的情况下，也可以正确启动将输出公共电压控制为预定电压的控制回路，从而将输出公共电压稳定在期望的电压。

5. 发明授权

US07116170B2 Differential amplifier and calculation amplifier 有权
标题翻译：差分放大器和计算放大器
公开(公告)号：US07116170B2
公开(公告)日：2006-10-03
申请号：US10510388
申请日：2003-10-08
申请人： Masayuki Ozasa , Akio Yokoyama
发明人： Masayuki Ozasa , Akio Yokoyama
IPC分类号： H03F3/45
CPC分类号： H03F3/211 , H03F3/45183 , H03F3/4521 , H03F3/45475 , H03F3/72 , H03F2200/258 , H03F2200/78 , H03F2203/45138 , H03F2203/45366 , H03F2203/45466 , H03F2203/45506 , H03F2203/45612 , H03F2203/7203 , H03F2203/7236 , H03G1/0088 , H03G3/301
摘要： In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4). As a result, a gain is equal over the entire range of input operating voltage and a high-speed operation is performed.
摘要翻译：在用于放大信号的差分放大器和运算放大器中，由第一和第二信号组成的差分信号被输入到一对输入端子（1,2）。当第一信号的电压例如小于参考电压源（15）的电压值时，比较器（13）感测它，并且开关电路（12）切换到第一电流源（6）和来自第三电流源（11）的电流流入第一电流源（6），使得电流被禁止在第一差分耦合（4）中流动。结果，输入的差分信号仅通过第二差分耦合（5）被放大和输出。另一方面，在第一信号的电压超过参考电压源（15）的电压的情况下，开关电路（12）切换到电流源（7），使得输入的差分信号被放大并且仅通过第一差分耦合（4）输出。结果，在整个输入工作电压范围内的增益相等，并且执行高速操作。

6. 发明申请

US20050151587A1 Differential amplifier and calculation amplifier 有权
标题翻译：差分放大器和计算放大器
公开(公告)号：US20050151587A1
公开(公告)日：2005-07-14
申请号：US10510388
申请日：2003-10-08
申请人： Masayuki Ozasa , Akio Yokoyama
发明人： Masayuki Ozasa , Akio Yokoyama
IPC分类号： H03F3/45 , H03F3/68 , H03F3/72 , H03G1/00 , H03G3/30
CPC分类号： H03F3/211 , H03F3/45183 , H03F3/4521 , H03F3/45475 , H03F3/72 , H03F2200/258 , H03F2200/78 , H03F2203/45138 , H03F2203/45366 , H03F2203/45466 , H03F2203/45506 , H03F2203/45612 , H03F2203/7203 , H03F2203/7236 , H03G1/0088 , H03G3/301
摘要： In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4). As a result, a gain is equal over the entire range of input operating voltage and a high-speed operation is performed.
摘要翻译：在用于放大信号的差分放大器和运算放大器中，由第一和第二信号组成的差分信号被输入到一对输入端子（1,2）。当第一信号的电压例如小于参考电压源（15）的电压值时，比较器（13）感测它，并且开关电路（12）切换到第一电流源（6）和来自第三电流源（11）的电流流入第一电流源（6），使得电流被禁止在第一差分耦合（4）中流动。结果，输入的差分信号仅通过第二差分耦合（5）被放大和输出。另一方面，在第一信号的电压超过参考电压源（15）的电压的情况下，开关电路（12）切换到电流源（7），使得输入的差分信号被放大并且仅通过第一差分耦合（4）输出。结果，在整个输入工作电压范围内的增益相等，并且执行高速操作。

7. 发明授权

US5012201A Variable impedance circuit 失效
标题翻译：可变阻抗电路
公开(公告)号：US5012201A
公开(公告)日：1991-04-30
申请号：US426229
申请日：1989-10-25
申请人： Yoichi Morita , Hiroshi Komori , Akio Yokoyama
发明人： Yoichi Morita , Hiroshi Komori , Akio Yokoyama
IPC分类号： H03H11/46
CPC分类号： H03H11/46
摘要： A variable impedance circuit includes a first differential amplifier circuit having an input terminal pair, an output terminal pair and a capacitive element connected between the emitters of a transistor pair. The variable impedance circuit further inclludes a second differential amplifier circuit having an input terminal pair and an output terminal pair. The output terminal pair of the first differential amplifier circuit is connected to the input terminal pair of the second differential amplifier circuit. Furthermore, the output terminal pair of the second differential amplifier circuit is connected to the input terminal pair of the first differential amplifier circuit.
摘要翻译：可变阻抗电路包括具有输入端子对的第一差分放大器电路，连接在晶体管对的发射极之间的输出端子对和电容元件。可变阻抗电路还包括具有输入端子对和输出端子对的第二差分放大器电路。第一差分放大器电路的输出端子对连接到第二差分放大器电路的输入端子对。此外，第二差分放大器电路的输出端子对连接到第一差分放大器电路的输入端子对。

8. 发明申请

US20070001761A1 Differential amplifier and operational amplifier 有权
标题翻译：差分放大器和运算放大器
公开(公告)号：US20070001761A1
公开(公告)日：2007-01-04
申请号：US11518919
申请日：2006-09-12
申请人： Masayuki Ozasa , Akio Yokoyama
发明人： Masayuki Ozasa , Akio Yokoyama
IPC分类号： H03F3/45
CPC分类号： H03F3/211 , H03F3/45183 , H03F3/4521 , H03F3/45475 , H03F3/72 , H03F2200/258 , H03F2200/78 , H03F2203/45138 , H03F2203/45366 , H03F2203/45466 , H03F2203/45506 , H03F2203/45612 , H03F2203/7203 , H03F2203/7236 , H03G1/0088 , H03G3/301
摘要： In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (1, 2). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (15), a comparator (13) senses it and a switch circuit (12) switches to a first current source (6) and a current from a third current source (11) flows into the first current source (6) so that a current is inhibited from flowing in the first differential couple (4). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (5). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (15), on the other hand, the switch circuit (12) switches to a current source (7) so that the inputted differential signal is amplified and outputted only through the first differential couple (4). As a result, a gain is equal over the entire range of input operating voltage and a high-speed operation is performed.
摘要翻译：在用于放大信号的差分放大器和运算放大器中，由第一和第二信号组成的差分信号被输入到一对输入端子（1,2）。当第一信号的电压例如小于参考电压源（15）的电压值时，比较器（13）感测它，并且开关电路（12）切换到第一电流源（6）和来自第三电流源（11）的电流流入第一电流源（6），使得电流被禁止在第一差分耦合（4）中流动。结果，输入的差分信号仅通过第二差分耦合（5）被放大和输出。另一方面，在第一信号的电压超过参考电压源（15）的电压的情况下，开关电路（12）切换到电流源（7），使得输入的差分信号被放大并且仅通过第一差分耦合（4）输出。结果，在整个输入工作电压范围内的增益相等，并且执行高速操作。

9. 发明申请

US20060244551A1 Passive polyphase filter 有权
标题翻译：被动多相滤波器
公开(公告)号：US20060244551A1
公开(公告)日：2006-11-02
申请号：US11409764
申请日：2006-04-24
申请人： Masayuki Ozasa , Akio Yokoyama , Manabu Ookubo , Takao Soramoto
发明人： Masayuki Ozasa , Akio Yokoyama , Manabu Ookubo , Takao Soramoto
IPC分类号： H03H7/01
CPC分类号： H03H7/21
摘要： Four input nodes I1-I4 for inputting 4-phase signals, four resistors R1-R4, four capacitors C1-C4, and four output nodes O1-O4 for outputting 4-phase signals are provided. The resistors and the capacitors are connected alternately in a loop, and the input nodes and output nodes are connected alternately to the respective nodes between the resistors and the capacitors sequentially. Each of the four resistors is composed of a group of three or more partial resistors, and three groups of the partial resistors R2a-R2c, R3a-R3c and R4a-R4c are collected respectively and arranged in the same attitude, while the partial resistors R1a-R1c of the remaining group are distributed into the other groups and arranged in the same line the same attitude as the partial resistors of each of the other groups. The regions of the thus collected groups are arranged in one direction. By simplifying the layout of the components and the shape of the wirings, influences on the characteristics by the parasitic elements are reduced, and complication in the layout and wirings can be suppressed even when using plural stages.
摘要翻译：提供用于输入四相信号的四个输入节点I 1 -I 4，四个电阻器R 1 -R 4，四个电容器C 1 -C 4和用于输出4相信号的四个输出节点O 1〜4 4。电阻器和电容器以环路交替连接，并且输入节点和输出节点交替地连接到电阻器和电容器之间的相应节点。四个电阻器中的每一个由三个或更多个部分电阻器组成，并且三个部分电阻器R 2 aR 2 c，R 3 aR 3 c和R 4 aR 4 c分别被收集并且以相同的姿态，而剩余组的部分电阻器R 1 aR 1 c分配到其他组中，并且以与每个其他组的部分电阻器相同的姿态排列成同一行。这样收集的组的区域被布置在一个方向上。通过简化部件的布局和配线的形状，减少了寄生元件对特性的影响，并且即使在使用多级时也能够抑制配线和布线的复杂化。

10. 发明授权

US06954161B2 Cascade delta-sigma modulator 失效
公开(公告)号：US06954161B2
公开(公告)日：2005-10-11
申请号：US10865885
申请日：2004-06-14
申请人： Fumihito Inukai , Akio Yokoyama , Hitoshi Kobayashi
发明人： Fumihito Inukai , Akio Yokoyama , Hitoshi Kobayashi
IPC分类号： H03M3/02 , H03M3/00
CPC分类号： H03M3/442 , H03M3/418
摘要： A delta-sigma modulation quantization loop, comprising an integration circuit for integrating the difference between an analog input signal and a feedback reference voltage, a local quantizer for quantizing the output of the integration circuit into a digital signal, and a DA converter for generating the feedback reference voltage from the digital output of the local quantizer, is used as a single stage, and a plurality of the stages are cascade-connected. In the second-stage and subsequent modulation quantization loops, the difference signal between the input of the local quantizer of the previous stage and the output of the DA converter of the previous stage is used as an analog input signal. The feedback reference voltages of the respective delta-sigma modulation quantization loops are set individually so as to be higher than the specified maximum voltage of the analog input signal to limit the gains of the respective delta-sigma modulation quantization loops. Gain setting devices are provided in a noise reduction circuit to roughly compensate the gains limited in the respective delta-sigma modulation quantization loops.

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