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1. 发明授权

US07502231B2 Thin printed circuit board for manufacturing chip scale package 失效
标题翻译：薄印刷电路板用于制造芯片级封装
公开(公告)号：US07502231B2
公开(公告)日：2009-03-10
申请号：US11950971
申请日：2007-12-05
申请人： Yi-Sung Hwang , Ho-Tae Jin , Hwan-Young Jang
发明人： Yi-Sung Hwang , Ho-Tae Jin , Hwan-Young Jang
IPC分类号： H05K7/00
CPC分类号： H05K3/0097 , H01L23/13 , H01L2924/0002 , H05K3/0052 , H05K2201/09909 , H05K2201/2009 , H05K2203/0169 , H01L2924/00
摘要： Provided is a thin printed circuit board (PCB) for manufacturing a chip scale package (CSP). The thin printed circuit board includes a plurality of unit printed circuit boards, each of which is comprised of a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards are arranged in a row and includes a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.
摘要翻译：提供了用于制造芯片级封装（CSP）的薄印刷电路板（PCB）。薄印刷电路板包括多个单元印刷电路板，每个单元印刷电路板包括电路图案，半导体芯片被粘附到该电路图案和围绕电路图案的基板。单元印刷电路板排列成一行，并且包括支撑模制件，该支撑模制件与每个单元印刷电路板的基板上的每个单元印刷电路板的电路图案间隔开预定间隔，并且沿着边缘形成为环形的薄印刷电路板。

2. 发明授权

US07323642B2 Thin printed circuit board for manufacturing chip scale package 失效
标题翻译：薄印刷电路板用于制造芯片级封装
公开(公告)号：US07323642B2
公开(公告)日：2008-01-29
申请号：US10893615
申请日：2004-07-16
申请人： Yi-Sung Hwang , Ho-Tae Jin , Hwan-young Jang
发明人： Yi-Sung Hwang , Ho-Tae Jin , Hwan-young Jang
IPC分类号： H05K1/03
CPC分类号： H05K3/0097 , H01L23/13 , H01L2924/0002 , H05K3/0052 , H05K2201/09909 , H05K2201/2009 , H05K2203/0169 , H01L2924/00
摘要： Provided is a thin printed circuit board (PCB) for manufacturing a chip scale package (CSP). The thin printed circuit board includes a plurality of unit printed circuit boards, each of which is comprised of a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards are arranged in a row and includes a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.
摘要翻译：提供了用于制造芯片级封装（CSP）的薄印刷电路板（PCB）。薄印刷电路板包括多个单元印刷电路板，每个单元印刷电路板包括电路图案，半导体芯片被粘附到该电路图案和围绕电路图案的基板。单元印刷电路板排列成一行，并且包括支撑模制件，该支撑模制件与每个单元印刷电路板的基板上的每个单元印刷电路板的电路图案间隔开预定间隔，并且沿着边缘形成为环形的薄印刷电路板。

3. 发明申请

US20080083561A1 THIN PRINTED CIRCUIT BOARD FOR MANUFACTURING CHIP SCALE PACKAGE 失效
标题翻译：薄印刷电路板制造芯片尺寸包装
公开(公告)号：US20080083561A1
公开(公告)日：2008-04-10
申请号：US11950971
申请日：2007-12-05
申请人： Yi-Sung Hwang , Ho-Tae JIN , Hwan-Young JANG
发明人： Yi-Sung Hwang , Ho-Tae JIN , Hwan-Young JANG
IPC分类号： H05K1/03
CPC分类号： H05K3/0097 , H01L23/13 , H01L2924/0002 , H05K3/0052 , H05K2201/09909 , H05K2201/2009 , H05K2203/0169 , H01L2924/00
摘要： Provided is a thin printed circuit board (PCB) for manufacturing a chip scale package (CSP). The thin printed circuit board includes a plurality of unit printed circuit boards, each of which is comprised of a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards are arranged in a row and includes a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.
摘要翻译：提供了用于制造芯片级封装（CSP）的薄印刷电路板（PCB）。薄印刷电路板包括多个单元印刷电路板，每个单元印刷电路板包括电路图案，半导体芯片被粘附到该电路图案和围绕电路图案的基板。单元印刷电路板排列成一行，并且包括支撑模制件，该支撑模制件与每个单元印刷电路板的基板上的每个单元印刷电路板的电路图案间隔开预定间隔，并且沿着边缘形成为环形的薄印刷电路板。

4. 发明申请

US20050011668A1 Thin printed circuit board for manufacturing chip scale package 失效
标题翻译：薄印刷电路板用于制造芯片级封装
公开(公告)号：US20050011668A1
公开(公告)日：2005-01-20
申请号：US10893615
申请日：2004-07-16
申请人： Yi-Sung Hwang , Ho-Tae Jin , Hwan-young Jang
发明人： Yi-Sung Hwang , Ho-Tae Jin , Hwan-young Jang
IPC分类号： H01L23/12 , H01L23/13 , H05K1/02 , H05K3/00 , H05K1/00
CPC分类号： H05K3/0097 , H01L23/13 , H01L2924/0002 , H05K3/0052 , H05K2201/09909 , H05K2201/2009 , H05K2203/0169 , H01L2924/00
摘要： Provided is a thin printed circuit board (PCB) for manufacturing a chip scale package (CSP). The thin printed circuit board includes a plurality of unit printed circuit boards, each of which is comprised of a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards are arranged in a row and includes a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.
摘要翻译：提供了用于制造芯片级封装（CSP）的薄印刷电路板（PCB）。薄印刷电路板包括多个单元印刷电路板，每个单元印刷电路板包括电路图案，半导体芯片被粘附到该电路图案和围绕电路图案的基板。单元印刷电路板排列成一行，并且包括支撑模制件，该支撑模制件与每个单元印刷电路板的基板上的每个单元印刷电路板的电路图案间隔开预定间隔，并且沿着边缘形成为环形的薄印刷电路板。

5. 发明授权

US06653727B2 Semiconductor chip package with direction-flexible mountability 失效
标题翻译：半导体芯片封装具有方向灵活的安装性
公开(公告)号：US06653727B2
公开(公告)日：2003-11-25
申请号：US10293532
申请日：2002-11-12
申请人： Yi-Sung Hwang , Sang-Woo Kim
发明人： Yi-Sung Hwang , Sang-Woo Kim
IPC分类号： H01L2348
CPC分类号： H01L23/50 , H01L2924/0002 , H05K1/181 , H01L2924/00
摘要： A semiconductor chip package with direction-flexible mountability comprising a switching circuit for switching a pin function according to the mounting direction of a package, a pair of pin-definition pins for defining the pin function and a pair of power supply leads, and a pair of ground leads. One of the power supply lead pair and the ground lead pair is rotation-symmetrical to the other, respectively. The semiconductor chip package with direction-flexible mountability in accordance with the present invention eliminates a process for indicating the mounting direction because the package can be mounted onto a substrate regardless the direction. Accordingly, the ID pin indication and a series of processes for testing the ID pin are eliminated and the malfunction due to the incorrect direction is prevented.
摘要翻译：一种具有方向灵活安装性的半导体芯片封装，包括根据封装的安装方向切换引脚功能的开关电路，用于限定引脚功能的一对引脚定义引脚和一对电源引线，以及一对的地线。电源引线对和接地引线对之一分别与另一个旋转对称。根据本发明的具有方向柔性安装性的半导体芯片封装消除了用于指示安装方向的过程，因为封装可以安装在基板上而与方向无关。因此，消除了ID引脚指示和用于测试ID引脚的一系列处理，并且防止了由于错误的方向引起的故障。

6. 发明授权

US08420945B2 Package substrate, semiconductor package having the package substrate 有权
标题翻译：封装衬底，具有封装衬底的半导体封装
公开(公告)号：US08420945B2
公开(公告)日：2013-04-16
申请号：US12882620
申请日：2010-09-15
申请人： Yi-Sung Hwang
发明人： Yi-Sung Hwang
IPC分类号： H05K1/03
CPC分类号： G01R31/2884 , G01R31/025 , H01L24/97 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00
摘要： A package substrate may include an insulating substrate, first circuit patterns, second circuit patterns and a test pattern. The first circuit patterns may be arranged on the insulating substrate. The second circuit patterns may be arranged on the insulating substrate. The second circuit patterns may be arranged between the first circuit patterns. The test pattern may be electrically connected between same polar terminals of the first circuit patterns and the second circuit patterns. Thus, electrical connections between the semiconductor chip and the circuit patterns may be tested before performing a process for cutting the package substrate.
摘要翻译：封装衬底可以包括绝缘衬底，第一电路图案，第二电路图案和测试图案。第一电路图案可以布置在绝缘基板上。第二电路图案可以布置在绝缘基板上。第二电路图案可以布置在第一电路图案之间。测试图案可以电连接在第一电路图案的相同极性端子和第二电路图案之间。因此，可以在执行用于切割封装衬底的工艺之前测试半导体芯片和电路图案之间的电连接。

7. 发明申请

US20110103031A1 PACKAGE SUBSTRATE, SEMICONDUCTOR PACKAGE HAVING THE PACKAGE SUBSTRATE 有权
标题翻译：封装基板，具有封装基板的半导体封装
公开(公告)号：US20110103031A1
公开(公告)日：2011-05-05
申请号：US12882620
申请日：2010-09-15
申请人： Yi-Sung Hwang
发明人： Yi-Sung Hwang
IPC分类号： H05K7/00 , H05K1/00
CPC分类号： G01R31/2884 , G01R31/025 , H01L24/97 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00
摘要： A package substrate may include an insulating substrate, first circuit patterns, second circuit patterns and a test pattern. The first circuit patterns may be arranged on the insulating substrate. The second circuit patterns may be arranged on the insulating substrate. The second circuit patterns may be arranged between the first circuit patterns. The test pattern may be electrically connected between same polar terminals of the first circuit patterns and the second circuit patterns. Thus, electrical connections between the semiconductor chip and the circuit patterns may be tested before performing a process for cutting the package substrate.
摘要翻译：封装衬底可以包括绝缘衬底，第一电路图案，第二电路图案和测试图案。第一电路图案可以布置在绝缘基板上。第二电路图案可以布置在绝缘基板上。第二电路图案可以布置在第一电路图案之间。测试图案可以电连接在第一电路图案的相同极性端子和第二电路图案之间。因此，可以在执行用于切割封装衬底的工艺之前测试半导体芯片和电路图案之间的电连接。

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