会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 6. 发明申请
    • Optical Module and a Mounting Structure Thereof
    • 光模块及其安装结构
    • US20140023315A1
    • 2014-01-23
    • US13989966
    • 2011-11-18
    • Toshiaki TakaiNorio ChujoSaori Hamamura
    • Toshiaki TakaiNorio ChujoSaori Hamamura
    • G02B6/42
    • G02B6/42G02B6/4253G02B6/4255
    • An optical module achieving optical coupling at a low cost and by a simple and convenient process is intended to be provided. For attaining the purpose, a transparent member sealing an optical device and an optical transmission channel are connected as an optical coupling structure. Specifically, optical coupling is achieved in an optical module having an optical device, a first substrate having the optical device mounted thereon, and a second substrate or a transparent resin provided over the first substrate so as to hermetically seal the optical device by connecting an optical transmission channel over the second substrate or the transparent resin at a portion in which light from the optical device is transmitted.
    • 旨在提供以低成本实现光耦合并且通过简单和方便的过程的光学模块。 为了实现这一目的,将光学装置和光传输通道密封的透明构件连接为光耦合结构。 具体地说,在具有光学装置的光学模块,安装有光学装置的第一基板和设置在第一基板上的第二基板或透明树脂的光学模块中实现光耦合,以通过连接光学装置来密封光学装置 透射通道在第二基板或透明树脂上,在其中透射来自光学装置的光的部分。
    • 10. 发明授权
    • Output buffer circuit and differential output buffer circuit, and transmission method
    • 输出缓冲电路和差分输出缓冲电路及其传输方式
    • US08324925B2
    • 2012-12-04
    • US13106926
    • 2011-05-13
    • Satoshi MuraokaNorio ChujoRitsuro Orihashi
    • Satoshi MuraokaNorio ChujoRitsuro Orihashi
    • H03K19/003
    • H03K19/018521
    • An output buffer includes inverters, a delay circuit for delaying an input signal, buffers and switches. The output buffer transmits a logic signal to a transmission path and, in accordance with an amount of signal attenuation in the transmission path, creates a waveform including four or more kinds of signal voltages. The buffers are redundantly connected in parallel, and the number of buffers concurrently turn ON is controlled by respective switches provided in series with output resistors of the buffers. By selecting the buffers of switches which are turned ON, the preemphasis amount and a number of preemphasis taps are adjusted through a selector logic selection signal so that the preemphasis amount is made variable and the ON resistance of the buffers is made constant.
    • 输出缓冲器包括反相器,用于延迟输入信号的延迟电路,缓冲器和开关。 输出缓冲器将逻辑信号发送到传输路径,并且根据传输路径中的信号衰减量产生包括四种或更多种信号电压的波形。 缓冲器并联冗余连接,同时导通的缓冲器的数量由与缓冲器的输出电阻器串联提供的相应开关控制。 通过选择接通的开关的缓冲器,通过选择器逻辑选择信号调整预加重量和预加重抽头数,使预加重量变为可变,并使缓冲器的导通电阻保持恒定。