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    • 4. 发明申请
    • DATA PROCESSOR AND ELECTRONIC CONTROL UNIT
    • 数据处理器和电子控制单元
    • US20130067258A1
    • 2013-03-14
    • US13698650
    • 2010-05-20
    • Toshiaki FuruyaKenichi NakashimaSusumu Hirata
    • Toshiaki FuruyaKenichi NakashimaSusumu Hirata
    • G06F1/32G06F1/24G06F1/06
    • G06F1/3203G06F1/3237Y02D10/126Y02D10/128Y02D50/20
    • A data processor (1) includes a plurality of oscillation circuits (13 and 24) that individually generate a first clock signal (HCK) and a second clock signal (LCK) with a lower frequency, in which a CPU (10) performs data processing in synchronization with the oscillation output of an oscillation circuit selected by a clock switching circuit (22). In a state where the low power consumption mode is set, the data processor stops the first clock signal and maintains the oscillation of the second clock signal, selects whether or not to initiate the oscillation of the first clock signal in response to the trigger to cancel the low power consumption mode, and initiates the oscillation of the first clock signal without the CPU interrupt process which is enabled by the cancellation of the low power consumption mode. During the time period of the power-on reset for returning from a power-off state, oscillation of the first clock signal is initiated on the condition that the externally provided power-on trigger is a predetermined trigger, and the oscillation of the first clock signal is inhibited in case that the trigger is a trigger other than the predetermined trigger.
    • 数据处理器(1)包括分别产生具有较低频率的第一时钟信号(HCK)和第二时钟信号(LCK)的多个振荡电路(13和24),其中CPU(10)执行数据处理 与由时钟切换电路(22)选择的振荡电路的振荡输出同步。 在设置低功耗模式的状态下,数据处理器停止第一时钟信号并维持第二时钟信号的振荡,响应于触发取消来选择是否启动第一时钟信号的振荡 低功耗模式,并且启动第一时钟信号的振荡,而不通过消除低功耗模式启用的CPU中断处理。 在从断电状态返回的上电复位的时间段期间,在外部提供的上电触发是预定触发的情况下开始第一时钟信号的振荡,并且第一时钟的振荡 在触发是除了预定触发之外的触发的情况下,信号被禁止。