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1. 发明申请

US20080025099A1 Non-Volatile Memory And Control With Improved Partial Page Program Capability 有权
标题翻译：非易失性存储器和具有改进的部分页面程序能力的控制
公开(公告)号：US20080025099A1
公开(公告)日：2008-01-31
申请号：US11867598
申请日：2007-10-04
申请人： Yan Li , Yupin Fong , Toru Miwa
发明人： Yan Li , Yupin Fong , Toru Miwa
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C2211/5646
摘要： In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.
摘要翻译：在非易失性存储器编程方案中，其中存储器单元被编程在两个或多个顺序编程遍中，当在第二遍期间存在不足的主机数据来编程至少一些存储器单元时，一些存储器单元可被编程到错误的阈值电压。这可以通过修改编程方案来避免这样的情况。在一个实现中，这是通过选择代码方案来实现的，该代码方案不会在第二编程遍期间将存储器单元编程到错误的阈值电压，或者通过根据不会导致单元被编程为错误状态。

2. 发明申请

US20060203561A1 Non-Volatile Memory and Control with Improved Partial Page Program Capability 有权
标题翻译：非易失性存储器和具有改进的部分页面程序能力的控制
公开(公告)号：US20060203561A1
公开(公告)日：2006-09-14
申请号：US11381972
申请日：2006-05-05
申请人： Yan Li , Yupin Fong , Toru Miwa
发明人： Yan Li , Yupin Fong , Toru Miwa
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C2211/5646
摘要： In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.
摘要翻译：在非易失性存储器编程方案中，其中存储器单元被编程在两个或多个顺序编程遍中，当在第二遍期间存在不足的主机数据来编程至少一些存储器单元时，一些存储器单元可被编程到错误的阈值电压。这可以通过修改编程方案来避免这样的情况。在一个实现中，这是通过选择代码方案来实现的，该代码方案不会在第二编程遍期间将存储器单元编程到错误的阈值电压，或者通过根据不会导致单元被编程为错误状态。

3. 发明申请

US20050237814A1 NON-VOLATILE MEMORY AND CONTROL WITH IMPROVED PARTIAL PAGE PROGRAM CAPABILITY 有权
标题翻译：非易失性存储器和具有改进的部分页面程序能力的控制
公开(公告)号：US20050237814A1
公开(公告)日：2005-10-27
申请号：US10830824
申请日：2004-04-23
申请人： Yan Li , Yupin Fong , Toru Miwa
发明人： Yan Li , Yupin Fong , Toru Miwa
IPC分类号： G11C11/56 , G11C16/04 , G11C16/10 , G11C11/34
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C2211/5646
摘要： In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.
摘要翻译：在非易失性存储器编程方案中，其中存储器单元被编程在两个或多个顺序编程遍中，当在第二遍期间存在不足的主机数据来编程至少一些存储器单元时，一些存储器单元可被编程到错误的阈值电压。这可以通过修改编程方案来避免这样的情况。在一个实现中，这是通过选择代码方案来实现的，该代码方案不会在第二编程遍期间将存储器单元编程到错误的阈值电压，或者通过根据不会导致单元被编程为错误状态。

4. 发明申请

US20090296475A1 VERIFICATION PROCESS FOR NON-VOLATILE STORAGE 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US20090296475A1
公开(公告)日：2009-12-03
申请号：US12132452
申请日：2008-06-03
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/06 , G11C7/00
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

5. 发明授权

US08218367B2 Verification process for non-volatile storage 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US08218367B2
公开(公告)日：2012-07-10
申请号：US13154810
申请日：2011-06-07
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/06
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

6. 发明申请

US20110235423A1 VERIFICATION PROCESS FOR NON-VOLATILE STORAGE 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US20110235423A1
公开(公告)日：2011-09-29
申请号：US13154810
申请日：2011-06-07
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

7. 发明授权

US07978527B2 Verification process for non-volatile storage 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US07978527B2
公开(公告)日：2011-07-12
申请号：US12132452
申请日：2008-06-03
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/06
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

8. 发明授权

US07280396B2 Non-volatile memory and control with improved partial page program capability 有权
标题翻译：非易失性存储器和具有改进的部分页面编程能力的控制
公开(公告)号：US07280396B2
公开(公告)日：2007-10-09
申请号：US11381972
申请日：2006-05-05
申请人： Yan Li , Yupin Kawing Fong , Toru Miwa
发明人： Yan Li , Yupin Kawing Fong , Toru Miwa
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C2211/5646
摘要： In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.
摘要翻译：在非易失性存储器编程方案中，其中存储器单元被编程在两个或多个顺序编程遍中，当在第二遍期间存在不足的主机数据来编程至少一些存储器单元时，一些存储器单元可被编程到错误的阈值电压。这可以通过修改编程方案来避免这样的情况。在一个实现中，这是通过选择代码方案来实现的，该代码方案不会在第二编程遍期间将存储器单元编程到错误的阈值电压，或者通过根据不会导致单元被编程为错误状态。

9. 发明授权

US07474561B2 Variable program voltage increment values in non-volatile memory program operations 有权
标题翻译：非易失性存储器程序操作中的可编程电压增量值
公开(公告)号：US07474561B2
公开(公告)日：2009-01-06
申请号：US11548264
申请日：2006-10-10
申请人： Yan Li , Fanglin Zhang , Toru Miwa , Farookh Moogat
发明人： Yan Li , Fanglin Zhang , Toru Miwa , Farookh Moogat
IPC分类号： G11C11/34
CPC分类号： G11C16/12 , G11C11/5628 , G11C16/0483 , G11C16/3481
摘要： The lowest programmed state in multi-state non-volatile flash memory devices can suffer from an increased level of bit line to bit line capacitive charge coupling when compared with other states. Program voltages applied to memory cells as increasing voltage pulses can be incremented using smaller values when programming memory cells to the lowest programmable state. Smaller increments in the applied voltage allow for greater precision and a narrower threshold voltage distribution to compensate for the disproportionate charge coupling experienced by cells programmed to this state. Smaller increment values can be used when switching from lower page to upper page programming in some implementations. In a pipelined programming architecture where cells forming a physical page store two logical pages of data and programming for one logical page begins before receiving data for the other logical page, the increment value can be increased when switching from programming the first logical page to programming both pages concurrently.
摘要翻译：与其他状态相比，多状态非易失性闪存器件中的最低编程状态可能会受到位线到位线电容电荷耦合的增加的影响。当将存储器单元编程到最低可编程状态时，可以使用较小的值将增加的电压脉冲施加到存储单元的编程电压递增。施加电压的较小增量允许更高的精度和更窄的阈值电压分布，以补偿编程到该状态的单元所经历的不成比例的电荷耦合。在一些实现中从较低页切换到上页编程时，可以使用较小的增量值。在流水线编程架构中，形成物理页面的单元存储两个逻辑页面的数据和一个逻辑页面的编程，在接收另一个逻辑页面的数据之前开始，当从第一个逻辑页面的编程切换到编程时，增量值可以增加同时页面。

10. 发明授权

US07057939B2 Non-volatile memory and control with improved partial page program capability 有权
标题翻译：非易失性存储器和具有改进的部分页面编程能力的控制
公开(公告)号：US07057939B2
公开(公告)日：2006-06-06
申请号：US10830824
申请日：2004-04-23
申请人： Yan Li , Yupin Kawing Fong , Toru Miwa
发明人： Yan Li , Yupin Kawing Fong , Toru Miwa
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C2211/5646
摘要： In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.
摘要翻译：在非易失性存储器编程方案中，其中存储器单元被编程在两个或多个顺序编程遍中，当在第二遍期间存在不足的主机数据来编程至少一些存储器单元时，一些存储器单元可被编程到错误的阈值电压。这可以通过修改编程方案来避免这样的情况。在一个实现中，这是通过选择代码方案来实现的，该代码方案不会在第二编程遍期间将存储器单元编程到错误的阈值电压，或者通过根据不会导致单元被编程为错误状态。

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