专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120152602A1 PRINTED CIRCUIT BOARD 审中-公开
标题翻译：印刷电路板
公开(公告)号：US20120152602A1
公开(公告)日：2012-06-21
申请号：US12981480
申请日：2010-12-30
申请人： YUNG-CHIEH CHEN , YU-CHANG PAI , DUEN-YI HO , SHOU-KUO HSU
发明人： YUNG-CHIEH CHEN , YU-CHANG PAI , DUEN-YI HO , SHOU-KUO HSU
IPC分类号： H05K1/18
CPC分类号： H05K1/141 , H05K1/117 , H05K2201/09145 , H05K2201/10159 , H05K2201/10189
摘要： A printed circuit board (PCB) includes a top layer, a memory controller, a gap, and a connector. The memory controller is located on the top layer. A number of first golden fingers are set on the top layer near the gap and electrically connected to the memory controller. A connector includes a first slot to hold the first golden fingers and a second slot to hold a number of second golden fingers of a memory chip. The first slot is electrically connected to the second slot. The memory chip and the PCB are coplanar.
摘要翻译：印刷电路板（PCB）包括顶层，存储器控制器，间隙和连接器。内存控制器位于顶层。在间隙附近的顶层设置有多个第一金手指，并且电连接到存储器控制器。连接器包括用于保持第一金手指的第一槽和用于保持存储芯片的多个第二金手指的第二槽。第一槽电连接到第二槽。存储芯片和PCB是共面的。

2. 发明申请

US20130039025A1 PRINTED CIRCUIT BOARD 有权
标题翻译：印刷电路板
公开(公告)号：US20130039025A1
公开(公告)日：2013-02-14
申请号：US13212179
申请日：2011-08-18
申请人： YUNG-CHIEH CHEN , DUEN-YI HO , SHOU-KUO HSU
发明人： YUNG-CHIEH CHEN , DUEN-YI HO , SHOU-KUO HSU
IPC分类号： H05K1/18
CPC分类号： H05K1/0295 , H05K1/0231 , H05K1/0243 , H05K1/111 , H05K2201/10189
摘要： A printed circuit board includes a first to a fifth connector pads, a first to an eighth coupling capacitor pads, a first to a tenth transmission lines, a first via and a second via, a first to a fourth sharing pads, and a voltage converting circuit. The printed circuit board is operable to selectively support different types of connectors.
摘要翻译：印刷电路板包括第一至第五连接器焊盘，第一至第八耦合电容器焊盘，第一至第十传输线，第一通孔和第二通孔，第一至第四共享焊盘和电压转换电路。印刷电路板可操作以选择性地支持不同类型的连接器。

3. 发明申请

US20110047524A1 SYSTEM AND METHOD FOR INSPECTING LAYOUT OF A PRINTED CIRCUIT BOARD 失效
标题翻译：用于检查印刷电路板布局的系统和方法
公开(公告)号：US20110047524A1
公开(公告)日：2011-02-24
申请号：US12701677
申请日：2010-02-08
申请人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , CHUN-JEN CHEN , SHOU-KUO HSU , DUEN-YI HO , YUNG-CHIEH CHEN
发明人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , CHUN-JEN CHEN , SHOU-KUO HSU , DUEN-YI HO , YUNG-CHIEH CHEN
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A system and method for inspecting layout of a printed circuit board (PCB) provides a graphical user interface (GUI). The GUI displays a layout of the PCB. High side pins of a pulse width modulation (PWM) controller and a component connected to a high side pin are found. If the component is a metallic oxide semiconductor field effect transistor (MOSFET), the system calculate absolute a linear distance and a trace distance between a source pin of the MOSFET and a capacitor pin of a coupling capacitor connected to the source pin. If the linear distance, the trace distance and a capacitance of the coupling capacitor accord with a layout standard, the layout of the PCB is determined to be up to standard.
摘要翻译：用于检查印刷电路板（PCB）的布局的系统和方法提供图形用户界面（GUI）。 GUI显示PCB的布局。发现脉冲宽度调制（PWM）控制器的高端引脚和连接到高端引脚的元件。如果组件是金属氧化物半导体场效应晶体管（MOSFET），则该系统计算绝缘线性距离和MOSFET的源极引脚与连接到源极引脚的耦合电容的电容引脚之间的走线距离。如果线性距离，迹线距离和耦合电容的电容符合布局标准，则PCB的布局被确定为达到标准。

4. 发明申请

US20100052422A1 PRINTED CIRCUIT BOARD AND OPTIMIZATION METHOD FOR A SENSE LOCATION ON THE PRINTED CIRCUIT BOARD 失效
标题翻译：印刷电路板和打印电路板上感应位置的优化方法
公开(公告)号：US20100052422A1
公开(公告)日：2010-03-04
申请号：US12257367
申请日：2008-10-23
申请人： DUEN-YI HO , SHOU-KUO HSU
发明人： DUEN-YI HO , SHOU-KUO HSU
IPC分类号： H02J1/00
CPC分类号： H05K1/0262 , H05K1/0268 , H05K1/141 , H05K1/181 , Y10T307/414 , Y10T307/469
摘要： A print circuit board (PCB) includes a voltage regulator module (VRM), a plurality of loads, and a sense location for augmenting the voltage margin of the loads. The VRM is configured for charging the loads. Each load has a weight. The voltage value of the sense location equals to a summation of a corresponding weight value of a corresponding load multiplied by a corresponding voltage value of the load, for each of the plurality of loads on the PCB. An optimization method for the sense location on the PCB is also provided.
摘要翻译：印刷电路板（PCB）包括电压调节器模块（VRM），多个负载以及用于增加负载电压余量的感测位置。 VRM被配置为对负载进行充电。每个负载都有一个重量。对于PCB上的多个负载中的每一个，感测位置的电压值等于对应负载的相应重量值乘以负载的对应电压值的总和。还提供了PCB上感测位置的优化方法。

5. 发明申请

US20110093831A1 SYSTEM AND METHOD FOR ANALYZING TEMPERATURE RISE OF A PRINTED CIRCUIT BOARD 失效
标题翻译：用于分析印刷电路板温度升高的系统和方法
公开(公告)号：US20110093831A1
公开(公告)日：2011-04-21
申请号：US12790857
申请日：2010-05-31
申请人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU , HSIEN-CHUAN LIANG , SHOU-KUO HSU
发明人： TSUNG-SHENG HUANG , CHUN-JEN CHEN , DUEN-YI HO , WEI-CHIEH CHOU , HSIEN-CHUAN LIANG , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A system and method that can analyze a temperature rise of a printed circuit board (PCB). The system and method receives attribute parameters of the PCB from an input device, and generates a temperature rise formula according to the received attribute parameters. Additionally, the system and method calculates a temperature rise of a local area surrounding each component on the PCB according to the temperature rise formula.
摘要翻译：可以分析印刷电路板（PCB）的温度升高的系统和方法。该系统和方法从输入装置接收PCB的属性参数，并根据接收的属性参数生成温升公式。另外，该系统和方法根据温升公式计算PCB上每个部件周围的局部区域的温度上升。

6. 发明申请

US20090076751A1 SYSTEMS AND METHODS FOR MEASURING SIGNAL WAVEFORMS 审中-公开
标题翻译：用于测量信号波形的系统和方法
公开(公告)号：US20090076751A1
公开(公告)日：2009-03-19
申请号：US12172257
申请日：2008-07-13
申请人： SHEN-CHUN LI , SHOU-KUO HSU , HSIEN-CHUAN LIANG , HUNG CHAO , DUEN-YI HO , YING-TSO LAI
发明人： SHEN-CHUN LI , SHOU-KUO HSU , HSIEN-CHUAN LIANG , HUNG CHAO , DUEN-YI HO , YING-TSO LAI
IPC分类号： G01R13/00
CPC分类号： G01R13/0272
摘要： A system for measuring a signal waveform is provided. The system comprises a parameter receiving module, a waveform receiving module, a waveform filter, and a data storing module. The parameter receiving module is configured for receiving one or more filtration conditions. The waveform receiving module is configured for receiving the signal waveform. The waveform filter is configured for filtering the signal waveform to obtain a desired waveform. The data storing module is configured for storing the desired waveform into a storage device.
摘要翻译：提供了一种用于测量信号波形的系统。该系统包括参数接收模块，波形接收模块，波形滤波器和数据存储模块。参数接收模块被配置为接收一个或多个过滤条件。波形接收模块被配置为接收信号波形。波形滤波器被配置为对信号波形进行滤波以获得期望的波形。数据存储模块被配置为将期望的波形存储到存储设备中。

7. 发明申请

US20090086561A1 MOTHERBOARD FOR SUPPORTING DIFFERENT TYPES OF MEMORIES 有权
标题翻译：支持不同类型的记忆的主板
公开(公告)号：US20090086561A1
公开(公告)日：2009-04-02
申请号：US11952140
申请日：2007-12-07
申请人： SHOU-KUO HSU , DUEN-YI HO , CHENG-SHIEN LI
发明人： SHOU-KUO HSU , DUEN-YI HO , CHENG-SHIEN LI
IPC分类号： G11C5/14 , H05K1/11
CPC分类号： G06F1/26 , G11C5/04 , G11C5/147 , H05K1/0262 , H05K1/14 , H05K2201/044 , H05K2201/09954 , H05K2201/10159
摘要： An exemplary motherboard includes a driving module, a first slot module arranged for mounting a first type of memory and connected to the driving module via a first channel, a second slot module arranged for mounting a second type of memory and connected to the driving module via a second channel, and a voltage regulator electronically connected to the first slot module and the second slot module. The first memory and the second memory are alternatively mounted on the motherboard, the voltage regulator detects which type memory is currently mounted on the motherboard and outputs voltages suitable for the type of the memory mounted on the motherboard accordingly.
摘要翻译：示例性主板包括驱动模块，布置成用于安装第一类型存储器并经由第一通道连接到驱动模块的第一插槽模块，布置成用于安装第二类型存储器并连接到驱动模块的第二插槽模块，其经由第二通道和电连接到第一插槽模块和第二插槽模块的电压调节器。第一存储器和第二存储器替代地安装在母板上，电压调节器检测当前安装在母板上的哪种类型的存储器，并相应地输出适合安装在母板上的存储器类型的电压。

8. 发明申请

US20070233408A1 SYSTEM AND METHOD FOR CALCULATING A VOLTAGE SPIKE VALUE 失效
标题翻译：计算电压值的系统和方法
公开(公告)号：US20070233408A1
公开(公告)日：2007-10-04
申请号：US11627378
申请日：2007-01-26
申请人： DUEN-YI HO , SHOU-KUO HSU
发明人： DUEN-YI HO , SHOU-KUO HSU
IPC分类号： G01R13/00 , H03K5/153 , G06F15/00
CPC分类号： G06F17/5036
摘要： A method for calculating a voltage spike value includes: predefining calculating requirements; inputting parameter values; analyzing whether inputted parameter values match with the calculating requirements; establishing a computing formula for calculating the voltage spike value if the inputted parameter values match with the calculating requirements; and calculating the voltage spike value by utilizing the inputted parameter values and the computing formula. A related system is also disclosed.
摘要翻译：计算电压尖峰值的方法包括：预定义计算要求; 输入参数值; 分析输入的参数值是否符合计算要求; 如果输入的参数值与计算要求匹配，建立计算公式计算电压尖峰值; 以及通过利用输入的参数值和计算公式计算电压尖峰值。还公开了相关系统。

9. 发明申请

US20090103385A1 MOTHERBOARD FOR SUPPORTING DIFFERENT TYPES OF MEMORIES 有权
标题翻译：支持不同类型的记忆的主板
公开(公告)号：US20090103385A1
公开(公告)日：2009-04-23
申请号：US11965753
申请日：2007-12-28
申请人： SHOU-KUO HSU , DUEN-YI HO , CHENG-SHIEN LI
发明人： SHOU-KUO HSU , DUEN-YI HO , CHENG-SHIEN LI
IPC分类号： G11C5/14 , H05K1/11
CPC分类号： G06F13/4072 , G06F13/4239 , H05K1/0262 , H05K1/14 , H05K2201/044 , H05K2201/09954 , H05K2201/10159
摘要： An exemplary motherboard includes a driving module, at least two first slots arranged for mounting two first type of memories, at least two second slots arranged for mounting two second type of memories, and a voltage regulator. The driving module is electronically connected to the at least two first slots, the at least two second slots, and the voltage regulator in turn via a channel. The first type of memories and the second type of memories are alternatively mounted on the motherboard, the voltage regulator detects which type memory is currently mounted on the motherboard and outputs voltages suitable for the type of memory mounted on the motherboard accordingly.
摘要翻译：示例性主板包括驱动模块，布置成用于安装两个第一类型存储器的至少两个第一槽，布置成安装两个第二类型存储器的至少两个第二槽和电压调节器。驱动模块通过通道电连接到至少两个第一插槽，至少两个第二插槽和电压调节器。第一类型的存储器和第二类型的存储器交替地安装在母板上，电压调节器检测当前安装在母板上的哪种类型的存储器，并相应地输出适合于安装在母板上的存储器类型的电压。

10. 发明申请

US20090076778A1 SYSTEM AND METHOD FOR DESIGNING A VOLTAGE REGULATOR MODULE 有权
标题翻译：用于设计电压调节器模块的系统和方法
公开(公告)号：US20090076778A1
公开(公告)日：2009-03-19
申请号：US12172258
申请日：2008-07-13
申请人： SHOU-KUO HSU , YING-TSO LAI , DUEN-YI HO
发明人： SHOU-KUO HSU , YING-TSO LAI , DUEN-YI HO
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A computer-implemented method for designing a voltage regulator module (VRM) is disclosed. The method includes receiving design parameters and a component data for each component and storing the design parameters and the component data for each component into a component selection table, calculating a work efficiency of the VRM, and storing the work efficiency into a power computation table. The method further includes simulating a derating of each component according to a corresponding rated stress of each component if the work efficiency is greater than or equal to a predetermined work efficiency, calculating a stress ratio of each component, and storing the stress ratio into a component derating table. The component selection table, the power computation table and the component derating table are stored to form a desired VRM model if the stress ratio of each component meets a corresponding derating specification.
摘要翻译：公开了一种用于设计电压调节器模块（VRM）的计算机实现的方法。该方法包括接收每个组件的设计参数和组件数据，并将每个组件的设计参数和组件数据存储到组件选择表中，计算VRM的工作效率，并将工作效率存储在功率计算表中。该方法还包括如果工作效率大于或等于预定工作效率，则计算每个部件的应力比，并将应力比存储到部件中，根据每个部件的相应的额定应力来模拟每个部件的降额降额表。存储组件选择表，功率计算表和组件降额表，以形成所需的VRM模型，如果每个组件的应力比满足相应的降额规范。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式