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    • 6. 发明申请
    • DEVICE AND METHOD FOR CALIBRATING RECIPROCITY ERRORS
    • 用于校准重复错误的装置和方法
    • US20120314563A1
    • 2012-12-13
    • US13578307
    • 2010-10-12
    • Qinglin LuoJing Shi
    • Qinglin LuoJing Shi
    • H04J3/14
    • H04B17/21H04B17/11H04B17/12H04B17/14H04L25/0212H04L25/0256
    • The present invention provides a method for reciprocity error calibration, comprising steps of: measuring downlink channel response HDL; measuring uplink channel response HUL; calculating one of a user equipment reciprocity error Em and a base station reciprocity error Eb utilizing least square LS criterion based on the HDL and HUL in accordance with a reciprocity model HDL=Em−1HULTEb; calculating the other one of the Em and Eb based on the calculated one of Em and Eb utilizing an algorithm adopting minimum mean square error MMSE criterion; and performing a reciprocity error calibration operation utilizing the calculated user equipment reciprocity error Em and base station reciprocity error Eb. There is further provided a reciprocity error calibration device for performing the reciprocity error calibration method. The reciprocity error calibration method and the reciprocity error calibration device according to the present invention may provide better reciprocity error calibration performance.
    • 本发明提供了一种用于互易误差校准的方法,包括以下步骤:测量下行链路信道响应HDL; 测量上行链路信道响应HUL; 使用基于HDL和HUL的最小二乘LS准则,根据互易模型HDL = Em-1HULTEb计算用户设备互易误差Em和基站互易误差Eb之一; 使用采用最小均方误差MMSE准则的算法,基于Em和Eb中的一个计算Em和Eb中的另一个; 以及利用所计算的用户设备互易误差Em和基站互易误差Eb来执行互易误差校准操作。 还提供了一种用于执行互易误差校准方法的互易误差校准装置。 根据本发明的互易误差校准方法和互易误差校准装置可以提供更好的互易误差校准性能。
    • 8. 发明授权
    • Magnetic element with improved field response and fabricating method thereof
    • 具有改善的场响应的磁性元件及其制造方法
    • US06205052B1
    • 2001-03-20
    • US09422447
    • 1999-10-21
    • Jon SlaughterJing ShiEugene ChenSaied Tehrani
    • Jon SlaughterJing ShiEugene ChenSaied Tehrani
    • G11C1115
    • H01L43/08B82Y25/00H01F10/324H01F10/3254H01F10/3268
    • An improved and novel device and fabrication method for a magnetic element, and more particularly a magnetic element (10) including a first electrode (14), a second electrode (18) and a spacer layer (16). The first electrode (14) includes a fixed ferromagnetic layer (26). A second electrode (18) is included and comprises a free ferromagnetic layer (28). A spacer layer (16) is located between the fixed ferromagnetic layer (26) and the free ferromagnetic (28) layer, the spacer layer (16). At least one additional layer (20 & 22) is provided between the base metal layer (13) and the spacer layer (16). The base metal layer (13) or at least one of the layers positioned between the base metal layer (13) and the spacer layer (16) having an x-ray amorphous structure such that a reduced topological coupling strength between the free ferromagnetic layer (28) and the fixed ferromagnetic layer (26) is achieved.
    • 一种用于磁性元件的改进和新颖的器件和制造方法,更具体地,包括第一电极(14),第二电极(18)和间隔层(16)的磁性元件(10)。 第一电极(14)包括固定的铁磁层(26)。 包括第二电极(18)并且包括自由铁磁层(28)。 间隔层(16)位于固定铁磁层(26)和自由铁磁(28)层间隔层(16)之间。 至少一个附加层(20和22)设置在基底金属层(13)和间隔层(16)之间。 基底金属层(13)或位于基底金属层(13)和间隔层(16)之间的层中的至少一层具有x射线非晶结构,使得游离铁磁层( 28)和固定铁磁层(26)。
    • 9. 发明授权
    • SiGe HBT and method of manufacturing the same
    • SiGe HBT及其制造方法
    • US09012279B2
    • 2015-04-21
    • US13613236
    • 2012-09-13
    • Donghua LiuWenting DuanWensheng QianJun HuJing Shi
    • Donghua LiuWenting DuanWensheng QianJun HuJing Shi
    • H01L21/8238H01L29/66H01L29/737H01L29/08
    • H01L29/66242H01L29/0821H01L29/7371
    • A SiGe HBT is disclosed, which includes: a silicon substrate; shallow trench field oxides formed in the silicon substrate; a pseudo buried layer formed at bottom of each shallow trench field oxide; a collector region formed beneath the surface of the silicon substrate, the collector region being sandwiched between the shallow trench field oxides and between the pseudo buried layers; a polysilicon gate formed above each shallow trench field oxide having a thickness of greater than 150 nm; a base region on the polysilicon gates and the collector region; emitter region isolation oxides on the base region; and an emitter region on the emitter region isolation oxides and a part of the base region. The polysilicon gate is formed by gate polysilicon process of a MOSFET in a CMOS process. A method of manufacturing the SiGe HBT is also disclosed.
    • 公开了一种SiGe HBT,其包括:硅衬底; 形成在硅衬底中的浅沟槽场氧化物; 形成在每个浅沟槽场氧化物的底部的伪掩埋层; 形成在所述硅衬底的表面下方的集电极区域,所述集电极区域夹在所述浅沟槽场氧化物之间和所述伪埋层之间; 形成在每个浅沟槽场氧化物上方的多晶硅栅极,其厚度大于150nm; 多晶硅栅极和集电极区域上的基极区域; 发射极区隔离氧化物; 并且发射极区域上的发射极区域隔离氧化物和基极区域的一部分。 多晶硅栅极通过CMOS工艺中的MOSFET的栅极多晶硅工艺形成。 还公开了制造SiGe HBT的方法。