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1. 发明授权

US09281268B2 Method for fabricating multi-chip module with multi-level interposer 有权
标题翻译：用多层插入器制造多芯片模块的方法
公开(公告)号：US09281268B2
公开(公告)日：2016-03-08
申请号：US13517591
申请日：2012-06-13
申请人： Eugene M. Chow , John E. Cunningham , James G. Mitchell , Ivan Shubin
发明人： Eugene M. Chow , John E. Cunningham , James G. Mitchell , Ivan Shubin
IPC分类号： H05K3/20 , H01L23/498 , H01L21/48 , H01L21/683 , H01L23/13 , H01L23/14 , H01L23/544 , H01L23/00 , H01L25/065 , H01L23/15
CPC分类号： H01L23/49811 , H01L21/4853 , H01L21/6835 , H01L23/13 , H01L23/147 , H01L23/15 , H01L23/49827 , H01L23/544 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/0652 , H01L2221/68309 , H01L2221/68345 , H01L2223/54426 , H01L2223/54473 , H01L2224/13 , H01L2224/13016 , H01L2224/131 , H01L2224/136 , H01L2224/16237 , H01L2224/81005 , H01L2224/81007 , H01L2224/81136 , H01L2224/81138 , H01L2224/81141 , H01L2224/81191 , H01L2224/81192 , H01L2224/81801 , H01L2224/81901 , H01L2924/0001 , H01L2924/01006 , H01L2924/01033 , H01L2924/01075 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15156 , H01L2924/15787 , Y10T29/49165 , Y10T29/49204 , Y10T29/49895 , Y10T29/49947 , H01L2924/00012 , H01L2224/13099 , H01L2924/00
摘要： A multi-level interposer plate and a multi-chip module (MCM) that includes the multi-level interposer plate are described. First surfaces and second surfaces in different regions of the multi-level interposer plate have associated, different thicknesses. Moreover, first micro-spring connectors and second micro-spring connectors are respectively disposed on the first surfaces and the second surfaces. In the MCM, a given one of the first surfaces of the multi-level interposer plate faces a bridge chip in a first layer in an array of chips in the MCM so that first connectors, disposed on the bridge chip, mechanically and electrically couple to the first micro-spring connectors. Similarly, a given one of the second surfaces of the multi-level interposer plate faces an island chip in a second layer in the array of chips so that second connectors, disposed on the island chip, mechanically and electrically couple to the second micro-spring connectors.
摘要翻译：描述了包括多层插入板的多层插入板和多芯片模块（MCM）。多层插入板的不同区域中的第一表面和第二表面具有相关联的不同厚度。此外，第一微弹簧连接器和第二微弹簧连接器分别设置在第一表面和第二表面上。在MCM中，多级插入板的给定的一个第一表面面向MCM中芯片阵列的第一层中的桥式芯片，使得设置在桥式芯片上的第一连接器机械地和电耦合到第一个微型弹簧连接器。类似地，多层插入板的给定的一个第二表面面向芯片阵列中的第二层中的岛状芯片，使得设置在岛状芯片上的第二连接器机械地和电耦合到第二微型弹簧连接器

2. 发明授权

US09217836B2 Edge coupling of optical devices 有权
标题翻译：光学器件的边缘耦合
公开(公告)号：US09217836B2
公开(公告)日：2015-12-22
申请号：US13694070
申请日：2012-10-23
申请人： Mehdi Asghari , Roshanak Shafiiha , Daniel C. Lee , Dazeng Feng , Xuezhe Zheng , Ashok Krishnamoorthy , Hiren Thacker , John E. Cunningham
发明人： Mehdi Asghari , Roshanak Shafiiha , Daniel C. Lee , Dazeng Feng , Xuezhe Zheng , Ashok Krishnamoorthy , Hiren Thacker , John E. Cunningham
IPC分类号： G02B6/42
CPC分类号： G02B6/423
摘要： A system includes optical modules. Each module includes a different base and one or more module waveguides on the base. Module waveguides from different modules are aligned such that the aligned module waveguides exchange light signals. At least a portion of one of the aligned module waveguides is between the base of one of the modules and the base of another module. First electronics operate a transmitter on a first one of the optical modules so as to generate one of the light signals. Second electronics operate a receiver on a second one of the modules such that the electronics generate an electrical signal in response to the receiver receiving one of the light signals.
摘要翻译：系统包括光模块。每个模块在基座上包括不同的基座和一个或多个模块波导。对准来自不同模块的模块波导，使得对准的模块波导交换光信号。对准的模块波导中的一个的至少一部分在模块之一的基座和另一模块的基座之间。第一电子装置在第一个光学模块上操作发射器，以便产生一个光信号。第二电子装置在第二模块上操作接收器，使得电子装置响应于接收器接收光信号之一而产生电信号。

3. 发明授权

US09176291B2 Grating coupler for inter-chip optical coupling 有权
标题翻译：用于片间光耦合的光栅耦合器
公开(公告)号：US09176291B2
公开(公告)日：2015-11-03
申请号：US13588242
申请日：2012-08-17
申请人： Guoliang Li , Ying L. Luo , Xuezhe Zheng , John E. Cunningham , Ashok V. Krishnamoorthy
发明人： Guoliang Li , Ying L. Luo , Xuezhe Zheng , John E. Cunningham , Ashok V. Krishnamoorthy
IPC分类号： G02B6/42 , G02B6/12 , G02B6/34 , G02B6/124 , G02B6/122 , G02B6/134
CPC分类号： G02B6/4296 , G02B6/12004 , G02B6/1228 , G02B6/124 , G02B6/1347 , G02B6/34 , G02B2006/12188 , H01S5/02252 , H01S5/026 , H01S5/1014 , H01S5/1032 , H01S5/14 , H01S5/187
摘要： A photonic integrated circuit (PIC) that includes an optical source that provides an optical signal having a wavelength is described. This optical source includes a reflecting layer, a bottom cladding layer, an active layer (such as a III-V semiconductor) having a bandgap wavelength that exceeds that of silicon, and a top cladding layer. Moreover, an optical coupler (such as a grating coupler) that couples the optical signal out of a plane of the active layer is included in a region of the active layer. In this region, the top cladding layer is absent. Furthermore, in an adjacent region, the top cladding layer includes an inverse taper so that the top cladding layer is tapered down from a width distal from the region. In conjunction with the optical coupler, the inverse taper may facilitate low-loss optical coupling of the optical signal between the PIC and another PIC.
摘要翻译：描述了包括提供具有波长的光信号的光源的光子集成电路（PIC）。该光源包括反射层，底部包层，具有超过硅的带隙波长的有源层（例如III-V半导体）和顶部覆层。此外，将有源层的平面耦合光信号的光耦合器（诸如光栅耦合器）包括在有源层的区域中。在该区域中，顶层包层不存在。此外，在相邻区域中，顶部包层具有倒锥形，使得顶部包层从远离该区域的宽度向下锥形。结合光耦合器，逆锥度可以促进PIC和另一个PIC之间的光信号的低损耗光耦合。

4. 发明授权

US09164231B2 Ultra-compact photodetector on an optical waveguide 有权
标题翻译：在光波导上的超小型光电探测器
公开(公告)号：US09164231B2
公开(公告)日：2015-10-20
申请号：US13205484
申请日：2011-08-08
申请人： Ivan Shubin , John E. Cunningham
发明人： Ivan Shubin , John E. Cunningham
IPC分类号： G02B6/12 , G02B6/42 , G02B6/122
CPC分类号： G02B6/12004 , G02B6/1228 , G02B6/4214
摘要： An integrated circuit is described. This integrated circuit includes an optical waveguide defined in a semiconductor layer, and an optical detector disposed on top of the optical waveguide. Moreover, the optical waveguide has an end with a reflecting facet. For example, the reflective facet may be defined using an anisotropic etch of the semiconductor layer. This reflecting facet reflects light propagating in a plane of the optical waveguide out of the plane into the optical detector, thereby providing a photodetector with high optical responsivity, including an extremely low dark current (and, thus, high photosensitivity) and an extremely small capacitance (and, thus, high electrical bandwidth).
摘要翻译：描述了集成电路。该集成电路包括限定在半导体层中的光波导和设置在光波导顶部的光学检测器。此外，光波导具有具有反射面的端部。例如，反射小面可以使用半导体层的各向异性蚀刻来定义。该反射面反射在平面内的光波导的平面内传播的光进入光检测器，从而提供具有高光学响应性的光电检测器，其包括极低的暗电流（并且因此具有高的光敏性）和极小的电容（并因此具有高的电气带宽）。

5. 发明授权

US08982563B2 Chip package to support high-frequency processors 有权
标题翻译：芯片封装支持高频处理器
公开(公告)号：US08982563B2
公开(公告)日：2015-03-17
申请号：US13171072
申请日：2011-06-28
申请人： Kannan Raj , Ivan Shubin , John E. Cunningham
发明人： Kannan Raj , Ivan Shubin , John E. Cunningham
IPC分类号： H05K7/20 , H05K7/10 , H01L25/18 , H01L23/538
CPC分类号： H05K7/1092 , H01L23/5384 , H01L25/18 , H01L2224/16225 , H01L2224/73253 , H01L2924/10253 , H01L2924/15311 , H01L2924/00
摘要： A chip package includes a processor, an interposer chip and a voltage regulator module (VRM). The interposer chip is electrically coupled to the processor by first electrical connectors proximate to a surface of the interposer chip. Moreover, the interposer chip includes second electrical connectors proximate to another surface of the interposer chip, which are electrically coupled to the first electrical connectors by through-substrate vias (TSVs) in the interposer chip. Note that the second electrical connectors can electrically couple the interposer chip to a circuit board. Furthermore, the VRM is electrically coupled to the processor by the interposer chip, and is proximate to the processor in the chip package, thereby reducing voltage droop. For example, the VRM may be electrically coupled to the surface of the interposer chip, and may be adjacent to the processor. Alternatively, the VRM may be electrically coupled to the other surface of the interposer chip.
摘要翻译：芯片封装包括处理器，插入器芯片和电压调节器模块（VRM）。插入器芯片通过靠近插入器芯片的表面的第一电连接器电耦合到处理器。此外，插入器芯片包括靠近插入器芯片的另一表面的第二电连接器，其通过插入器芯片中的贯穿衬底通孔（TSV）电耦合到第一电连接器。注意，第二电连接器可以将插入器芯片电连接到电路板。此外，VRM通过插入器芯片电耦合到处理器，并且靠近芯片封装中的处理器，从而降低电压下降。例如，VRM可以电耦合到插入器芯片的表面，并且可以与处理器相邻。或者，VRM可以电耦合到插入器芯片的另一表面。

6. 发明授权

US08971674B2 Optical device with high thermal tuning efficiency 有权
标题翻译：具有高调谐效率的光器件
公开(公告)号：US08971674B2
公开(公告)日：2015-03-03
申请号：US12730774
申请日：2010-03-24
申请人： Ivan Shubin , John E. Cunningham , Xuezhe Zheng , Guoliang Li , Ashok V. Krishnamoorthy
发明人： Ivan Shubin , John E. Cunningham , Xuezhe Zheng , Guoliang Li , Ashok V. Krishnamoorthy
IPC分类号： G02B6/12 , H01L21/02 , G02F1/025 , G02F1/313 , G02F1/01
CPC分类号： G02B6/12007 , G02F1/0147 , G02F1/025 , G02F1/3132
摘要： An optical device with high thermal tuning efficiency is described. This optical device may be implemented using a tri-layer structure (silicon-on-insulator technology), including: a substrate, a buried-oxide layer and a semiconductor layer. In particular, a thermally tunable optical waveguide may be defined in the semiconductor layer. Furthermore, a portion of the substrate under the buried-oxide layer and substantially beneath a location of the thermally tunable optical waveguide is fabricated so that a portion of the buried-oxide layer is exposed. In this way, the thermal impedance between the thermally tunable optical waveguide and an external environment is increased, and power consumption associated with thermal tuning of the optical waveguide is reduced.
摘要翻译：描述了具有高热调谐效率的光学装置。该光学器件可以使用三层结构（绝缘体上硅技术）来实现，包括：衬底，掩埋氧化物层和半导体层。特别地，热可调谐光波导可以限定在半导体层中。此外，制造掩埋氧化物层下面的基板的一部分并且基本上位于热可调谐光波导的位置下方，使得一部分掩埋氧化物层露出。以这种方式，热可调谐光波导和外部环境之间的热阻抗增加，并且降低与光波导的热调谐相关的功耗。

7. 发明申请

US20140133864A1 Edge coupling of optical devices 有权
标题翻译：光学器件的边缘耦合
公开(公告)号：US20140133864A1
公开(公告)日：2014-05-15
申请号：US13694070
申请日：2012-10-23
申请人： Mehdi Asghari , Roshanak Shafiiha , Daniel C. Lee , Dazeng Feng , Xuezhe Zheng , Ashok Krishnamoorthy , Hiren Thacker , John E. Cunningham
发明人： Mehdi Asghari , Roshanak Shafiiha , Daniel C. Lee , Dazeng Feng , Xuezhe Zheng , Ashok Krishnamoorthy , Hiren Thacker , John E. Cunningham
IPC分类号： H04B10/25
CPC分类号： G02B6/423
摘要： A system includes optical modules. Each module includes a different base and one or more module waveguides on the base. Module waveguides from different modules are aligned such that the aligned module waveguides exchange light signals. At least a portion of one of the aligned module waveguides is between the base of one of the modules and the base of another module. First electronics operate a transmitter on a first one of the optical modules so as to generate one of the light signals. Second electronics operate a receiver on a second one of the modules such that the electronics generate an electrical signal in response to the receiver receiving one of the light signals.
摘要翻译：系统包括光模块。每个模块在基座上包括不同的基座和一个或多个模块波导。对准来自不同模块的模块波导，使得对准的模块波导交换光信号。对准的模块波导中的一个的至少一部分在模块之一的基座和另一模块的基座之间。第一电子装置在第一个光学模块上操作发射器，以便产生一个光信号。第二电子装置在第二模块上操作接收器，使得电子装置响应于接收器接收光信号之一而产生电信号。

8. 发明授权

US08698322B2 Adhesive-bonded substrates in a multi-chip module 有权
标题翻译：多芯片模块中的粘合粘合基板
公开(公告)号：US08698322B2
公开(公告)日：2014-04-15
申请号：US12730823
申请日：2010-03-24
申请人： Robert J. Drost , Ashok V. Krishnamoorthy , John E. Cunningham
发明人： Robert J. Drost , Ashok V. Krishnamoorthy , John E. Cunningham
IPC分类号： H01L23/538
CPC分类号： H01L25/0657 , H01L23/48 , H01L23/5389 , H01L2224/16145 , H01L2224/16225 , H01L2225/06531 , H01L2225/06555 , H01L2924/15153
摘要： A multi-chip module (MCM) is described in which at least two substrates are mechanically coupled by an adhesive layer that maintains alignment and a zero (or near zero) spacing between proximity connectors on surfaces of the substrates, thereby facilitating high signal quality during proximity communication between the substrates. In order to provide sufficient shear strength, the adhesive layer has a thickness that is larger than the spacing. This may be accomplished using one or more positive and/or negative features on the substrates. For example, the adhesive may be bonded to: one of the surfaces and an inner surface of a channel that is recessed below the other surface; inner surfaces of channels that are recessed below both of the surfaces; or both of the surfaces. In this last case, the zero (or near zero) spacing may be achieved by disposing proximity connectors on a mesa that protrudes above at least one of the substrate surfaces.
摘要翻译：描述了一种多芯片模块（MCM），其中至少两个基板通过粘合剂层机械耦合，所述粘合剂层在基板的表面上的接近连接器之间保持对准和零（或接近零）的间隔，从而有利于高信号质量基板之间的接近连接。为了提供足够的剪切强度，粘合剂层的厚度大于间隔。这可以使用衬底上的一个或多个正和/或负特征来实现。例如，粘合剂可以结合到：一个表面和在另一个表面下方凹进的通道的内表面; 在两个表面下凹陷的通道的内表面; 或两个表面。在最后一种情况下，零（或接近零）的间距可以通过将接近连接器设置在突出在至少一个衬底表面上的台面上来实现。

9. 发明授权

US08648463B2 Assembly of multi-chip modules with proximity connectors using reflowable features 有权
标题翻译：使用可回流功能组装具有接近连接器的多芯片模块
公开(公告)号：US08648463B2
公开(公告)日：2014-02-11
申请号：US12781732
申请日：2010-05-17
申请人： Hiren D. Thacker , Jing Shi , John E. Cunningham , Ashok V. Krishnamoorthy
发明人： Hiren D. Thacker , Jing Shi , John E. Cunningham , Ashok V. Krishnamoorthy
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/02 , H01L23/34 , H01L21/00
CPC分类号： H01L23/13 , H01L23/48 , H01L23/49811 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/0652 , H01L25/50 , H01L2224/0401 , H01L2224/05557 , H01L2224/05558 , H01L2224/05571 , H01L2224/05655 , H01L2224/05671 , H01L2224/13147 , H01L2224/13155 , H01L2224/1319 , H01L2224/13541 , H01L2224/13561 , H01L2224/1357 , H01L2224/13578 , H01L2224/13611 , H01L2224/14051 , H01L2224/14505 , H01L2224/16147 , H01L2224/16225 , H01L2224/16227 , H01L2224/1703 , H01L2224/17517 , H01L2224/81141 , H01L2224/81211 , H01L2224/81815 , H01L2225/06531 , H01L2225/06593 , H01L2924/0002 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/15787 , H01L2924/00012 , H01L2924/00014 , H01L2924/01082 , H01L2924/01079 , H01L2924/01029 , H01L2924/01049 , H01L2924/206 , H01L2924/01028 , H01L2224/05552 , H01L2924/00
摘要： A multi-chip module (MCM) that includes at least two substrates, having facing surfaces, which are mechanically coupled by a set of coupling elements having a reflow characteristic, is described. One of the two substrates includes another set of coupling elements having another reflow characteristic, which is different than the reflow characteristic. These different reflow characteristics of the sets of coupling elements allow different temperature profiles to be used when bonding the two substrates to each other than when bonding the one of the two substrates to a carrier. For example, the temperature profiles may have different peak temperatures and/or different durations from one another. These reflow characteristics may facilitate low-cost, high-yield assembly and alignment of the substrates in the MCM, and may allow temperature-sensitive components to be included in the MCM.
摘要翻译：描述了包括具有面对表面的至少两个基板的多芯片模块（MCM），其通过一组具有回流特性的耦合元件机械耦合。两个基板中的一个包括另一组具有不同于回流特性的另外的回流特性的耦合元件。耦合元件组的这些不同的回流特性允许在将两个基板彼此接合时使用不同的温度曲线，而不是将两个基板中的一个接合到载体上。例如，温度分布可以具有不同的峰值温度和/或彼此不同的持续时间。这些回流特性可以促进MCM中的基板的低成本，高产量组装和对准，并且可以允许将温度敏感组件包括在MCM中。

10. 发明授权

US08385740B2 Arbitration scheme for an optical bus 有权
标题翻译：光学总线仲裁方案
公开(公告)号：US08385740B2
公开(公告)日：2013-02-26
申请号：US12176294
申请日：2008-07-18
申请人： Brian O'Krafka , Pranay Koka , John E. Cunningham , Ashok Krishnamoorthy , Xuezhe Zheng
发明人： Brian O'Krafka , Pranay Koka , John E. Cunningham , Ashok Krishnamoorthy , Xuezhe Zheng
IPC分类号： H04B10/20 , H04B10/08
CPC分类号： H04L12/413
摘要： A method of arbitrating data transmissions to prevent data collisions in an optical data interconnect system including a transmitting node, a plurality of receiving nodes, and one or more remaining nodes connected through an optical data channel. The method involves transmitting a transmission request signal from the transmitting node over an arbitration channel corresponding to the transmitting node, monitoring, at the transmitting node, a plurality of arbitration channels corresponding to each of the plurality of receiving nodes and the one or more remaining nodes at the transmitting node for a predetermined period of time, determining a start time for a data transmission from the transmitting node based on the monitored signals to prevent a data collision, and initiating a data transmission of a data signal from the transmitting node over the optical data channel at the determined start time.
摘要翻译：一种仲裁数据传输的方法，以防止包括发送节点，多个接收节点以及通过光数据信道连接的一个或多个剩余节点的光数据互连系统中的数据冲突。该方法涉及通过对应于发送节点的仲裁信道从发送节点发送发送请求信号，在发送节点处监视与多个接收节点中的每一个对应的多个仲裁信道，以及一个或多个剩余节点在发送节点预定的时间段内，基于所监视的信号确定来自发送节点的数据传输的开始时间，以防止数据冲突，以及通过光学发送来自发送节点的数据信号的数据传输数据通道在确定的开始时间。

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