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1. 发明申请

US20070130114A1 METHODS AND APPARATUS TO OPTIMIZE PROCESSING THROUGHPUT OF DATA STRUCTURES IN PROGRAMS 审中-公开
标题翻译：优化程序中数据结构处理的方法与设备
公开(公告)号：US20070130114A1
公开(公告)日：2007-06-07
申请号：US11549745
申请日：2006-10-16
申请人： Xiao-Feng Li , Lixia Liu , Dz-ching Ju
发明人： Xiao-Feng Li , Lixia Liu , Dz-ching Ju
IPC分类号： G06F17/30
CPC分类号： G06F8/4442
摘要： Methods and apparatus to optimize the processing throughput of data structures in programs are disclosed. A disclosed method to automatically optimize processing throughput of a data structure in a program comprises recording information representative of at least one access of the data structure, analyzing the representative information, and modifying the program to optimize the at least one access of the data structure based on the analysis, wherein modifying the program includes modifying at least one instruction of the program to translate one of the at least one access of the data structure from a first memory to a second memory.
摘要翻译：公开了优化程序中数据结构的处理吞吐量的方法和装置。用于自动优化程序中的数据结构的处理吞吐量的公开方法包括记录表示数据结构的至少一次访问的信息，分析代表信息，以及修改程序以优化基于数据结构的至少一个访问在分析中，其中修改程序包括修改程序的至少一个指令以将数据结构的至少一个访问中的一个从第一存储器转换到第二存储器。

2. 发明申请

US20070079079A1 Apparatus, systems and methods to reduce access to shared data storage 有权
标题翻译：减少对共享数据存储的访问的设备，系统和方法
公开(公告)号：US20070079079A1
公开(公告)日：2007-04-05
申请号：US11241249
申请日：2005-09-30
申请人： Xiao-Feng Li , Haibo Lin , Dz-ching Ju
发明人： Xiao-Feng Li , Haibo Lin , Dz-ching Ju
IPC分类号： G06F12/14
CPC分类号： G06F9/5016 , G06F11/3409
摘要： There is provided a method and apparatus to reduce access to shared data storage. The apparatus analyzes a multithreaded application and generates metadata that is utilized to optimize the multithreaded application that executes on multiple processing elements.
摘要翻译：提供了一种减少对共享数据存储的访问的方法和装置。该设备分析多线程应用程序，并生成用于优化在多个处理元素上执行的多线程应用程序的元数据。

3. 发明授权

US08656409B2 High performance queue implementations in multiprocessor systems 失效
标题翻译：多处理器系统中的高性能队列实现
公开(公告)号：US08656409B2
公开(公告)日：2014-02-18
申请号：US12087182
申请日：2005-12-29
申请人： Xiao-Feng Li , Dz-ching Ju
发明人： Xiao-Feng Li , Dz-ching Ju
IPC分类号： G06F9/54
CPC分类号： G06F9/526 , G06F5/12 , G06F9/546 , G06F2209/521
摘要： Systems and methods provide a single reader single writer (SRSW) queue structure having entries that can be concurrently accessed in an atomic manner with a single memory access. The SRSW queues may be combined to create more complicated queues, including multiple reader single writer (MRSW), single reader multiple writer (SRMW), and multiple reader multiple writer (MRMW) queues.
摘要翻译：系统和方法提供单个读写器单写入器（SRSW）队列结构，其具有可以以单一存储器访问以原子方式同时访问的条目。 SRSW队列可以被组合以创建更复杂的队列，包括多个读写器单写入器（MRSW），单个读取器多写入器（SRMW）和多个读取器多写入器（MRMW）队列。

4. 发明申请

US20070226740A1 Method and apparatus for global breakpoint for parallel debugging on multiprocessor systems 审中-公开
标题翻译：用于多处理器系统并行调试的全局断点的方法和装置
公开(公告)号：US20070226740A1
公开(公告)日：2007-09-27
申请号：US11364942
申请日：2006-02-28
申请人： Xiao-Feng Li , Dz-ching Ju
发明人： Xiao-Feng Li , Dz-ching Ju
IPC分类号： G06F9/46
CPC分类号： G06F11/3632
摘要： A system that concurrently executes threads of a multi-threaded application pauses the execution of one thread, then pauses the execution of another thread before the second thread alters a shared memory state. Chipsets and software to implement embodiments of the invention are also described and claimed.
摘要翻译：同时执行多线程应用程序的系统会暂停一个线程的执行，然后在第二个线程改变共享内存状态之前暂停另一个线程的执行。还描述和要求保护用于实现本发明实施例的芯片组和软件。

5. 发明申请

US20090133023A1 High Performance Queue Implementations in Multiprocessor Systems 失效
标题翻译：多处理器系统中的高性能队列实现
公开(公告)号：US20090133023A1
公开(公告)日：2009-05-21
申请号：US12087182
申请日：2005-12-29
申请人： Xiao-Feng Li , Dz-ching Ju
发明人： Xiao-Feng Li , Dz-ching Ju
IPC分类号： G06F9/46
CPC分类号： G06F9/526 , G06F5/12 , G06F9/546 , G06F2209/521
摘要： Systems and methods provide a single reader single writer (SRSW) queue structure having entries that can be concurrently accessed in an atomic manner with a single memory access. The SRSW queues may be combined to create more complicated queues, including multiple reader single writer (MRSW), single reader multiple writer (SRMW), and multiple reader multiple writer (MRMW) queues.
摘要翻译：系统和方法提供单个读写器单写入器（SRSW）队列结构，其具有可以以单一存储器访问以原子方式同时访问的条目。 SRSW队列可以被组合以创建更复杂的队列，包括多个读写器单写入器（MRSW），单个读取器多写入器（SRMW）和多个读取器多写入器（MRMW）队列。

6. 发明申请

US20060282707A1 Multiprocessor breakpoint 失效
标题翻译：多处理器断点
公开(公告)号：US20060282707A1
公开(公告)日：2006-12-14
申请号：US11148804
申请日：2005-06-09
申请人： Mark Rosenbluth , Xiao-Feng Li , Dz-ching Ju , Aaron Kunze
发明人： Mark Rosenbluth , Xiao-Feng Li , Dz-ching Ju , Aaron Kunze
IPC分类号： G06F11/00
CPC分类号： G06F11/3648
摘要： Techniques that may be utilized in a multiprocessor system are described. In one embodiment, one or more signals are generated to indicate that a breakpoint instruction is executed by one of the plurality of processors in the multiprocessor system.
摘要翻译：描述可在多处理器系统中使用的技术。在一个实施例中，生成一个或多个信号以指示断点指令由多处理器系统中的多个处理器之一执行。

7. 发明申请

US20120325629A1 Tilt Switch 审中-公开
标题翻译：倾斜开关
公开(公告)号：US20120325629A1
公开(公告)日：2012-12-27
申请号：US13165793
申请日：2011-06-22
申请人： Xiao-Feng Li , Li-Jun Xu , Ming-Han Lin
发明人： Xiao-Feng Li , Li-Jun Xu , Ming-Han Lin
IPC分类号： H01H35/02
CPC分类号： H01H35/02 , H01H1/5833 , H01H35/025
摘要： A tilt switch includes an insulating housing having a receiving chamber and a connecting cavity between which a ring-shaped step is formed, electrical terminals each having a support arm of platy shape inserted upward into the connecting cavity, a switching ball made of conductive materials and rollably placed in the receiving chamber, and an insulating cover removably covered on the insulating housing to restrain the switching ball in the insulating housing. The support arms are arranged at regular intervals around the center axis of the connecting cavity. The ring-shaped step has a top face substantially perpendicular to two vertical periphery surfaces of the connecting cavity and the receiving chamber. The switching ball needs to roll over the ring-shaped step having a hard span when the tilt switch changes working states thereof among a closed state, a shorted state and an open state.
摘要翻译：倾斜开关包括具有接收室和连接空腔的绝缘壳体，在其间形成有环形台阶，每个端子均具有向上插入到连接腔中的板状支撑臂，由导电材料制成的开关球，可滚动地放置在接收室中，以及绝缘盖，其可移除地覆盖在绝缘壳体上以限制绝缘壳体中的切换球。支撑臂围绕连接腔的中心轴线以规则的间隔布置。环形台阶具有大致垂直于连接腔和接收室的两个垂直周边表面的顶面。当倾斜开关在关闭状态，短路状态和打开状态之间改变工作状态时，切换球需要滚动具有硬跨度的环形台阶。

8. 发明申请

US20130001053A1 TILT SWITCH 审中-公开
标题翻译：倾斜开关
公开(公告)号：US20130001053A1
公开(公告)日：2013-01-03
申请号：US13174764
申请日：2011-06-30
申请人： Xiao-Feng Li , Li-Jun Xu , Ming-Han Lin , Wen-Tzao Yang
发明人： Xiao-Feng Li , Li-Jun Xu , Ming-Han Lin , Wen-Tzao Yang
IPC分类号： H01H35/02
CPC分类号： H01H35/02 , H01H1/16
摘要： A tilt switch includes an insulating housing having a receiving chamber and a connecting cavity smaller than the receiving chamber in diameter to form a step therebetween, electrical terminals penetrating through the insulating housing to project into the connecting cavity, an insulating cover removably covered on the insulating housing, and a switching ball made of conductive materials and rollably placed between the insulating housing and the insulating cover. The step has a top face perpendicular to periphery surfaces of the connecting cavity and the receiving chamber. The switching ball needs to roll over the step having a hard span when the tilt switch changes working states between a closed state realized by the switching ball projecting into the connecting cavity to simultaneously connect with the electrical terminals, and an open state realized by tilting the tilt switch to disconnect the switching ball from at least one electrical terminal.
摘要翻译：倾斜开关包括绝缘壳体，其具有容纳室和直径小于容纳室的连接腔，以在其间形成台阶，电端子穿过绝缘壳体突出到连接腔中，绝缘盖可拆卸地覆盖在绝缘体上壳体和由导电材料制成的开关球，并且可滚动地放置在绝缘壳体和绝缘盖之间。该台阶具有垂直于连接腔和接收室的周边表面的顶面。当倾斜开关改变由切换球实现的关闭状态之间的工作状态，切换球需要滚动具有硬跨度的台阶，该关闭状态将突出到连接腔中同时与电气端子连接，并且通过倾斜倾斜开关以将切换球从至少一个电气终端断开。

9. 发明申请

US20090150613A1 MEMORY MANAGEMENT 有权
标题翻译：内存管理
公开(公告)号：US20090150613A1
公开(公告)日：2009-06-11
申请号：US11954101
申请日：2007-12-11
申请人： Ligang Wang , Xiao-Feng Li
发明人： Ligang Wang , Xiao-Feng Li
IPC分类号： G06F12/00
CPC分类号： G06F12/0261
摘要： A memory manager that compacts a memory heap and reclaims space allocated to dead entities is disclosed. The memory manager may include threads of a first phase, threads of a second phase, and threads of a third phase. The threads of the first phase may assign a target address to each live entity of the memory heap. The thread of the second phase may update references of the memory heap based upon the target address for each live entity. The threads of the third phase may copy each live entity of the memory heap to its target address.
摘要翻译：公开了一种压缩内存堆并回收分配给死体的空间的内存管理器。存储器管理器可以包括第一阶段的线程，第二阶段的线程和第三阶段的线程。第一阶段的线程可以将目标地址分配给存储器堆的每个实体。第二阶段的线程可以基于每个实体的目标地址来更新存储器堆的引用。第三阶段的线程可以将内存堆的每个实体复制到其目标地址。

10. 发明授权

US07480768B2 Apparatus, systems and methods to reduce access to shared data storage 有权
标题翻译：减少对共享数据存储的访问的设备，系统和方法
公开(公告)号：US07480768B2
公开(公告)日：2009-01-20
申请号：US11241249
申请日：2005-09-30
申请人： Xiao-Feng Li , Haibo (Jason) Lin , Dz-ching (Roy) Ju
发明人： Xiao-Feng Li , Haibo (Jason) Lin , Dz-ching (Roy) Ju
IPC分类号： G06F12/00
CPC分类号： G06F9/5016 , G06F11/3409
摘要： There is provided a method and apparatus to reduce access to shared data storage. The apparatus analyzes a multithreaded application and generates metadata that is utilized to optimize the multithreaded application that executes on multiple processing elements.
摘要翻译：提供了一种减少对共享数据存储的访问的方法和装置。该设备分析多线程应用程序，并生成用于优化在多个处理元素上执行的多线程应用程序的元数据。

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