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1. 发明申请

US20070079079A1 Apparatus, systems and methods to reduce access to shared data storage 有权
标题翻译：减少对共享数据存储的访问的设备，系统和方法
公开(公告)号：US20070079079A1
公开(公告)日：2007-04-05
申请号：US11241249
申请日：2005-09-30
申请人： Xiao-Feng Li , Haibo Lin , Dz-ching Ju
发明人： Xiao-Feng Li , Haibo Lin , Dz-ching Ju
IPC分类号： G06F12/14
CPC分类号： G06F9/5016 , G06F11/3409
摘要： There is provided a method and apparatus to reduce access to shared data storage. The apparatus analyzes a multithreaded application and generates metadata that is utilized to optimize the multithreaded application that executes on multiple processing elements.
摘要翻译：提供了一种减少对共享数据存储的访问的方法和装置。该设备分析多线程应用程序，并生成用于优化在多个处理元素上执行的多线程应用程序的元数据。

2. 发明授权

US09021500B2 Rule based combinatorial computing for map/reduce platform 有权
标题翻译：用于地图/缩小平台的基于规则的组合计算
公开(公告)号：US09021500B2
公开(公告)日：2015-04-28
申请号：US13432080
申请日：2012-03-28
申请人： Yan Li , Haibo Lin , Liu Tao , Yudong Yang
发明人： Yan Li , Haibo Lin , Liu Tao , Yudong Yang
IPC分类号： G06F9/46 , G06F9/50
CPC分类号： G06F9/5066
摘要： A combinational computing apparatus and method. The combinational computing method includes the steps of: receiving a first setting relating to multiple groups of input data and a second setting relating to a combinatorial mode among multiple groups of input data, obtaining the data combination of the multiple groups of input data according to the first setting and the second setting, and performing a desired calculating operation on the data combination.
摘要翻译：一种组合计算装置和方法。组合计算方法包括以下步骤：在多组输入数据之间接收与多组输入数据有关的第一设置和与组合模式相关的第二设置，根据所述组合模式获得多组输入数据的数据组合第一设置和第二设置，并且对数据组合执行期望的计算操作。

3. 发明授权

US09021501B2 Combinatorial computing 有权
标题翻译：组合计算
公开(公告)号：US09021501B2
公开(公告)日：2015-04-28
申请号：US13584876
申请日：2012-08-14
申请人： Yan Li , Haibo Lin , Liu Tao , Yudong Yang
发明人： Yan Li , Haibo Lin , Liu Tao , Yudong Yang
IPC分类号： G06F9/46 , G06F9/50
CPC分类号： G06F9/5066
摘要： A combinational computing apparatus and method. The combinational computing method includes the steps of: receiving a first setting relating to multiple groups of input data and a second setting relating to a combinatorial mode among multiple groups of input data, obtaining the data combination of the multiple groups of input data according to the first setting and the second setting, and performing a desired calculating operation on the data combination.
摘要翻译：一种组合计算装置和方法。组合计算方法包括以下步骤：在多组输入数据之间接收与多组输入数据有关的第一设置和与组合模式相关的第二设置，根据所述组合模式获得多组输入数据的数据组合第一设置和第二设置，并且对数据组合执行期望的计算操作。

4. 发明授权

US08893127B2 Method and system for loading application to a local memory of a co-processor system by using position independent loader 有权
标题翻译：通过使用位置无关的加载程序将应用程序加载到协处理器系统的本地存储器的方法和系统
公开(公告)号：US08893127B2
公开(公告)日：2014-11-18
申请号：US12869164
申请日：2010-08-26
申请人： Li Hui Guo , Yan Li , Haibo Lin , Yonghua Lin , Yudong Yang
发明人： Li Hui Guo , Yan Li , Haibo Lin , Yonghua Lin , Yudong Yang
IPC分类号： G06F9/46 , G06F9/445 , G06F9/38
CPC分类号： G06F9/445 , G06F9/3881 , G06F2212/251 , G06F2212/253
摘要： A co-processor system and a method for loading an application to a local memory of a co-processor system. In the method, re-locatable code and descriptive data are copied from a loading region to a non-loading region. An executable image to be loaded is loaded using the re-locatable code copied to the non-loading region according to the descriptive data. The local memory includes a loading region and a non-loading region, the loading region stories a loader and descriptive data of an executable image to be loaded of the application, and the loader includes re-locatable code. A system is provided for carrying out the steps of the method. In accordance with the system and method of the present invention, flexibility of co-processor system application development is improved without occupying additional storage space.
摘要翻译：一种协处理器系统和一种将应用程序加载到协处理器系统的本地存储器的方法。在该方法中，可重新定位的代码和描述性数据从加载区域复制到非加载区域。根据描述性数据，使用可重新定位的代码复制到非加载区域来加载要加载的可执行映像。本地存储器包括加载区域和非加载区域，加载区域描述加载器和要应用程序加载的可执行映像的描述数据，并且加载器包括可重定位代码。提供了一种用于执行该方法的步骤的系统。根据本发明的系统和方法，在不占用额外存储空间的情况下，协同处理器系统应用开发的灵活性得到改善。

5. 发明授权

US08386664B2 Reducing runtime coherency checking with global data flow analysis 有权
标题翻译：通过全局数据流分析减少运行时一致性检查
公开(公告)号：US08386664B2
公开(公告)日：2013-02-26
申请号：US12125167
申请日：2008-05-22
申请人： Tong Chen , Haibo Lin , John K. O'Brien , Tao Zhang
发明人： Tong Chen , Haibo Lin , John K. O'Brien , Tao Zhang
IPC分类号： G06F13/28 , G06F12/00 , G06F13/00 , G06F21/00
CPC分类号： G06F8/433
摘要： Reducing runtime coherency checking using global data flow analysis is provided. A determination is made as to whether a call is for at least one of a DMA get operation or a DMA put operation in response to the call being issued during execution of a compiled and optimized code. A determination is made as to whether a software cache write operation has been issued since a last flush operation in response to the call being the DMA get operation. A DMA get runtime coherency check is then performed in response to the software cache write operation being issued since the fast flush operation.
摘要翻译：提供了使用全局数据流分析减少运行时一致性检查。确定在执行编译和优化的代码期间是否响应于正在发出的呼叫而进行DMA获取操作或DMA置位操作中的至少一个的呼叫。确定自上一次刷新操作以来是否已经发出软件缓存写入操作，以响应于该调用是DMA获取操作。然后执行DMA获得运行时一致性检查，以响应快速刷新操作后发出的软件缓存写入操作。

6. 发明授权

US08344916B2 System and method for simplifying transmission in parallel computing system 有权
标题翻译：并行计算系统简化传输的系统和方法
公开(公告)号：US08344916B2
公开(公告)日：2013-01-01
申请号：US13016044
申请日：2011-01-28
申请人： Haibo Lin , Jia Jia Wen , Zhe Xiang , Yi Xin Zhao
发明人： Haibo Lin , Jia Jia Wen , Zhe Xiang , Yi Xin Zhao
IPC分类号： H03M7/30
CPC分类号： G06F17/30445
摘要： Simplifying transmission in a distributed parallel computing system. The method includes: identifying at least one item in a data input to the parallel computing unit; creating a correspondence relation between the at least one item and indices thereof according to a simplification coding algorithm, where the average size of the indices is less than the average size of the at least one item; replacing the at least one item with the corresponding indices according to the correspondence relation; generating simplified intermediate results by the parallel computing unit based on the indices; and transmitting the simplified intermediate results. The invention also provides a system corresponding to the above method.
摘要翻译：在分布式并行计算系统中简化传输。该方法包括：识别输入到并行计算单元的数据中的至少一个项目; 根据简化编码算法在所述至少一个项目和其索引之间建立对应关系，其中所述索引的平均大小小于所述至少一个项目的平均大小; 根据对应关系用相应的索引代替至少一个项目; 基于指标，由并行计算单元生成简化的中间结果; 并传输简化的中间结果。本发明还提供了一种对应于上述方法的系统。

7. 发明申请

US20110208947A1 System and Method for Simplifying Transmission in Parallel Computing System 有权
标题翻译：并行计算系统简化传输的系统与方法
公开(公告)号：US20110208947A1
公开(公告)日：2011-08-25
申请号：US13016044
申请日：2011-01-28
申请人： Haibo Lin , Jia Jia Wen , Zhe Xiang , Yi Xin Zhao
发明人： Haibo Lin , Jia Jia Wen , Zhe Xiang , Yi Xin Zhao
IPC分类号： G06F9/30
CPC分类号： G06F17/30445
摘要： Simplifying transmission in a distributed parallel computing system. The method includes: identifying at least one item in a data input to the parallel computing unit; creating a correspondence relation between the at least one item and indices thereof according to a simplification coding algorithm, where the average size of the indices is less than the average size of the at least one item; replacing the at least one item with the corresponding indices according to the correspondence relation; generating simplified intermediate results by the parallel computing unit based on the indices; and transmitting the simplified intermediate results. The invention also provides a system corresponding to the above method.
摘要翻译：在分布式并行计算系统中简化传输。该方法包括：识别输入到并行计算单元的数据中的至少一个项目; 根据简化编码算法在所述至少一个项目和其索引之间建立对应关系，其中所述索引的平均大小小于所述至少一个项目的平均大小; 根据对应关系用相应的索引代替至少一个项目; 基于指标，由并行计算单元生成简化的中间结果; 并传输简化的中间结果。本发明还提供了一种对应于上述方法的系统。

8. 发明申请

US20090193159A1 BUS ENCODING/DECODING METHOD AND BUS ENCODER/DECODER 失效
标题翻译：总线编码/解码方法和总线编码器/解码器
公开(公告)号：US20090193159A1
公开(公告)日：2009-07-30
申请号：US12360914
申请日：2009-01-28
申请人： Yu Li , Haibo Lin , Wen Bo Shen , Kai Zheng
发明人： Yu Li , Haibo Lin , Wen Bo Shen , Kai Zheng
IPC分类号： G06F13/32
CPC分类号： H04L25/4906 , G06F1/3253 , G06F9/3802 , Y02D10/151
摘要： An encoding method and an encoder for encoding data transmitted in a manner of bursts via a parallel bus and a decoding method and a decoder. The encoding method includes organizing data of the bursts into matrixes, determining for each of the matrixes whether a transform mode capable of decreasing the bus transition number exists, determining that the matrix needs to be transformed, determining a transform mode for transforming the matrix, and replacing the initial matrix with the transformed matrix. Then, forming a new matrix to be transmitted from matrixes which do not need to be transformed and matrixes which have been transformed. Thereafter, first generating a transform information word indicating transform states of the respective matrixes and then attaching the transform information word to the matrix to be transmitted to form an encoded matrix for actual transmission.
摘要翻译：一种编码方法和编码器，用于经由并行总线和解码方法以及解码器对以脉冲串的方式发送的数据进行编码。该编码方法包括将脉冲串的数据组织成矩阵，确定每个矩阵是否存在能够减小总线转换数的变换模式，确定矩阵需要变换，确定用于转换矩阵的变换模式，以及用转换的矩阵代替初始矩阵。然后，形成要从不需要变换的矩阵发送的新矩阵和已经被变换的矩阵。此后，首先产生指示各个矩阵的变换状态的变换信息字，然后将变换信息字附加到要发送的矩阵，以形成用于实际发送的编码矩阵。

9. 发明授权

US08281295B2 Computer analysis and runtime coherency checking 失效
标题翻译：计算机分析和运行时一致性检查
公开(公告)号：US08281295B2
公开(公告)日：2012-10-02
申请号：US12125982
申请日：2008-05-23
申请人： Tong Chen , Haibo Lin , John K. O'Brien , Tao Zhang
发明人： Tong Chen , Haibo Lin , John K. O'Brien , Tao Zhang
IPC分类号： G06F9/45
CPC分类号： G06F8/433
摘要： Compiler analysis and runtime coherency checking for reducing coherency problems is provided. Source code is analyzed to identify at least one of a plurality of loops that contains a memory reference. A determination is made as to whether the memory reference is an access to a global memory that should be handled by at least one of a software controlled cache or a direct buffer. A determination is made as to whether there is a data dependence between the memory reference and at least one reference from at least one of other direct buffers or other software controlled caches in response to an indication that the memory reference is an access to the global memory that should be handled by either the software controlled cache or the direct buffer. A direct buffer transformation is applied to the memory reference in response to a negative indication of the data dependence.
摘要翻译：提供了编译器分析和运行时相关性检查，以减少相关性问题。分析源代码以识别包含存储器引用的多个循环中的至少一个。确定存储器引用是否是对由软件控制的高速缓存或直接缓冲器中的至少一个来处理的全局存储器的访问。确定响应于存储器引用是对全局存储器的访问的指示，确定存储器引用与来自其他直接缓冲器或其他软件控制的高速缓存中的至少一个的至少一个引用之间是否存在数据依赖性应由软件控制的缓存或直接缓冲区来处理。响应于数据依赖性的负指示，将直接缓冲器变换应用于存储器引用。

10. 发明申请

US20120311587A1 COMBINATORIAL COMPUTING 审中-公开
标题翻译：组合计算机
公开(公告)号：US20120311587A1
公开(公告)日：2012-12-06
申请号：US13584876
申请日：2012-08-14
申请人： Yan Li , Haibo Lin , Liu Tao , Yudong Yang
发明人： Yan Li , Haibo Lin , Liu Tao , Yudong Yang
IPC分类号： G06F9/46
CPC分类号： G06F9/5066
摘要： A combinational computing apparatus and method. The combinational computing method includes the steps of: receiving a first setting relating to multiple groups of input data and a second setting relating to a combinatorial mode among multiple groups of input data, obtaining the data combination of the multiple groups of input data according to the first setting and the second setting, and performing a desired calculating operation on the data combination.
摘要翻译：一种组合计算装置和方法。组合计算方法包括以下步骤：在多组输入数据之间接收与多组输入数据有关的第一设置和与组合模式相关的第二设置，根据所述组合模式获得多组输入数据的数据组合第一设置和第二设置，并且对数据组合执行期望的计算操作。

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