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1. 发明申请

US20110163799A1 Bi-directional Trimming Methods and Circuits for a Precise Band-Gap Reference 有权
标题翻译：用于精确带隙参考的双向修整方法和电路
公开(公告)号：US20110163799A1
公开(公告)日：2011-07-07
申请号：US12651993
申请日：2010-01-04
申请人： Xiao Fei KUANG , Kam Chuen WAN , Kwai Chi CHAN , Yat To (William) WONG , Kwok Kuen (David) KWONG
发明人： Xiao Fei KUANG , Kam Chuen WAN , Kwai Chi CHAN , Yat To (William) WONG , Kwok Kuen (David) KWONG
IPC分类号： G05F3/02
CPC分类号： G05F3/30 , H01C17/22
摘要： A bandgap reference circuit has trimming-up resistors and trimming-down resistors for bi-directional trimming. PNP transistors have base and collectors grounded and emitters connected to parallel resistors. A difference resistor drives an inverting input of an op amp that drives a transistor that generates the bandgap reference voltage Vbg. A sensing resistor connects Vbg to a splitting node that connects to the non-inverting input through a first parallel resistor. The splitting node also connects through a second parallel resistor to the inverting input. Fuses or switches enable the trimming-up and trimming-down resistors. The trimming-up resistors are in series with the sensing resistor and the trimming-down resistors are in series with an output resistor that connects Vbg to reference voltage Vref. The circuit can be designed for a more typical process since bi-directional trimming allows Vref to be raised or lowered. Many circuits need no trimming when targeted for the typical process.
摘要翻译：带隙参考电路具有用于双向修剪的微调电阻和微调电阻。 PNP晶体管的基极和集电极接地，发射极连接到并联电阻。差分电阻驱动驱动产生带隙参考电压Vbg的晶体管的运算放大器的反相输入。感测电阻器将Vbg连接到通过第一并联电阻器连接到非反相输入的分离节点。分离节点还通过第二并联电阻器连接到反相输入端。保险丝或开关使能微调和微调电阻。修整电阻与感测电阻串联，并且减法电阻与将Vbg连接到参考电压Vref的输出电阻串联。该电路可以设计用于更典型的工艺，因为双向修整允许Vref被升高或降低。许多电路在针对典型过程时不需要修剪。

2. 发明申请

US20130076546A1 CHARGE COMPENSATION CALIBRATION FOR HIGH RESOLUTION DATA CONVERTER 有权
标题翻译：高分辨率数据转换器的电荷补偿校准
公开(公告)号：US20130076546A1
公开(公告)日：2013-03-28
申请号：US13247119
申请日：2011-09-28
申请人： Kam Chuen WAN , Yat To (William) WONG , Ho Ming (Karen) WAN , Kwai Chi CHAN
发明人： Kam Chuen WAN , Yat To (William) WONG , Ho Ming (Karen) WAN , Kwai Chi CHAN
IPC分类号： H03M1/10
CPC分类号： H03M1/1033 , H03M1/0682 , H03M1/804
摘要： A calibrating Analog-to-Digital Converter (ADC) has an X-side array with binary-weighted capacitors that connect to an X-side line and a Y-side array connected to a Y-side line. Each array has binary-weighted capacitors from a most-significant-bit (MSB) to a least-significant-bit (LSB), but the LSB capacitor is duplicated as a termination capacitor and a middle capacitor between upper and lower groups is also duplicated as a surrogate capacitor. During calibration, lower array capacitors are switched low while the upper capacitors are driven by a thermometer-code value on both X and Y arrays. The thermometer value is inverted to the X-array but remains uninverted on the Y array. The lower array bits are tested to final a calibration value that has X and Y side voltages balanced.
摘要翻译：校准模数转换器（ADC）具有X侧阵列，其具有连接到Y侧线的X侧线和Y侧阵列的二进制加权电容器。每个阵列具有从最高有效位（MSB）到最低有效位（LSB）的二进制加权电容，但是LSB电容器被复制为终端电容器，并且上下组之间的中间电容器也被重复作为替代电容器。在校准期间，低阵列电容器切换低电平，而上电容器由X和Y阵列上的温度计代码值驱动。温度计值反转到X阵列，但在Y阵列上保持不变。测试较低的阵列位以最终确定平衡X和Y侧电压的校准值。

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