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1. 发明申请

US20130076546A1 CHARGE COMPENSATION CALIBRATION FOR HIGH RESOLUTION DATA CONVERTER 有权
标题翻译：高分辨率数据转换器的电荷补偿校准
公开(公告)号：US20130076546A1
公开(公告)日：2013-03-28
申请号：US13247119
申请日：2011-09-28
申请人： Kam Chuen WAN , Yat To (William) WONG , Ho Ming (Karen) WAN , Kwai Chi CHAN
发明人： Kam Chuen WAN , Yat To (William) WONG , Ho Ming (Karen) WAN , Kwai Chi CHAN
IPC分类号： H03M1/10
CPC分类号： H03M1/1033 , H03M1/0682 , H03M1/804
摘要： A calibrating Analog-to-Digital Converter (ADC) has an X-side array with binary-weighted capacitors that connect to an X-side line and a Y-side array connected to a Y-side line. Each array has binary-weighted capacitors from a most-significant-bit (MSB) to a least-significant-bit (LSB), but the LSB capacitor is duplicated as a termination capacitor and a middle capacitor between upper and lower groups is also duplicated as a surrogate capacitor. During calibration, lower array capacitors are switched low while the upper capacitors are driven by a thermometer-code value on both X and Y arrays. The thermometer value is inverted to the X-array but remains uninverted on the Y array. The lower array bits are tested to final a calibration value that has X and Y side voltages balanced.
摘要翻译：校准模数转换器（ADC）具有X侧阵列，其具有连接到Y侧线的X侧线和Y侧阵列的二进制加权电容器。每个阵列具有从最高有效位（MSB）到最低有效位（LSB）的二进制加权电容，但是LSB电容器被复制为终端电容器，并且上下组之间的中间电容器也被重复作为替代电容器。在校准期间，低阵列电容器切换低电平，而上电容器由X和Y阵列上的温度计代码值驱动。温度计值反转到X阵列，但在Y阵列上保持不变。测试较低的阵列位以最终确定平衡X和Y侧电压的校准值。

2. 发明申请

US20130141264A1 REDUCED RESIDUAL OFFSET SIGMA DELTA ANALOG-TO-DIGITAL CONVERTER (ADC) WITH CHOPPER TIMING AT END OF INTEGRATING PHASE BEFORE TRAILING EDGE 有权
标题翻译：减少残留偏移SIGMA DELTA模拟数字转换器（ADC）在跟踪边缘之前的整合阶段结束时的切换时序
公开(公告)号：US20130141264A1
公开(公告)日：2013-06-06
申请号：US13308737
申请日：2011-12-01
申请人： Ho Ming (Karen) WAN , Yat To (William) WONG , Kwai Chi CHAN
发明人： Ho Ming (Karen) WAN , Yat To (William) WONG , Kwai Chi CHAN
IPC分类号： H03M3/02 , H03M1/12
CPC分类号： H03M3/34 , H03M3/43 , H03M3/454
摘要： An analog-to-digital converter (ADC) has a chopper-stabilized sigma-delta modulator (SDM). The SDM uses switched-capacitor integrators to sample, hold, and integrate an analog input in response to non-overlapping multi-phase clocks. Chopper multipliers are inserted on the inputs and outputs of an op amp in a first stage integrator. The chopper multipliers swap or pass through differential inputs in response to non-overlapping chopper clocks. A master clock operating at a frequency of the multi-phase clocks is divided down to trigger generation of the chopper clocks. Delay lines ensure that the edges of the chopper clocks occur before the edges of the multi-phase clocks. The chopper multipliers have already switched and are thus stable when multi-phase clocks change so charge injection at switches controlled by the multi-phase clocks is not immediately modulated by chopper multipliers. This clock timing increases the time available to respond to charge injection at switches improving linearity.
摘要翻译：模数转换器（ADC）具有斩波稳定的Σ-Δ调制器（SDM）。 SDM使用开关电容积分器来采样，保持和集成模拟输入以响应不重叠的多相时钟。斩波倍增器插入在第一级积分器中的运算放大器的输入和输出端。斩波器乘法器响应于不重叠的斩波时钟交换或通过差分输入。以多相时钟频率工作的主时钟被分频以触发斩波时钟的产生。延迟线确保斩波时钟的边沿在多相时钟的边沿之前发生。当多相时钟变化时，斩波倍增器已经切换并稳定，因此在由多相时钟控制的开关处的电荷注入不会被斩波乘法器立即调制。该时钟定时增加了可以在改善线性度的开关处对电荷注入进行响应的时间。

3. 发明申请

US20140104909A1 Diode-Less Full-Wave Rectifier for Low-Power On-Chip AC-DC Conversion 有权
标题翻译：无二极管全波整流器，用于低功耗片上AC-DC转换
公开(公告)号：US20140104909A1
公开(公告)日：2014-04-17
申请号：US13652474
申请日：2012-10-16
申请人： Kwok Kuen (David) KWONG , Chun Fai WONG , Leung Ling (Alan) PUN , Ho Ming (Karen) WAN
发明人： Kwok Kuen (David) KWONG , Chun Fai WONG , Leung Ling (Alan) PUN , Ho Ming (Karen) WAN
IPC分类号： H02M7/217
CPC分类号： H02M7/219 , H02M2007/2195 , Y02B70/1408
摘要： A bridge rectifier operates on low A.C. input voltages such as received by a Radio-Frequency Identification (RFID) device. Voltage drops due to bridge diodes are avoided. Four p-channel transistors are arranged in a transistor bridge across the A.C. inputs to produce an internal power voltage. Another four diode-connected transistors form a start-up diode bridge that generates a comparator power voltage and a reference ground. The start-up diode bridge operates even during initial start-up before the comparator and boost drivers operate. A comparator receives the A.C. input and controls timing of voltage boost drivers that alternately drive gates of the four p-channel transistors in the transistor bridge with voltages boosted higher than the peak A.C. voltage. Substrates are connected to the power voltage on the power-voltage half of the bridge and to the A.C. inputs on the ground half of the bridge to fully shut off transistors, preventing reverse current flow.
摘要翻译：桥式整流器在诸如由射频识别（RFID）设备接收的低交流输入电压下工作。避免了由桥二极管引起的电压降。四个P沟道晶体管布置在跨越交流输入的晶体管桥中以产生内部电源电压。另外四个二极管连接的晶体管形成起始二极管电桥，产生比较器电源电压和参考地。在比较器和升压驱动器运行之前，起动二极管桥即使在初始启动期间也工作。比较器接收交流输入并且控制升压驱动器的定时，其交替地驱动晶体管桥中的四个p沟道晶体管的栅极，其电压升高高于峰值交流电压。基板连接到桥的电源电压一半的电源电压和桥接器的一半的交流输入，以完全关闭晶体管，防止反向电流流动。

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