专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06797341B2 Method for producing boride thin films 失效
标题翻译：硼化物薄膜的制造方法
公开(公告)号：US06797341B2
公开(公告)日：2004-09-28
申请号：US10395892
申请日：2003-03-25
申请人： Xianghui Zeng , Alexej Pogrebnyakov , Xiaoxing Xi , Joan M. Redwing , Zi-Kui Liu , Darrell G. Schlom
发明人： Xianghui Zeng , Alexej Pogrebnyakov , Xiaoxing Xi , Joan M. Redwing , Zi-Kui Liu , Darrell G. Schlom
IPC分类号： B05D300
CPC分类号： H01L39/2493 , C23C14/0021 , C23C14/0057 , C23C14/067 , C30B23/02 , C30B29/10 , H01L29/7834 , H01L39/2487 , Y10T29/49014
摘要： Thin films of conducting and superconducting materials are formed by a process which combines physical vapor deposition with chemical vapor deposition. Embodiments include forming boride films, such as magnesium diboride, in high purity with superconducting properties on substrates typically used in the semiconductor industry by physically generating magnesium vapor in a deposition chamber and introducing a boron containing precursor into the chamber which combines with the magnesium vapor to form a thin boride film on the substrate.
摘要翻译：导电和超导材料的薄膜通过将物理气相沉积与化学气相沉积相结合的方法形成。实施方案包括在通常用于半导体工业的基底上以高纯度形成具有超导特性的硼化物膜，例如二硼化镁，其通过在沉积室中物理产生镁蒸汽并将含硼前体引入到与镁蒸气结合的室中在基板上形成薄硼化物膜。

2. 发明公开

US20230352584A1 TECHNOLOGIES FOR TRANSISTORS WITH A FERROELECTRIC GATE DIELECTRIC 审中-公开
公开(公告)号：US20230352584A1
公开(公告)日：2023-11-02
申请号：US17734372
申请日：2022-05-02
申请人： Dmitri Evgenievich Nikonov , Chia-Ching Lin , Uygar E. Avci , Tanay A. Gosavi , Raseong Kim , Ian Alexander Young , Hai Li , Ashish Verma Penumatcha , Ramamoorthy Ramesh , Darrell G. Schlom
发明人： Dmitri Evgenievich Nikonov , Chia-Ching Lin , Uygar E. Avci , Tanay A. Gosavi , Raseong Kim , Ian Alexander Young , Hai Li , Ashish Verma Penumatcha , Ramamoorthy Ramesh , Darrell G. Schlom
IPC分类号： H01L29/78 , H01L29/51 , H01L29/66 , H10B51/30
CPC分类号： H01L29/78391 , H01L29/516 , H01L29/6684 , H10B51/30
摘要： Technologies for a transistor with a ferroelectric gate dielectric are disclosed. In the illustrative embodiment, a transistor has a ferroelectric gate dielectric that is lattice matched to the channel of the transistor. In one embodiment, the ferroelectric polarization changes when voltage is applied and removed from a gate electrode, facilitating switching of the transistor at a lower applied voltage. In another embodiment, the ferroelectric polarization of a gate dielectric of a transistor changes when the voltage is past a positive threshold value or a negative threshold value. Such a transistor can be used as a one transistor memory cell.

3. 发明授权

US5528052A Superconductive-channel electric field-effect drive 失效
标题翻译：超导通道电场效应驱动
公开(公告)号：US5528052A
公开(公告)日：1996-06-18
申请号：US171888
申请日：1993-12-22
申请人： Johannes G. Bednorz , Jochen D. Mannhart , Carl A. Mueller , Darrell G. Schlom
发明人： Johannes G. Bednorz , Jochen D. Mannhart , Carl A. Mueller , Darrell G. Schlom
IPC分类号： H01L39/14 , H01L29/06 , B05D5/12 , H01B12/00 , H01L39/22
CPC分类号： H01L39/146
摘要： Proposed is a method for operating a field-effect device comprised of a superconducting current channel having source and drain electrodes connected thereto, said superconducting current channel being separated from a gate electrode by an insulating layer, where the resistance of said current channel is controlled by varying the critical current of the superconducting material through the application of an electrical field across the superconducting current channel, which in turn changes the density of the mobile charge carriers in the superconducting material. Taught is also an inverted MISFET device for performing that method, the device being characterized in that on an electrically conductive substrate an insulating layer is provided which in turn carries a layer consisting of a superconducting material, and that a gate electrode is attached to said substrate, and source and drain electrodes are electrically connected to said superconductor layer. Advantageously, between the substrate and the superconducting layer, a metallic passivation layer may be provided.
摘要翻译：提出了一种用于操作场效应器件的方法，该场效应器件包括具有与其连接的源电极和漏电极的超导电流通道，所述超导电流通道由绝缘层与栅电极分离，其中所述电流通道的电阻由通过在超导电流通道上施加电场来改变超导材料的临界电流，这继而改变超导材料中的可移动电荷载流子的密度。教授也是用于执行该方法的反向MISFET器件，其特征在于，在导电衬底上提供绝缘层，该绝缘层又带有由超导材料组成的层，并且栅电极附着到所述衬底并且源电极和漏电极电连接到所述超导体层。有利地，在衬底和超导层之间可以提供金属钝化层。

4. 发明授权

US07449738B2 Strain-engineered ferroelectric thin films 有权
标题翻译：应变工程铁电薄膜
公开(公告)号：US07449738B2
公开(公告)日：2008-11-11
申请号：US10977335
申请日：2004-10-29
申请人： Chang-Beom Eom , Kyung-Jin Choi , Darrell G. Schlom , Long-Qing Chen
发明人： Chang-Beom Eom , Kyung-Jin Choi , Darrell G. Schlom , Long-Qing Chen
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L21/02197 , H01L21/02266 , H01L21/02304 , H01L21/31691 , H01L29/516
摘要： A strained thin film structure includes a substrate layer formed of a crystalline scandate material having a top surface, and a strained layer of crystalline ferroelectric epitaxially grown with respect to the crystalline substrate layer so as to be in a strained state and at a thickness below which dislocations begin to occur in the crystalline ferroelectric layer. An intermediate layer may be grown between the top surface of the substrate layer and the ferroelectric layer wherein the intermediate layer carries the lattice structure of the underlying substrate layer. The properties of the ferroelectric film are greatly enhanced as compared to the bulk ferroelectric material, and such films are suitable for use in applications including ferroelectric memories.
摘要翻译：应变薄膜结构包括由具有顶表面的结晶钪酸盐材料形成的衬底层和相对于晶体衬底层外延生长的结晶铁电的应变层，以便处于应变状态，厚度低于此位错开始发生在结晶铁电层中。中间层可以在衬底层的顶表面和铁电层之间生长，其中中间层承载下面的衬底层的晶格结构。与体积铁电体相比，强电介质膜的性质大大提高，这种膜适用于铁电存储器等应用。

5. 发明授权

US5602080A Method for manufacturing lattice-matched substrates for high-T.sub.c superconductor films 失效
标题翻译：用于制造高Tc超导体膜的晶格匹配衬底的方法
公开(公告)号：US5602080A
公开(公告)日：1997-02-11
申请号：US193919
申请日：1994-02-09
申请人： Johannes G. Bednorz , Jochen D. Mannhart , Carl A. Mueller , Darrell G. Schlom
发明人： Johannes G. Bednorz , Jochen D. Mannhart , Carl A. Mueller , Darrell G. Schlom
IPC分类号： C30B11/00 , C30B13/00 , C30B15/00 , H01L39/24 , C30B15/20
CPC分类号： C30B29/225 , C30B11/00 , C30B13/00 , C30B15/00 , H01L39/2454 , Y10S505/729
摘要： This method for manufacturing lattice-matched substrates for high-T.sub.c superconductors employs at least two materials chosen from the group of known suitable substrate materials, of which one has a lattice constant smaller than the lattice constant(s) of the perovskite subcell of the selected superconductor material, while the other one has a lattice constant greater than the lattice constant of the perovskite subcell of the selected superconductor. These materials are then powdered and mixed intimately for providing a single-crystal either from the molten mixture of the chosen materials or by thin film deposition, said single-crystal containing appropriate molar percentages of the chosen materials so that resulting lattice constant is essentially the same as that of the selected superconductor material.
摘要翻译：用于制造用于高Tc超导体的晶格匹配衬底的方法采用选自已知合适衬底材料的组中的至少两种材料，其中晶体常数小于所选择的钙钛矿型电池的晶格常数超导体材料，而另一个具有大于所选超导体的钙钛矿亚电池的晶格常数的晶格常数。然后将这些材料粉碎和混合，以从所选材料的熔融混合物中或通过薄膜沉积提供单晶，所述单晶含有所选材料的适当摩尔百分比，使得得到的晶格常数基本相同如所选择的超导体材料。

6. 发明公开

US20230353157A1 PEROVSKITE-BASED MAGNETOELECTRIC SPIN-ORBIT LOGIC DEVICES 审中-公开
公开(公告)号：US20230353157A1
公开(公告)日：2023-11-02
申请号：US17733166
申请日：2022-04-29
申请人： Tanay A. Gosavi , Chia-Ching Lin , Sasikanth Manipatruni , Dmitri Evgenievich Nikonov , Ian Alexander Young , Ramamoorthy Ramesh , Darrell G. Schlom , Megan E. Holtz , Rachel A. Steinhardt
发明人： Tanay A. Gosavi , Chia-Ching Lin , Sasikanth Manipatruni , Dmitri Evgenievich Nikonov , Ian Alexander Young , Ramamoorthy Ramesh , Darrell G. Schlom , Megan E. Holtz , Rachel A. Steinhardt
IPC分类号： H03K19/18 , H01L43/10 , H01L43/02 , H01L27/22
CPC分类号： H03K19/18 , H01L43/10 , H01L43/02 , H01L27/22
摘要： Magnetoelectric spin-orbit logic (MESO) devices comprise a magnetoelectric switch capacitor coupled to a spin-orbit coupling structure. The logic state of the MESO device is represented by the magnetization orientation of the ferromagnet of the magnetoelectric switch capacitor and the spin-orbit coupling structure converts the magnetization orientation of the ferromagnet to an output current. MESO devices in which all or at least some of the constituent layers of the device are perovskite materials can provide advantages such as improved control over the manufacturing of MESO devices and high quality interfaces between MESO layers due to the lattice matching of perovskite materials.

7. 发明授权

US06642539B2 Epitaxial template and barrier for the integration of functional thin film metal oxide heterostructures on silicon 失效
标题翻译：外延模板和屏障，用于在硅上整合功能性薄膜金属氧化物异质结构
公开(公告)号：US06642539B2
公开(公告)日：2003-11-04
申请号：US10231401
申请日：2002-08-29
申请人： Ramamoorthy Ramesh , Darrell G. Schlom
发明人： Ramamoorthy Ramesh , Darrell G. Schlom
IPC分类号： H01L2912
CPC分类号： H01L27/11502 , G11C11/22 , H01L21/28568 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： A ferroelectric memory cell formed on a monocrystalline silicon underlayer, either an epitaxial silicon contact plug to a transistor source or drain or silicon gate region for which the memory cell forms a non-volatile gate. A conductive barrier layer of doped strontium titanate, whether cationically substituted, such by lanthanum or niobium for strontium and titanium respectively, or anionically deficient, is epitaxially grown over the silicon, and a lower metal oxide electrode layer, a ferroelectric layer and an upper metal oxide electrode layer are epitaxially grown on the barrier layer. No platinum barrier is needed beneath the ferroelectric stack. The invention can be applied to many other functional oxide materials of the Ruddlesden-Popper and devices including micromachined electromechanical (MEM) devices and ferromagnetic tri-layer devices.
摘要翻译：在单晶硅衬底上形成的铁电存储单元，即存储单元形成非易失性栅极的硅晶体管源极或漏极或硅栅极区域的外延硅接触插塞。掺杂的钛酸锶的导电阻挡层，无论是阳离子取代的，如分别用于锶和钛的镧或铌或阴离子缺陷的导电阻挡层在硅上外延生长，并且下部金属氧化物电极层，铁电层和上部金属氧化物电极层在阻挡层上外延生长。铁电堆下方不需要铂金屏障。本发明可以应用于Ruddlesden-Popper的许多其它功能氧化物材料和包括微加工机电（MEM）器件和铁磁性三层器件的器件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式