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1. 发明授权

US4613915A Twin track vertical magnetic recording servo control method and apparatus with offset voltage compensation 失效
标题翻译：双轨垂直磁记录伺服控制方法和装置，具有失调电压补偿
公开(公告)号：US4613915A
公开(公告)日：1986-09-23
申请号：US787875
申请日：1985-10-16
申请人： William G. Crouse , Earl A. Cunningham , Albert W. Vinal
发明人： William G. Crouse , Earl A. Cunningham , Albert W. Vinal
IPC分类号： G11B5/58 , G11B5/596 , G11B5/56
CPC分类号： G11B5/58 , G11B5/1278 , G11B5/59627
摘要： This invention utilizes a sectored servo control having dual servo tracks recorded in the servo sector. In addition, the servo sector track portions have been recorded with two 180.degree. flux reversals in each track's polarity. The tracks are generally recorded with DC recording current to set a uniform magnetic polarity. The current is switched twice, i.e., from positive and negative and back again or vice versa for each servo track within the servo sector interval. This permits separation of the sensor, amplifier and servo signal offset voltages from the main servo signal itself. Two samples of the servo control voltage are taken during the servo sector interval and the polarity reversal of the servo track is necessary to allow separation of the offset voltages from a variety of sources from the off track or servo error signal.
摘要翻译：本发明利用了在伺服扇区中记录的具有双重伺服磁道的分区伺服控制。另外，伺服扇区轨道部分已经在每个磁道的极性上记录了两个180°的磁通反转。轨道通常以直流记录电流记录，以设定均匀的磁极性。电流从伺服扇区间隔内的每个伺服磁道切换两次，即从正负反向切换，反之亦然。这允许传感器，放大器和伺服信号偏移电压与主伺服信号本身分离。伺服控制电压的两个采样在伺服扇区间隔期间被采取，并且伺服磁道的极性反转是必要的，以允许将来自各种源的偏移电压与偏离磁道或伺服误差信号分离。

2. 发明授权

US5634022A Multi-media computer diagnostic system 失效
标题翻译：多媒体计算机诊断系统
公开(公告)号：US5634022A
公开(公告)日：1997-05-27
申请号：US847128
申请日：1992-03-06
申请人： William G. Crouse , Malcolm S. Ware
发明人： William G. Crouse , Malcolm S. Ware
IPC分类号： G06F11/22 , G06F11/36 , G06F11/00
CPC分类号： G06F11/3636 , G06F11/3644 , G06F11/3664 , G06F2201/805
摘要： Multi-media computer system diagnostic system for fault isolation in a multi-tasking hard, real-time task environment is described. Hard, real-time multi-tasking operations, particularly those unique to signal processing tasks may be monitored without creating a task processing overload and without delaying the results beyond hard, real-time task deadlines by insertion of a branch instruction in the task execution instructions being examined which cause execution of the task to branch to a diagnostic program. The diagnostic program executes a diagnostic instruction set and captures one or more digital samples characteristic of the operation of the hard, real-time task at the point in its program execution where the branch instruction was located. The digital data samples so obtained may be queued and graphically plotted on the screen of a display associated with the computer system to generate a graphical representation of the performance of the algorithm or signal processing task under examination in order to quickly isolate task malfunctions without having to review a mass of digital data samples. Alternatively, pre-selected samples may be injected into the task execution by loading task registers with predetermined data by executing a branch to a diagnostic function which inserts the samples.
摘要翻译：描述了多任务硬实时任务环境中的多媒体计算机系统故障隔离诊断系统。可以监视硬的实时多任务操作，特别是信号处理任务唯一的操作，而不会造成任务处理过载，并且通过在分支指令中插入任务执行指令而不延迟结果超出硬实时任务截止日期被检查导致执行任务分支到诊断程序。诊断程序执行一个诊断指令集，并且捕获一个或多个数字样本，其特征在于执行分支指令所在的程序执行时的硬实时任务的操作。如此获得的数字数据样本可以排队和图形绘制在与计算机系统相关联的显示器的屏幕上，以生成正在检查的算法或信号处理任务的性能的图形表示，以便快速地隔离任务故障，而不必审查大量的数字数据样本。或者，通过对插入样本的诊断功能执行分支，将预选样本注入到任务执行中，通过将任务寄存器加载到预定数据。

3. 发明授权

US4644108A Adaptive sub-band echo suppressor 失效
标题翻译：自适应子带回波抑制器
公开(公告)号：US4644108A
公开(公告)日：1987-02-17
申请号：US437093
申请日：1982-10-27
申请人： William G. Crouse , David R. Irvin
发明人： William G. Crouse , David R. Irvin
IPC分类号： H04B3/20 , H04B3/21
CPC分类号： H04B3/21
摘要： The subject suppressor is an improved form of echo suppressor used in conjunction with adaptive sub-band speech coders. The suppressor analyzes and uses N contiguous sub-bands of a sub-band speech coder. The intermediate results calculated during the normal operation of such speech coders may be analyzed in the suppressor to determine predictions for the echo levels of each sub-band and to set break in and break out thresholds. A substantial performance improvement with little increase in complexity over current echo suppressors is achieved. The subject suppressor may also be used with adaptive transform speech coders in which the corner frequency points define the edges of "sub-bands" for purposes of this invention. Sub-bands are defined here as contiguous segments of the frequency-energy spectrum. The sub-bands so defined can be formed or analytically divided by a bank of filters as in normal sub-band coders or they can be identified or analyzed as noted above by the corner points of an adaptive transform coder.
摘要翻译：受试者抑制器是与自适应子带语音编码器结合使用的改进形式的回波抑制器。抑制器分析和使用子带语音编码器的N个连续子带。在这种语音编码器的正常操作期间计算出的中间结果可以在抑制器中进行分析，以确定每个子带的回波水平的预测，并设定中断和分解阈值。实现了超过电流回波抑制器的实质性能改进，复杂度几乎没有增加。对象抑制器也可以与自适应变换语音编码器一起使用，其中角点频率点定义了用于本发明目的的“子带”的边缘。子频带在这里被定义为频谱能谱的连续分段。这样定义的子带可以如在正常子带编码器中一样由一组滤波器形成或分析地划分，或者可以如上所述通过自适应变换编码器的角点来识别或分析。

4. 发明授权

US4628307A FET switch for high frequency signals 失效
标题翻译： FET开关用于高频信号
公开(公告)号：US4628307A
公开(公告)日：1986-12-09
申请号：US683104
申请日：1984-12-18
申请人： William G. Crouse
发明人： William G. Crouse
IPC分类号： H03K17/00 , H03K17/691 , H03K17/693 , H04L12/42 , H04Q9/00
CPC分类号： H04L12/42 , H03K17/691
摘要： A solid state switching network includes three FET switches or devices arranged in a substantially "T" (or inverted "T") configuration. The network is controlled so that in an "OFF" or non-conducting state two of the FET switches are "OFF" and one is on. The high "OFF" impedance of the two FETs work against the low "ON" impedance of the third FET to provide an open circuit between the input and output of the switching network. The open circuit has greater isolation than is feasible with conventional circuits. The switching network or module is used in several configurations to couple data terminal equipment (DTE) to a communications highway.
摘要翻译：固态开关网络包括三个FET开关或以大致“T”（或倒“T”）配置布置的器件。控制网络使得在“OFF”或非导通状态下，两个FET开关为“OFF”且一个接通。两个FET的高“OFF”阻抗抵抗第三FET的低“ON”阻抗，以在开关网络的输入和输出之间提供开路。开路电路具有比常规电路更大的隔离度。交换网络或模块用于多种配置以将数据终端设备（DTE）耦合到通信高速公路。

5. 发明授权

US4110705A Noise reduction method and apparatus for companded delta modulators 失效
标题翻译：用于压缩三角形调制器的降噪方法和装置
公开(公告)号：US4110705A
公开(公告)日：1978-08-29
申请号：US842710
申请日：1977-10-17
申请人： William G. Crouse
发明人： William G. Crouse
IPC分类号： H04J3/18 , H03M3/02 , H04B14/06 , H03K7/02
CPC分类号： H03M3/022
摘要： A noise reduction circuit and method are described for implementation in a delta modulation system for signal transmission. Under certain conditions when the delta modulator has selected the minimum step size for encoding and transmission, the present technique and apparatus are effective to change the minimum step size in a way which prevents low level noise generation from occurring in the delta modulation system. The technique and circuit can be utilized with most commonly available delta modulators which have means for changing the step size (i.e., the delta) but is used to the best effect on more stable implementations of delta modulators where an integrator is replaced by a digital accumulator and a digital-to-analog converter.
摘要翻译：描述了用于在用于信号传输的增量调制系统中实现的降噪电路和方法。在某些情况下，当Δ调制器选择用于编码和传输的最小步长时，本技术和装置可有效地改变最小步长，以防止在delta调制系统中发生低电平噪声产生。该技术和电路可以用于具有用于改变步长（即，增量）的装置的最常用的三角形调制器，但是用于对三角形调制器的更稳定的实施方式产生最佳效果，其中积分器由数字累加器和一个数模转换器。

6. 发明授权

US5404522A System for constructing a partitioned queue of DMA data transfer requests for movements of data between a host processor and a digital signal processor 失效
标题翻译：用于构建用于主机处理器和数字信号处理器之间的数据移动的DMA数据传输请求的分区队列的系统
公开(公告)号：US5404522A
公开(公告)日：1995-04-04
申请号：US143406
申请日：1993-10-26
申请人： Donald E. Carmon , William G. Crouse , Malcolm S. Ware
发明人： Donald E. Carmon , William G. Crouse , Malcolm S. Ware
IPC分类号： G06F9/50 , G06F13/28 , G06F17/10 , G06F13/00 , G06F15/16
CPC分类号： G06F17/10 , G06F13/28 , G06F9/505 , G06F2209/509
摘要： A multi-media user task (host) computer is interfaced to a high speed DSP which provides support functions to the host computer via an interprocessor DMA bus master and controller. Support of multiple dynamic hard real-time signal processing task requirements are met by posting signal processor support task requests from the host processor through the interprocessor DMA controller to the signal processor and its operating system. The signal processor builds data transfer packet request execution lists in a partitioned queue in its own memory and executes internal signal processor tasks invoked by users at the host system by extracting signal sample data from incoming data packets presented by the interprocessor DMA controller in response to its execution of the DMA packet transfer request queues built by the signal processor in the partitioned queue. Processed signal values etc. are extracted from signal processor memory by the DMA interprocessor controller executing the partitioned packet request lists and delivered to the host processor. A very large number of packet transfers in support of numerous user tasks and implementing a very large number of DMA channels is thus made possible while avoiding the need for arbitration between the channels on the part of the signal processor or the host processor.
摘要翻译：多媒体用户任务（主机）计算机与高速DSP接口，高速DSP通过处理器DMA总线主控和控制器向主机提供支持功能。支持多种动态硬实时信号处理任务要求通过将信号处理器支持的任务请求从主处理器通过处理器DMA控制器发送到信号处理器及其操作系统来满足。信号处理器在其自己的存储器中的分区队列中构建数据传输分组请求执行列表，并且通过从处理器DMA控制器响应于其的传入数据分组提取信号样本数据来执行由主机系统用户调用的内部信号处理器任务执行由分区队列中的信号处理器构建的DMA分组传送请求队列。处理的信号值等由DMA处理器控制器从信号处理器存储器中执行分配的分组请求列表并被递送到主机处理器。因此，可以避免对信号处理器或主机处理器的信道之间的仲裁的需要，从而可以实现支持大量用户任务和实现非常大数量的DMA信道的大量数据包传输。

7. 发明授权

US4264974A Optimized digital delta modulation compander having truncation effect error recovery 失效
标题翻译：具有截断效应误差恢复的优化的数字增量调制压缩扩展
公开(公告)号：US4264974A
公开(公告)日：1981-04-28
申请号：US103891
申请日：1979-12-17
申请人： William G. Crouse
发明人： William G. Crouse
IPC分类号： H03M3/02 , H03M7/34 , H04B14/06 , H03K13/22 , H04B12/04
CPC分类号： H03M3/022
摘要： A digital delta modulation compander circuit makes advantageous use of the mathematical truncation created during the computation of step sizes to create a non-linear step size variation which differs from the optimum desired step size but causes convergence recovery during error conditions. It has been discovered that the truncation involved in the inaccurate approximation of mathematical calculation of the step sizes produces an advantageous result which leads to an optimized digital delta modulation compander that will recover from transmission errors over a wider range and with greater efficiency than other methods.
摘要翻译：数字增量调制压缩器电路有利地利用在计算步长期间产生的数学截断，以产生不同于最佳期望步长的非线性步长变化，但是在错误条件下导致收敛恢复。已经发现，涉及步长的数学计算的不精确近似中的截断产生有利的结果，其导致优化的数字增量调制压缩扩展器，其将在更宽的范围内从传输误差恢复并且以比其他方法更高的效率来恢复。

8. 发明授权

US5291468A Method and apparatus for synchronizing the readout of a sequential media device with a separate clocked device 失效
标题翻译：用于使顺序介质设备与单独计时设备的读出同步的方法和设备
公开(公告)号：US5291468A
公开(公告)日：1994-03-01
申请号：US760653
申请日：1991-09-16
申请人： Donald E. Carmon , William G. Crouse
发明人： Donald E. Carmon , William G. Crouse
IPC分类号： G06F3/06 , G06F3/08 , G06F5/10 , G06F13/38 , G06F13/42 , G11B20/10
CPC分类号： G06F5/10 , G06F3/0601 , G11B20/10 , G06F2003/0691 , G06F2205/061 , G11B2020/10814
摘要： A method and apparatus for controlling the readout rate of information from a sequential storage medium, such as a CD-ROM, to maintain synchronism between the device containing the medium and an independent receiver receiving the information. Information is loaded from the media into a buffer at a rate controlled by pulses from a device clock. Information is unloaded from the buffer for utilization by the receiver independently of the loading of the buffer. The amount of free space available in the buffer is measured as information is loaded into the buffer. The rate of the clock is dynamically adjusted in response to the amount of free buffer space to maintain the full state of the buffer within predetermined limits. In this manner, the buffer never empties or fills in response to the unloading by the independent receiver.
摘要翻译：用于控制诸如CD-ROM的顺序存储介质的信息的读出速率以保持包含介质的设备与接收信息的独立接收机之间的同步的方法和装置。信息从媒体以从设备时钟的脉冲控制的速率加载到缓冲器中。从缓冲器中卸载信息，以便接收器独立于缓冲区的加载。当信息加载到缓冲区中时，可以测量缓冲区中可用空间的大小。响应于可用缓冲器空间的量来动态地调整时钟的速率以将缓冲器的完全状态保持在预定的限度内。以这种方式，缓冲器不会因独立接收器的卸载而排空或填满。

9. 发明授权

US4899384A Table controlled dynamic bit allocation in a variable rate sub-band speech coder 失效
标题翻译：在可变速率子带语音编码器中的表控制动态比特分配
公开(公告)号：US4899384A
公开(公告)日：1990-02-06
申请号：US900113
申请日：1986-08-25
申请人： William G. Crouse , Malcolm S. Ware
发明人： William G. Crouse , Malcolm S. Ware
IPC分类号： G10L19/02 , H04B1/66
CPC分类号： H04B1/667 , G10L19/24
摘要： A sub-band coder utilizes one or more bit allocation tables to dynamically distribute the channel bit capacity bandwidth among the frequency bands according to the desired output quality of speech rather than by means of complex algorithms or simulation techniques. Multiple bit assignment tables are provided to allow various quality levels to be traded off as increasing bit rate demands are placed upon the transmission system. The technique is used for a single coder to achieve a minimum bit rate for a desired given level of subjective quality in speech output or may be used in a shared bit resource to maintain equal and minimum quality degradation for all users. The quality tables determine the number of bits to be dropped from the encoded representation of each signal sample to minimize the transmission load for a given coder without sacrificing speech quality to an unacceptable degree. Table entries are arranged based on the overall band peak energy level and on the sub-band peak energy distribution or spectrum as it is known in the field.
摘要翻译：子带编码器利用一个或多个比特分配表来根据期望的语音输出质量而不是通过复杂算法或模拟技术来动态分配频带中的信道比特容量带宽。提供多个位分配表以允许在传输系统上增加比特率要求时，各种质量级别被消除。该技术用于单个编码器以实现语音输出中期望的给定主观质量水平的最小比特率，或者可以在共享比特资源中使用以保持所有用户的相等和最小质量下降。质量表确定要从每个信号样本的编码表示中丢弃的位数，以使给定编码器的传输负载最小化，而不会将语音质量降至不可接受的程度。表格条目是基于总带宽峰值能级和子带峰值能量分布或频谱来排列的，如本领域已知的。

10. 发明授权

US4351983A Speech detector with variable threshold 失效
标题翻译：具有可变阈值的语音检测器
公开(公告)号：US4351983A
公开(公告)日：1982-09-28
申请号：US198504
申请日：1980-10-20
申请人： William G. Crouse , Charles R. Knox
发明人： William G. Crouse , Charles R. Knox
IPC分类号： G10L11/02 , H04B3/20 , H04J3/17 , G10L1/04 , H04B15/00
CPC分类号： G10L25/78 , H04B3/20 , H04J3/175
摘要： A speech activity detection circuit and method are described in which a digitized sample of the analog speech signal in a communications system is taken n times in a period of time t. The magnitude M of each sample is calculated and the largest value of M which is encountered over a given period t is stored as a peak magnitude M(t). This value is compared to a value M(t-1) which is the smallest value of M(t) from prior periods. The lesser of the two values is stored as the new value for M(t-1). The process is continued for i periods and at the end of the i.sup.th period, the value M(t-1) is multipled by a constant k and the product is stored as the threshold value for the next i periods of time t.
摘要翻译：描述了语音活动检测电路和方法，其中通信系统中的模拟语音信号的数字化样本在时间段t中被拍摄n次。计算每个样本的幅度M，并将在给定时段t内遇到的M的最大值存储为峰值幅度M（t）。将该值与从前一个周期的M（t）的最小值M（t-1）进行比较。两个值中的较小值存储为M（t-1）的新值。该过程在i个周期继续，并且在第i个周期结束时，将值M（t-1）乘以常数k，并将乘积存储为下一个i个时间段t的阈值。

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