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    • 2. 发明授权
    • Methodology for manufacturing hinged diaphragms for semiconductor sensors
    • 制造半导体传感器铰链隔膜的方法
    • US5245504A
    • 1993-09-14
    • US906598
    • 1992-08-06
    • Robert H. BullisArthur G. FoytJames L. Swindal
    • Robert H. BullisArthur G. FoytJames L. Swindal
    • G01L9/00G01P15/08G01P15/125
    • G01L9/0073G01L9/0042G01P15/0802G01P15/125G01P2015/084Y10T29/435
    • Manufacturing hinged diaphragms for semiconductor sensors (e.g., accelerometers, pressure transducers, etc.), from a SIMOX wafer (W, FIG. 3 A), in which the internal, insulating, silicon dioxide (SiO.sub.2) layer (3) is used as an etch stop in removing silicon from the underside of the wafer by etching with an appropriately selective etch, producing the reduced thickness, peripheral "hinge" areas (9; FIG. 3 A to FIG. 3 B), with the exposed part of the silicon dioxide layer being removed in a subsequent etching step (FIG. 3 B to FIG. 3C) using a different, selective etch. This produces a single layer, single-crystal, silicon "hinge" (9'; FIG. 3C) of uniform, continuous material, enhancing the linearity of diaphragm movement during use and the sensor's sensitivity and accuracy. (See FIG. 4 for methodological steps.) If the top, silicon region of the SIMOX wafer is insufficiently thick for the desired diaphragm thickness, additional layer(s) of epitaxial silicon are grown on the upper side of the silicon crystal until the desired thickness is reached; the same being true for increasing the thickness of the silicon substrate. If having reduced thickness areas for the "hinge" on both sides of the diaphragm are desired, a SIMOX wafer having an intermediate, silicon dioxide layer on both the "bottom" and the "top" of the wafer is used, with each layer serving as an etch stop on its respective side, with the then exposed portions of the silicon dioxide layers thereafter being removed, leaving flanking, alternating, silicon "hinge" bridges (90a/90b; FIG. 5A-C).
    • 制造用于半导体传感器(例如,加速度计,压力传感器等)的铰接隔膜,其中使用内部绝缘二氧化硅(SiO 2)层(3)作为SIMOX晶片(W,图3A) 通过用适当选择的蚀刻蚀刻从而从晶片的下侧移除硅的蚀刻停止件,产生减小的厚度,周边的“铰链”区域(9;图3A至图3B),其中暴露的部分 使用不同的选择性蚀刻在随后的蚀刻步骤(图3B至图3C)中去除二氧化硅层。 这产生均匀连续材料的单层,单晶,硅“铰链”(9';图3C),增强了使用过程中隔膜运动的线性度和传感器的灵敏度和精度。 (对于方法步骤,参见图4)如果SIMOX晶片的顶部硅区域对于期望的隔膜厚度不够厚,则在硅晶体的上侧生长附加的外延硅层,直到所需的 达到厚度; 对于增加硅衬底的厚度也是如此。 如果需要具有减小膜片两侧的“铰链”的厚度区域,则使用在晶片的“底部”和“顶部”上具有中间的二氧化硅层的SIMOX晶片,每层服务 作为其相应侧上的蚀刻停止层,随后其二氧化硅层的暴露部分被去除,留下侧面,交替的硅“铰链”桥(90a / 90b;图5A-C)。
    • 5. 发明授权
    • Sensor having direct-mounted sensing element
    • 传感器具有直接安装的传感元件
    • US5535626A
    • 1996-07-16
    • US361277
    • 1994-12-21
    • Robert H. BullisJames L. SwindalWalter J. WiegandCharles R. Winston, Jr.
    • Robert H. BullisJames L. SwindalWalter J. WiegandCharles R. Winston, Jr.
    • G01P1/02G01P15/125G01P15/08
    • G01P1/023G01P15/125G01P2015/0828
    • A silicon capacitive microsensor which is sensitive to acceleration forces includes a silicon capacitive sensing element 10 comprising three silicon layers 12,16,26 having glass dielectric layers 14,24 between each pair of silicon layers with the middle silicon layer 16 consisting of a proof mass 18 suspended between the two glass dielectric layers 14,24 by a silicon hinge 20 which is connected to a slightly thicker silicon support layer 17 around the periphery (FIG. 3 ) between the glass layers 14,24 (FIG. 1 ). Three metallic bond pads 40,42,44 on the surface 45 of the silicon layers 26,16,12, respectively, are soldered to circuit trace pads 108 on a circuit board 100 which has a glass upper layer 104 and a silicon support layer 102. The thermal expansion coefficient between the glass layer 104 and the sensing element 10 are substantially the same, thereby minimizing thermally induced stresses on the sensing element 10 and minimizing inaccuracies associated therewith. Such direct mounting greatly simplifies the manufacturing process for such sensors. Also, such direct mounting eliminates flying leads thereby allowing the sensing element 10 to be fabricated to much smaller dimensions than that of the prior art.
    • 对加速力敏感的硅电容微传感器包括硅电容感测元件10,其包括在每对硅层之间具有玻璃介电层14,24的三个硅层12,16,26,中间硅层16由检测质量块 18通过硅铰链20悬挂在两个玻璃介电层14,24之间,该硅铰链20连接到玻璃层14,24(图1)周围的周边(图3)之间的略厚的硅支撑层17。 分别在硅层26,16,12的表面45上的三个金属接合焊盘40,42,44焊接到电路板100上的电路迹线焊盘108,电路板100具有玻璃上层104和硅支撑层102 玻璃层104和感测元件10之间的热膨胀系数基本上相同,从而最小化感应元件10上的热致应力并最小化与之相关联的不准确度。 这种直接安装大大简化了这种传感器的制造过程。 此外,这种直接安装消除了飞行引线,从而允许将感测元件10制造成比现有技术小得多的尺寸。
    • 8. 发明授权
    • Capacitive semiconductive sensor with hinged diaphragm for planar
movement
    • 具有铰链膜片的电容式半导体传感器用于平面运动
    • US4998179A
    • 1991-03-05
    • US317236
    • 1989-02-28
    • Daniel H. GranthamJames L. Swindal
    • Daniel H. GranthamJames L. Swindal
    • G01L1/14G01L9/00G01L9/12H01L29/84
    • G01L9/0073
    • A semiconductive sensor or transducer (100), for example, a pressure sensor utilizing capacitance variations to sense pressure variations, of the silicon-on-silicon type, in which a "hinge" (111A) in the form of a relatively thin, encircling area is provided at the outer peripheral edge of the diaphragm, causing the central region (117) of the diaphragm (111) to move in a linear, non-curved or planar manner (compare FIG. 2 to FIG. 1), providing a linear response or frequency output. A first embodiment (FIG. 3) of the hinged silicon-on-silicon capacitive pressure sensor, which is basically cylindrical in shape, has the hinge formed by etching, milling or machining away some of the thickness of the diaphragm at its outer peripheral edge. In a second embodiment (FIG. 4) the hinge is formed by etching away some of the thickness of the diaphragm at its outer peripheral edge and using a glass layer to control the etching using a selective chemical enchant which is selective for silicon but does not attack the glass; while a third embodiment (FIG. 5) uses aluminum in place of the glass. In a fourth embodiment (FIG. 6) the hinge is formed effectively on the opposite side of the diaphragm from the shown in the embodiments of FIGS. 3-5. The hinge structure can be used in other forms of semiconductive transducers, which use the relative movement of a semiconductive diaphragm with respect to another semiconductive layer or substrate.