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1. 发明授权

US5999028A Differential circuits with adjustable propagation timing 失效
标题翻译：差分电路具有可调传播时间
公开(公告)号：US5999028A
公开(公告)日：1999-12-07
申请号：US995886
申请日：1997-12-22
申请人： Ulrich Knoch , Thorsten Krueger , Barbara Duffner , Ronnie Owens , Charles Moore
发明人： Ulrich Knoch , Thorsten Krueger , Barbara Duffner , Ronnie Owens , Charles Moore
IPC分类号： H03K19/0944 , H03F3/45 , H03K5/24 , H03K5/12 , G06G7/10
CPC分类号： H03F3/45771 , H03F3/45479 , H03K5/2481 , H03F2203/45624 , H03F2203/45646 , H03F2203/45702
摘要： Described is a circuit for receiving a differential input signal at two substantially symmetrically built up current paths and for providing an output signal therefrom. At least one current path comprises means for adjusting the timing information of the input signal to the timing information of the output signal. The adjustment can be accomplished by modifying a voltage level in the respective current path until the timing information of the output signals at least substantially represents the timing information of the input signal, e.g. by modifying an impedance or a current in the respective current path. The adjusting of the timing information is executed by applying a defined input signal with a known timing information, comparing the timing information of the resulting output signal with the timing information of the input signal, and modifying at least one voltage level in at least one of the current paths until the timing information of the output and input signals at least substantially match.
摘要翻译：描述了一种用于在两个基本上对称构建的电流路径处接收差分输入信号并用于从其提供输出信号的电路。至少一个电流路径包括用于将输入信号的定时信息调整为输出信号的定时信息的装置。可以通过修改相应电流路径中的电压电平来实现调整，直到输出信号的定时信息至少基本上表示输入信号的定时信息，例如，通过修改各个电流路径中的阻抗或电流。通过用已知的定时信息应用定义的输入信号来执行定时信息的调整，将所得到的输出信号的定时信息与输入信号的定时信息进行比较，并修改至少一个电压电平直到输出和输入信号的定时信息至少基本匹配的电流路径。

2. 发明授权

US08499676B1 Coupler system for attaching blank adaptor and the like to a flash hider 有权
标题翻译：用于将空白适配器等附接到闪光灯的耦合器系统
公开(公告)号：US08499676B1
公开(公告)日：2013-08-06
申请号：US13211811
申请日：2011-08-17
申请人： Charles Moore , Thomas Mooty
发明人： Charles Moore , Thomas Mooty
IPC分类号： F41A21/32
CPC分类号： F41A21/325 , F41A17/44 , F41A21/26 , F41A21/30
摘要： A coupling system attaches a device such as a blank adaptor or a sound suppressor to the flash hider of a firearm. The device is slid over the flash hider until a set of flat surfaces on it are aligned with a set of holes in the device. Camming latches are held in the holes in the device. The collar carried by the device is then threadably advanced to a locking position with respect to the device where it presses the camming latches into secure engagement with the flat surfaces on the flash hider. Unthreading the collar to the unlocked position allows the camming latches to be moved radially when the device is to be removed or rotated. A spring lock prevents the collar from rotating during use, particularly during firing of the firearm but may be released to rotate the collar between locked and unlocked positions.
摘要翻译：耦合系统将诸如空白适配器或声音抑制器的装置附接到枪支的闪光灯。该装置滑过闪光灯，直到其上的一组平坦表面与装置中的一组孔对准。凸轮锁扣保持在设备的孔中。然后将装置承载的衣领螺纹地推进到相对于装置的锁定位置，在那里它将凸轮闩锁按压到与闪光灯的平坦表面牢固接合。将套环拧开到未锁定位置可以使装置在拆卸或旋转时使凸轮闩锁径向移动。弹簧锁防止套环在使用期间旋转，特别是在枪械射击期间可以旋转，但可以释放以在锁定位置和解锁位置之间旋转套环。

3. 发明申请

US20080072021A1 Floating point exception handling in a risc microprocessor architecture 审中-公开
公开(公告)号：US20080072021A1
公开(公告)日：2008-03-20
申请号：US11981453
申请日：2007-10-31
申请人： George Shaw , Martin McClurg , Bradley Jensen , Russell Fish , Charles Moore
发明人： George Shaw , Martin McClurg , Bradley Jensen , Russell Fish , Charles Moore
IPC分类号： G06F9/302
CPC分类号： G06F12/0875 , G06F9/30014 , G06F9/3005 , G06F9/30134 , G06F9/30145 , G06F9/30167 , G06F9/322 , G06F9/3824 , G06F9/3861 , G06F9/3877 , G06F9/3879 , G09G5/363 , G09G5/393 , G09G2360/121 , G09G2360/126
摘要： A microprocessor executes at 100 native MIPS peak performance with a 100-MHz internal clock frequency. Central processing unit (CPU) instruction sets are hardwired, allowing most instructions to execute in a single cycle. A “flow-through” design allows the next instruction to start before the prior instruction completes, thus increasing performance. A microprocessing unit (MPU) contains 52 general-purpose registers, including 16 global data registers, an index register, a count register, a 16-deep addressable register/return stack, and an 18-deep operand stack. Both stacks contain an index register in the top elements, are cached on chip, and when required, automatically spill to and refill from external memory. The stacks minimize the data movement and also minimize memory access during procedure calls, parameter passing, and variable assignments. Additionally, the MPU contains a mode/status register and 41 locally addressed registers for I/O, control, configuration, and status. The CPU contains both a high-performance, zero-operand, dual-stack architecture MPU, and an input-output processor (IOP) that executes instructions to transfer data, count events, measure time, and perform other timing-dependent functions. A zero-operand stack architecture eliminates operand bits. Stacks also minimize register saves and loads within and across procedures, thus allowing shorter instruction sequences and faster-running code. Instructions are simple to decode and execute, allowing the MPU and IOP to issue and complete instructions in a single clock cycle—each at 100 native MIPS peak execution. Using 8-bit opcodes, the CPU obtains up to four instructions from memory each time an instruction fetch or pre-fetch is performed. These instructions can be repeated without rereading them from memory. This maintains high performance when connected directly to DRAM, without a cache.

4. 发明申请

US20070192570A1 Execution of instructions directly from input source 失效
标题翻译：直接从输入源执行指令
公开(公告)号：US20070192570A1
公开(公告)日：2007-08-16
申请号：US11441784
申请日：2006-05-26
申请人： Charles Moore
发明人： Charles Moore
IPC分类号： G06F9/40
CPC分类号： G06F15/8023 , G06F1/3203
摘要： A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. The sleeping computer (12) can be awaiting data or instructions (12). In the case of instructions, the sleeping computer (12) can be waiting to store the instructions or to immediately execute the instructions. In the later case, the instructions are placed in an instruction register (30a) when they are received and executed therefrom, without first placing the instructions first into memory. The instructions can include a micro-loop (100) which is capable of performing a series of operations repeatedly. In one application, the sleeping computer (12) is awakened by an input such that it commences an action that would otherwise have required an interrupt of an otherwise active computer.
摘要翻译：计算机阵列（10）具有多个计算机（12）。计算机（12）以异步方式彼此通信，并且计算机（12）本身以内部的大致异步方式进行操作。当一台计算机（12）尝试与另一台计算机（12）进行通信时，它将进入睡眠状态，直到另一台计算机（12）准备完成交易，从而节省电力并减少热量产生。休眠计算机（12）可以等待数据或指令（12）。在指令的情况下，睡眠计算机（12）可以等待存储指令或者立即执行指令。在后一种情况下，当它们被接收和执行时，这些指令被放置在指令寄存器（30a）中，而不首先将指令首先置于存储器中。指令可以包括能够重复执行一系列操作的微环（100）。在一个应用中，休眠计算机（12）被输入唤醒，使得它开始了否则将需要另外活动的计算机的中断的动作。

5. 发明申请

US20070192504A1 Asynchronous computer communication 有权
标题翻译：异步计算机通信
公开(公告)号：US20070192504A1
公开(公告)日：2007-08-16
申请号：US11355495
申请日：2006-02-16
申请人： Charles Moore
发明人： Charles Moore
IPC分类号： G06F15/16
CPC分类号： G06F1/3209 , H04L67/10
摘要： A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously, and the computers (12) themselves operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. A plurality of read lines (18), write lines (20) and data lines (22) interconnect the computers (12). When one computer (12) sets a read line (18) high and the other computer sets a corresponding write line (20) then data is transferred on the data lines (22). When both the read line (18) and corresponding write line (20) go low this allows both communicating computers (12) to know that the communication is completed. An acknowledge line (72) goes high to restart the computers (12).
摘要翻译：计算机阵列（10）具有多个计算机（12）。计算机（12）以异步方式彼此通信，并且计算机（12）本身以内部的大致异步方式进行操作。当一台计算机（12）尝试与另一台计算机（12）进行通信时，它将进入睡眠状态，直到另一台计算机（12）准备完成交易，从而节省电力并减少热量产生。多条读取线（18），写入线（20）和数据线（22）互连计算机（12）。当一个计算机（12）将读取行（18）设置为高电平，而另一个计算机设置相应的写入行（20）时，数据在数据线（22）上被传送。当读取线（18）和相应的写入线（20）都变低时，这允许通信计算机（12）知道通信完成。确认线（72）变高以重新启动计算机（12）。

6. 发明申请

US20070039086A1 Adjustable non-slipping soft workbelt 审中-公开
标题翻译：可调式无滑软皮带
公开(公告)号：US20070039086A1
公开(公告)日：2007-02-22
申请号：US11205462
申请日：2005-08-16
申请人： Charles Moore
发明人： Charles Moore
IPC分类号： A41F9/00
CPC分类号： A41F9/002 , A01K27/001 , A01K27/003 , A01K27/008 , A45F3/14 , A45F2003/142 , A45F2003/144
摘要： The present invention is a softer belt typically used for garments and it can be altered to be used as a collar for animals, a strap for carrying bags and luggage, or as a work belt used for nail bags used in construction. The softer belt, softer strap, and softer animal collar comprises nylon tubular webbing and is filled with one or more of the following materials; polystyrene pellets, memory foam, shredded polyurethane foam, whole foam or any other conceivable material that could be stuffed into the tubular webbing, which makes the device of this invention softer, plusher, and more comfortable. The work belt is easily adjustable and also comprises nylon tubular webbing filled with one or more of the above materials, but the webbing is not limited to being tubular and can also be flat nylon webbing, flat polypropylene webbing, flat patterned polypropylene webbing, etc.
摘要翻译：本发明是通常用于衣服的较软的皮带，并且可以改变为用作动物领，用于携带袋和行李的皮带，或用作用于建筑中的指甲袋的工作带。柔软的皮带，柔软的皮带和较软的动物领包括尼龙管状织带，并填充以下一种或多种材料; 聚苯乙烯颗粒，记忆泡沫，切碎的聚氨酯泡沫，整个泡沫或任何可以被填充到管状织带中的可想到的材料，这使得本发明的装置更柔软，更加舒适，更舒适。工作带易于调节，并且还包括填充有上述一种或多种材料的尼龙管状织带，但织带不限于管状，也可以是扁平尼龙织带，平面聚丙烯织带，平面图案聚丙烯织带等。

7. 发明申请

US20060213274A1 Nondestructive inspection heads for components having limited surrounding space 审中-公开
标题翻译：非破坏性检查头，用于周围空间有限的部件
公开(公告)号：US20060213274A1
公开(公告)日：2006-09-28
申请号：US11087029
申请日：2005-03-22
申请人： Charles Moore , Michael Moore , Michael Fair , James Bauer , Michael Metala
发明人： Charles Moore , Michael Moore , Michael Fair , James Bauer , Michael Metala
IPC分类号： G01N29/265 , G01N29/28 , G01N27/90
CPC分类号： G01N29/225 , G01N27/902 , G01N29/265 , G01N2291/101 , G01N2291/269
摘要： An inspection head where non-destructive inspection is structured to fit into narrow spaces, and to accurately and repeatably move an inspection probe along a surface to be inspected. Movement of the inspection head along an X, Y, Z, Θ, and Φ-axis is precisely controlled by individual drive mechanisms.
摘要翻译：一种检查头，其中非破坏性检查被构造成适合狭窄的空间，并且准确地和可重复地沿检查的表面移动检查探针。检测头沿X，Y，Z，Theta和Phi轴的移动由各个驱动机构精确控制。

8. 发明申请

US20050111605A1 Low-jitter charge-pump phase-locked loop 失效
标题翻译：低抖动电荷泵锁相环
公开(公告)号：US20050111605A1
公开(公告)日：2005-05-26
申请号：US10717778
申请日：2003-11-20
申请人： Alvin Leng Loke , James Barnes , Robert Barnes , Michael Oshima , Ronald Kennedy , Charles Moore
发明人： Alvin Leng Loke , James Barnes , Robert Barnes , Michael Oshima , Ronald Kennedy , Charles Moore
IPC分类号： H03D3/24 , H03L7/089 , H03L7/099 , H03L7/18
CPC分类号： H03L7/0893 , H03L7/099 , H03L7/18 , H03L2207/06
摘要： A phase-locked loop includes a voltage-controlled oscillator and a charge-pump loop filter. The voltage-controlled oscillator includes a varactor having a first set of capacitor cells configured to adjust a capacitance based on a first control voltage, and a second set of capacitor cells configured to adjust a capacitance based on a second control voltage. The charge-pump loop filter receives a first and a second update signal, each having at least one state based on a phase difference between a first clock and a second clock, and comprises a first component and a second component. The first component is configured to adjust, during an update period, a voltage across an impedance from a reference level based on the states of the first and second update signals and to return the voltage across the impedance to the reference level prior to an end of the update period, wherein the voltage across the impedance comprises the first control voltage. The second component is configured to adjust a voltage across a capacitor based on the states of the first and second input signals, wherein the voltage across the capacitor comprises the second control voltage.
摘要翻译：锁相环包括压控振荡器和电荷泵环路滤波器。压控振荡器包括变容二极管，其具有被配置为基于第一控制电压来调整电容的第一组电容器单元和被配置为基于第二控制电压来调整电容的第二组电容器单元。电荷泵环路滤波器接收第一和第二更新信号，每个信号具有基于第一时钟和第二时钟之间的相位差的至少一个状态，并且包括第一分量和第二分量。第一组件被配置为在更新周期期间基于第一和第二更新信号的状态来调整来自参考电平的阻抗上的电压，并且在结束前将阻抗上的电压返回到参考电平所述更新周期，其中所述阻抗两端的电压包括所述第一控制电压。第二部件被配置为基于第一和第二输入信号的状态来调整电容器两端的电压，其中电容器两端的电压包括第二控制电压。

9. 发明申请

US20130159376A1 SYSTEMS AND METHODS FOR A COMPUTING RESOURCE BROKER AGENT 审中-公开
标题翻译：计算资源经纪人代理的系统和方法
公开(公告)号：US20130159376A1
公开(公告)日：2013-06-20
申请号：US13715835
申请日：2012-12-14
申请人： Charles Moore
发明人： Charles Moore
IPC分类号： H04L29/08
CPC分类号： H04L67/10 , G06F9/5072 , H04L67/2809
摘要： A resource broker agent may be configured to monitor computing resources available on a computing device. The resource broker agent may be further configured to request additional computing resources in response to detecting a request to perform a computing task that cannot be adequately performed with the computing resources currently available on the computing device. The additional computing resources may be requested from one or more remote resource providers via a network. The additional computing resources may comprise remote execution of portions of the computing task. The resource broker agent may be further configured to perform the requested computing task by use of a virtualized computing environment of the computing device.
摘要翻译：资源代理代理可以被配置为监视计算设备上可用的计算资源。可以进一步配置资源代理代理以响应于检测到执行计算任务的请求而无法用计算设备上当前可用的计算资源进行适当的执行来请求额外的计算资源。可以经由网络从一个或多个远程资源提供者请求附加的计算资源。附加的计算资源可以包括计算任务的部分的远程执行。资源代理代理可以被进一步配置成通过使用计算设备的虚拟化计算环境来执行所请求的计算任务。

10. 发明授权

US08097709B2 Macrolactam compounds 有权
标题翻译：丁内酰胺化合物
公开(公告)号：US08097709B2
公开(公告)日：2012-01-17
申请号：US12196714
申请日：2008-08-22
申请人： Aaron Peoples , Qibo Zhang , Charles Moore , Lucy Ling , Mithra Rothfeder , Kim Lewis
发明人： Aaron Peoples , Qibo Zhang , Charles Moore , Lucy Ling , Mithra Rothfeder , Kim Lewis
IPC分类号： C07H17/02 , A01N43/04 , A61K31/70
CPC分类号： C07D309/14
摘要： The invention relates generally to novel macrolactams and their analogs, to processes for the preparation of these novel macrolactams, to pharmaceutical compositions comprising the novel macrolactams; and to methods of using the novel macrolactams to treat or inhibit various disorders.
摘要翻译：本发明一般涉及新颖的大环内酰胺及其类似物，用于制备这些新型的大内酰胺的方法，用于包含新型大环内酯的药物组合物; 以及使用新型大环内酰胺来治疗或抑制各种疾病的方法。

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