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    • 1. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE
    • 半导体存储器件
    • US20120059984A1
    • 2012-03-08
    • US13209026
    • 2011-08-12
    • Uk-song KangYoung-hyun JunJoo-sun Choi
    • Uk-song KangYoung-hyun JunJoo-sun Choi
    • G06F12/10G11C7/00H01L23/48
    • H01L25/18G11C5/02G11C7/10H01L2224/48091H01L2225/06544H01L2924/00014
    • A semiconductor package is disclosed. The semiconductor package includes a package interface, a stack of semiconductor chips, a plurality of stacks of through substrate vias, and an interface circuit. The package interface includes at least a first pair of terminals. Each stack of through substrate vias includes plural through substrate vias of respective ones of the semiconductor chips, each through substrate via electrically connected to a through substrate via of an immediately adjacent semiconductor chip. The interface circuit includes an input connected to the first pair of terminals to receive a differential signal providing first information, and includes an output to provide an output signal including the first information in a single-ended signal format to at least one of the plurality of stacks of through substrate vias.
    • 公开了半导体封装。 半导体封装包括封装接口,半导体芯片堆叠,多个通过衬底通孔的堆叠以及接口电路。 封装接口包括至少第一对端子。 每个通过衬底通孔的堆叠包括相应的半导体芯片的多个通过衬底通孔,每个穿过衬底经由电连接到直接相邻的半导体芯片的贯穿衬底通孔。 接口电路包括连接到第一对终端的输入端,以接收提供第一信息的差分信号,并且包括输出,以将包括单端信号格式的第一信息的输出信号提供给多个 通过衬底通孔的堆叠。
    • 2. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US08885380B2
    • 2014-11-11
    • US13209026
    • 2011-08-12
    • Uk-song KangYoung-hyun JunJoo-sun Choi
    • Uk-song KangYoung-hyun JunJoo-sun Choi
    • G11C5/02H01L25/18G11C7/10
    • H01L25/18G11C5/02G11C7/10H01L2224/48091H01L2225/06544H01L2924/00014
    • A semiconductor package is disclosed. The semiconductor package includes a package interface, a stack of semiconductor chips, a plurality of stacks of through substrate vias, and an interface circuit. The package interface includes at least a first pair of terminals. Each stack of through substrate vias includes plural through substrate vias of respective ones of the semiconductor chips, each through substrate via electrically connected to a through substrate via of an immediately adjacent semiconductor chip. The interface circuit includes an input connected to the first pair of terminals to receive a differential signal providing first information, and includes an output to provide an output signal including the first information in a single-ended signal format to at least one of the plurality of stacks of through substrate vias.
    • 公开了半导体封装。 半导体封装包括封装接口,半导体芯片堆叠,多个通过衬底通孔的堆叠以及接口电路。 封装接口包括至少第一对端子。 每个通过衬底通孔的堆叠包括相应的半导体芯片的多个通过衬底通孔,每个穿过衬底经由电连接到直接相邻的半导体芯片的贯穿衬底通孔。 接口电路包括连接到第一对终端的输入端,以接收提供第一信息的差分信号,并且包括输出,以将包括单端信号格式的第一信息的输出信号提供给多个 通过衬底通孔的堆叠。
    • 4. 发明申请
    • INPUT/OUTPUT (IO) INTERFACE AND METHOD OF TRANSMITTING IO DATA
    • 输入/输出(IO)接口和传输IO数据的方法
    • US20100045491A1
    • 2010-02-25
    • US12547204
    • 2009-08-25
    • Seung-jun BaeYoung-hyun JunJoo-sun ChoiKwang-il ParkSang-hyup Kwak
    • Seung-jun BaeYoung-hyun JunJoo-sun ChoiKwang-il ParkSang-hyup Kwak
    • H03M7/00
    • H03M5/06G11C7/1006
    • An input/output (IO) interface includes a data encoder which encodes each of a plurality of pieces of parallel data having different timings and generates a plurality of pieces of encoded data, and an alternating current (AC) coupling transmission unit which transmits the plurality of encoded data in an AC coupling method. The data encoder compares first parallel data with second parallel data from among the plurality of pieces of parallel data on a bit-by-bit basis and obtains the number of bits whose logic states have transited between the first parallel data and the second parallel data. When the number of bits whose logic states have transited is greater than or equal to a reference number of bits, the data encoder inverts bit values of the second parallel data to generate the encoded data. When the number of bits whose logic states have transited is less than the reference number of bits, the data encoder maintains the bit values of the second parallel data to generate the encoded data.
    • 输入/输出(IO)接口包括数据编码器,其对具有不同定时的多个并行数据中的每一个进行编码并生成多个编码数据;以及交流(AC)耦合传输单元,其传输多个 的交流耦合方法中的编码数据。 数据编码器在逐位的基础上将第一并行数据与多条并行数据中的第二并行数据进行比较,并且获得其逻辑状态已经在第一并行数据和第二并行数据之间转移的位数。 当逻辑状态已经转移的位数大于或等于参考位数时,数据编码器反转第二并行数据的位值,以产生编码数据。 当逻辑状态已经转移的位数小于参考位数时,数据编码器维持第二并行数据的位值以产生编码数据。
    • 6. 发明授权
    • Input/output (IO) interface and method of transmitting IO data
    • 输入/输出(IO)接口和传输IO数据的方法
    • US07986251B2
    • 2011-07-26
    • US12547204
    • 2009-08-25
    • Seung-jun BaeYoung-hyun JunJoo-sun ChoiKwang-il ParkSang-hyup Kwak
    • Seung-jun BaeYoung-hyun JunJoo-sun ChoiKwang-il ParkSang-hyup Kwak
    • H03M5/00
    • H03M5/06G11C7/1006
    • An input/output (IO) interface includes a data encoder which encodes each of a plurality of pieces of parallel data having different timings and generates a plurality of pieces of encoded data, and an alternating current (AC) coupling transmission unit which transmits the plurality of encoded data in an AC coupling method. The data encoder compares first parallel data with second parallel data from among the plurality of pieces of parallel data on a bit-by-bit basis and obtains the number of bits whose logic states have transited between the first parallel data and the second parallel data. When the number of bits whose logic states have transited is greater than or equal to a reference number of bits, the data encoder inverts bit values of the second parallel data to generate the encoded data. When the number of bits whose logic states have transited is less than the reference number of bits, the data encoder maintains the bit values of the second parallel data to generate the encoded data.
    • 输入/输出(IO)接口包括数据编码器,其对具有不同定时的多条并行数据中的每一条进行编码并产生多条编码数据;以及交流(AC)耦合传输单元,其传输多个 的交流耦合方法中的编码数据。 数据编码器在逐位的基础上将第一并行数据与多条并行数据中的第二并行数据进行比较,并且获得其逻辑状态已经在第一并行数据和第二并行数据之间转移的位数。 当逻辑状态已经转移的位数大于或等于参考位数时,数据编码器反转第二并行数据的位值,以产生编码数据。 当逻辑状态已经转移的位数小于参考位数时,数据编码器维持第二并行数据的位值以产生编码数据。
    • 9. 发明授权
    • Semiconductor device for charge pumping
    • 用于电荷泵浦的半导体器件
    • US07928795B2
    • 2011-04-19
    • US12458533
    • 2009-07-15
    • Joung-yeal KimYoung-hyun JunBai-sun Kong
    • Joung-yeal KimYoung-hyun JunBai-sun Kong
    • G05F1/10
    • H02M3/07
    • Provided is a semiconductor device for performing charge pumping. The semiconductor device may include a first pumping unit, a second pumping unit, and a controller. The first pumping unit may be configured to output a boosted voltage via an output node by using a first input signal and the initial voltage, where the boosted voltage is greater than an initial voltage. The second pumping unit may be configured to output the boosted voltage via the output node by using a second input signal and the initial voltage. The controller may be configured to control the first and second pumping units. Each of the first and second pumping units may include an initialization unit, a boosting unit, and a transmission unit. The initialization unit may be configured to control a voltage of a boosting node to be equal to the initial voltage during an initialization operation. The boosting unit may be configured to boost the voltage of the boosting node based on the first and second input signals. Also, the transmission unit may be configured to control output of the boosted voltage.
    • 提供一种用于进行电荷泵送的半导体器件。 半导体器件可以包括第一泵送单元,第二泵送单元和控制器。 第一泵单元可以被配置为通过使用第一输入信号和初始电压经由输出节点输出升压电压,其中升压电压大于初始电压。 第二泵送单元可以被配置为通过使用第二输入信号和初始电压经由输出节点输出升压电压。 控制器可以被配置为控制第一和第二泵送单元。 第一和第二泵送单元中的每一个可以包括初始化单元,升压单元和传输单元。 初始化单元可以被配置为在初始化操作期间将升压节点的电压控制为等于初始电压。 升压单元可以被配置为基于第一和第二输入信号来升压升压节点的电压。 此外,传输单元可以被配置为控制升压电压的输出。