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    • 3. 发明授权
    • Use of PE-SiON or PE-OXIDE for contact or via photo and for defect reduction with oxide and W chemical-mechanical polish
    • 使用PE-SiON或PE-OXIDE进行接触或通过照相和氧化物和W化学机械抛光的缺陷还原
    • US06228760B1
    • 2001-05-08
    • US09263563
    • 1999-03-08
    • Chen-Hua YuSyun-Ming JangTsu ShihAnthony YenJih-Churng Twu
    • Chen-Hua YuSyun-Ming JangTsu ShihAnthony YenJih-Churng Twu
    • H01L214763
    • H01L21/0276H01L21/31144H01L21/3144H01L21/3145H01L21/7684Y10S438/97
    • A method forming a protective (SiON or PE-Ox) dielectric anti-reflective coating (DARC) over a di electric layer after a chemical-mechanical polish dielectric layer planarization process and before a chemical-mechanical polish of a conductive layer used in a contact or via plug formation. A dielectric layer is chemical-mechanical polished thereby creating microscratches in the dielectric layer. The invention's protective SiON or PE-OX DARC layer is formed over the dielectric layer whereby the protective SiON or PE-OX DARC layer fills in the microscratches. A first opening is etched in he protective layer and the dielectric layer. A conductive layer is formed over the protective layer and fills the first opening. The conductive layer is chemical-mechanical polished to remove the conductive layer from over the protective layer and to form an interconnect filling the first opening. The protective SiON or PE-OX DARC layer is used as a CMP stop thereby preventing microscratches in the dielectric layer.
    • 在化学机械抛光介电层平坦化工艺之后和用于接触的导电层的化学机械抛光之前,在二电层上形成保护性(SiON或PE-Ox)电介质抗反射涂层(DARC)的方法 或通过插塞形成。 电介质层被化学机械抛光,从而在电介质层中形成微细结构。 本发明的保护性SiON或PE-OX DARC层形成在电介质层上,由此保护性SiON或PE-OX DARC层填充在微细凹槽中。 在其保护层和电介质层中蚀刻第一开口。 导电层形成在保护层上并填充第一开口。 导电层被化学机械抛光以从保护层上方移除导电层并形成填充第一开口的互连。 使用保护性SiON或PE-OX DARC层作为CMP阻挡层,从而防止电介质层中的微细纹。
    • 6. 发明授权
    • Method to prevent copper CMP dishing
    • 防止铜CMP凹陷的方法
    • US06391780B1
    • 2002-05-21
    • US09378949
    • 1999-08-23
    • Tsu ShihYing-Ho ChenJih-Churng Twu
    • Tsu ShihYing-Ho ChenJih-Churng Twu
    • H01L21302
    • H01L21/3212
    • A process for manufacturing damascene wiring in integrated circuits is described. Trenches in the top most layer are first over-filled with a soft metal (such as copper) and then a relatively thin layer of a hard material such as tantalum, tantalum nitride, titanium, titanium nitride etc is deposited on the copper surface Under a first set of control conditions CMP is then applied for just long enough to selectively remove this hard material layer from peaks in the copper surface while leaving it intact in the valleys. The control conditions for CMP are then adjusted so that CMP can proceed with material at the peaks being removed at a significantly faster rate than in the valleys. Thus, when the point is reached that all copper outside the trenches has been removed, the trenches are found to be just filled with a flat layer that has no dishing.
    • 描述了在集成电路中制造镶嵌线的工艺。 首先用软金属(例如铜)填充最顶层的沟槽,然后在铜表面上沉积相对薄的硬质材料如钽,氮化钽,钛,氮化钛等层 第一组控制条件CMP然后施加足够长的时间以从铜表面的峰中选择性地去除该硬质材料层,同时将其完整地留在谷中。 然后调整CMP的控制条件,使得CMP可以以比在谷中明显更快的速率除去峰值处的材料继续进行。 因此,当达到沟槽外部的所有铜已经被去除的地方时,发现沟槽刚好填充有没有凹陷的平坦层。
    • 7. 发明授权
    • Method for forming a self-aligned copper structure with improved
planarity
    • 用于形成具有改善的平面度的自对准铜结构的方法
    • US6080656A
    • 2000-06-27
    • US387436
    • 1999-09-01
    • Tsu ShihYing-Ho ChenJih-Churng TwuSyun-Ming Jang
    • Tsu ShihYing-Ho ChenJih-Churng TwuSyun-Ming Jang
    • H01L21/768H01L21/4763H01L21/44
    • H01L21/7684H01L21/76879
    • A method for forming a copper structure with reduced dishing, using a self-aligned copper electroplating process. The process begins by providing a semiconductor structure having a dielectric layer thereover, wherein the dielectric layer has a trench therein. A barrier layer is formed over the dielectric layer, a seed layer is formed on the barrier layer, and an insulating layer is formed on the seed layer. The insulating layer is patterned so as to expose the seed layer on the bottom and sidewalls of the trench, preferably using the trench photo mask. A copper layer is selectively electroplated onto the exposed seed layer on the bottom and sidewalls of the trench, while the insulating layer prevents copper deposition outside of the trench. The copper layer, the insulating layer, and the seed layer are planarized, stopping at the dielectric layer. Because of the self-aligned copper geometry, the copper suffers reduced dishing.
    • 一种使用自对准铜电镀工艺形成具有减少凹陷的铜结构的方法。 该过程开始于提供其上具有介电层的半导体结构,其中介电层在其中具有沟槽。 在电介质层上形成阻挡层,在阻挡层上形成种子层,在籽晶层上形成绝缘层。 图案化绝缘层,以便优选地使用沟槽光掩模来暴露沟槽的底部和侧壁上的晶种层。 选择性地将铜层电镀到沟槽的底部和侧壁上的暴露种子层上,同时绝缘层防止在该沟槽外部的铜沉积。 铜层,绝缘层和种子层被平坦化,停留在电介质层。 由于自对准的铜几何形状,铜损坏了凹陷。
    • 8. 发明授权
    • Reduction of Cu line damage by two-step CMP
    • 通过两步CMP减少Cu线损伤
    • US06620725B1
    • 2003-09-16
    • US09395287
    • 1999-09-13
    • Shau-Lin ShueMing-Hsing TsaiWen-Jye TsaiYing-Ho ChenTsu ShihJih-Churng TwuSyun-Ming Jang
    • Shau-Lin ShueMing-Hsing TsaiWen-Jye TsaiYing-Ho ChenTsu ShihJih-Churng TwuSyun-Ming Jang
    • H01L214763
    • H01L21/7684H01L21/3212
    • A process for performing CMP in two steps is described. After trenches have been formed and over-filled with copper, in a first embodiment of the invention a hard pad is used initially to remove most of the copper until a point is reached where dishing effects would begin to appear. A soft pad is then substituted and CMP continued until all copper has been removed, except in the trenches. In a second embodiment, CMP is initiated using a pad to which high-pressure is applied and which rotates relatively slowly. As before, this combination is used until the point is reached where dishing effects would begin to appear. Then, relatively low pressure in combination with relatively high rotational speed is used until all copper has been removed, except in the trenches. Both of these embodiments result in trenches which are just-filled with copper, with little or no dishing effects, and with all traces of copper removed everywhere except in the trenches themselves.
    • 描述用于在两个步骤中执行CMP的过程。 在沟槽已经形成并且用铜过度填充之后,在本发明的第一实施例中,最初使用硬焊盘去除大部分铜,直到达到一个点,其中凹陷效应将开始出现。 然后取代软焊盘,继续CMP直到除了沟槽中除去所有的铜。 在第二实施例中,使用施加高压并且相对缓慢地旋转的衬垫来启动CMP。 如前所述,使用这种组合,直到达到点,其中凹陷效应将开始出现。 然后,除了沟槽之外,使用相对较低的压力结合相对高的转速直到除去所有的铜。 这两个实施例都导致刚好填充铜的沟槽,几乎没有凹陷效应,并且除了沟槽本身之外,所有痕迹的铜都被去除。
    • 10. 发明授权
    • Apparatus and method for chemical mechanical polishing metal on a semiconductor wafer
    • 在半导体晶片上化学机械研磨金属的装置和方法
    • US06227947B1
    • 2001-05-08
    • US09366231
    • 1999-08-03
    • Tien-Chen HuJih-Churng TwuYing-Ho ChenTsu Shih
    • Tien-Chen HuJih-Churng TwuYing-Ho ChenTsu Shih
    • B24B100
    • B24B53/017B24B53/013
    • An apparatus and a method for chemical mechanical polishing a metal on a semiconductor wafer capable of achieving improved pad life are disclosed. In the apparatus, in addition to a first spray nozzle used for spraying a slurry solution onto the top of a polishing pad, a second spray nozzle is provided for mounting juxtaposed to a conditioning pad for dispensing a cleaning solution capable of dissolving polishing debris formed on the polishing pad surface. The apparatus may further include at least one cleaning solution reservoir for storing and delivering a cleaning solution to the second spray nozzle. The method can be advantageously carried out in two-steps during which a first cleaning solution is sprayed onto the pad surface for dissolving the polishing debris, and then a second cleaning solution is sprayed onto the pad surface for removing or flushing away the dissolved debris. In one illustration for the removal of oxides of copper, an acid-containing or ammonium hydroxide-containing cleaning solution is used advantageously to dissolve the oxides, and then deionized water is used to remove the dissolved debris from the pad surface.
    • 公开了一种用于化学机械抛光半导体晶片上的能够实现改善的焊盘寿命的装置和方法。 在该装置中,除了用于将浆液溶液喷洒到抛光垫的顶部上的第一喷嘴之外,还提供了第二喷嘴,用于与调节垫并置安装,用于分配能够溶解在 抛光垫表面。 该设备还可以包括至少一个清洁溶液储存器,用于将清洁溶液存储并输送到第二喷嘴。 该方法可以有利地在两个步骤中进行,在此期间将第一清洁溶液喷涂到垫表面上用于溶解抛光碎片,然后将第二清洁溶液喷涂到垫表面上以除去或冲洗掉溶解的碎屑。 在一个说明中,为了去除铜的氧化物,含有酸或氢氧化铵的清洗溶液有利地用于溶解氧化物,然后使用去离子水从衬垫表面去除溶解的碎屑。