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1. 发明授权

US08283252B2 Method of manufacturing semiconductor wafer 有权
标题翻译：制造半导体晶片的方法
公开(公告)号：US08283252B2
公开(公告)日：2012-10-09
申请号：US12585400
申请日：2009-09-14
申请人： Toru Taniguchi , Etsuro Morita , Satoshi Matagawa , Seiji Harada , Isoroku Ono , Mitsuhiro Endo , Fumihiko Yoshida
发明人： Toru Taniguchi , Etsuro Morita , Satoshi Matagawa , Seiji Harada , Isoroku Ono , Mitsuhiro Endo , Fumihiko Yoshida
IPC分类号： H01L21/302
CPC分类号： B24B37/08 , B24B37/042 , B24B37/24 , B24B37/28
摘要： A method of manufacturing a semiconductor wafer, including a step of differentiating the glossiness of a front surface from that of a rear surface of the wafer by holding the semiconductor wafer in a wafer holding hole formed in a carrier plate, and simultaneously polishing a front and back surface of said semiconductor wafer by driving said carrier plate to make a circular motion associated with no rotation on its own axis within a plane parallel with a surface of said carrier plate between a pair of polishing members disposed to face to each other, by using an abrasive body with a semiconductor wafer sink rate different in polishing from that of an abrasive body for one of a polishing member on an upper surface plate and a polishing member on a lower surface plate so as to simultaneously polish both the front and rear surfaces of the semiconductor wafer, or differentiating by differentiating the rotating speed of the upper surface plate from that of the lower surface plate.
摘要翻译：一种制造半导体晶片的方法，包括通过将半导体晶片保持在形成在载板上的晶片保持孔中，将前表面的光泽度与晶片的后表面的光泽度区分开的步骤，所述半导体晶片的后表面通过驱动所述承载板而形成圆周运动，所述圆周运动与平行于所述承载板的表面的平面之间在其自身轴线上不旋转，所述平面布置在彼此面对的一对抛光构件之间，通过使用具有与用于上表面板上的抛光构件和下表面板上的抛光构件之一的研磨体的抛光不同的半导体晶片沉降速率的研磨体，以同时抛光前表面和后表面半导体晶片，或者通过区分上表面板的转速与下表面板的转速来区分。

2. 发明申请

US20100009605A1 Method of manufacturing semiconductor wafer 有权
标题翻译：制造半导体晶片的方法
公开(公告)号：US20100009605A1
公开(公告)日：2010-01-14
申请号：US12585400
申请日：2009-09-14
申请人： Toru Taniguchi , Etsuro Morita , Satoshi Matagawa , Seiji Harada , Isoroku Ono , Mitsuhiro Endo , Fumihiko Yoshida
发明人： Toru Taniguchi , Etsuro Morita , Satoshi Matagawa , Seiji Harada , Isoroku Ono , Mitsuhiro Endo , Fumihiko Yoshida
IPC分类号： H01L21/463
CPC分类号： B24B37/08 , B24B37/042 , B24B37/24 , B24B37/28
摘要： A method of manufacturing a semiconductor wafer, including a step of differentiating the glossiness of a front surface from that of a rear surface of the wafer by holding the semiconductor wafer in a wafer holding hole formed in a carrier plate, and simultaneously polishing a front and back surface of said semiconductor wafer by driving said carrier plate to make a circular motion associated with no rotation on its own axis within a plane parallel with a surface of said carrier plate between a pair of polishing members disposed to face to each other, by using an abrasive body with a semiconductor wafer sink rate different in polishing from that of an abrasive body for one of a polishing member on an upper surface plate and a polishing member on a lower surface plate so as to simultaneously polish both the front and rear surfaces of the semiconductor wafer, or differentiating by differentiating the rotating speed of the upper surface plate from that of the lower surface plate.
摘要翻译：一种制造半导体晶片的方法，包括通过将半导体晶片保持在形成在载板上的晶片保持孔中，将前表面的光泽度与晶片的后表面的光泽度区分开的步骤，所述半导体晶片的后表面通过驱动所述承载板而形成圆周运动，所述圆周运动与平行于所述承载板的表面的平面之间在其自身轴线上不旋转，所述平面布置在彼此面对的一对抛光构件之间，通过使用具有与用于上表面板上的抛光构件和下表面板上的抛光构件之一的研磨体的抛光不同的半导体晶片沉降速率的研磨体，以同时抛光前表面和后表面半导体晶片，或者通过区分上表面板的转速与下表面板的转速来区分。

3. 发明授权

US07589023B2 Method of manufacturing semiconductor wafer 有权
标题翻译：制造半导体晶片的方法
公开(公告)号：US07589023B2
公开(公告)日：2009-09-15
申请号：US10258282
申请日：2001-04-23
申请人： Toru Taniguchi , Etsuro Morita , Satoshi Matagawa , Seiji Harada , Isoroku Ono , Mitsuhiro Endo , Fumihiko Yoshida
发明人： Toru Taniguchi , Etsuro Morita , Satoshi Matagawa , Seiji Harada , Isoroku Ono , Mitsuhiro Endo , Fumihiko Yoshida
IPC分类号： H01L21/302
CPC分类号： B24B37/08 , B24B37/042 , B24B37/24 , B24B37/28
摘要： A method of manufacturing a semiconductor wafer, comprising the step of differentiating the glossiness of a front surface from that of a rear surface of the wafer by using an abrasive cloth with a semiconductor wafer sink rate different in polishing from that of the other abrasive cloth for one of a polishing cloth (14) on an upper surface plate (12) and a polishing cloth (15) on a lower surface plate (13) so as to simultaneously polish both the front and rear surfaces of the semiconductor wafer (W), or differentiating by differentiating the rotating speed of the upper surface plate from that of the lower surface plate.
摘要翻译：一种半导体晶片的制造方法，其特征在于，通过使用具有与其它研磨布不同的半导体晶片沉降速率的研磨布，将前表面的光泽度与晶片的后表面的光泽度区分开的步骤，在上表面板（12）上的抛光布（14）和下表面板（13）上的抛光布（15）之一，以同时抛光半导体晶片（W）的前表面和后表面，或通过区分上表面板的转速与下表面板的转速来区分。

4. 发明授权

US07470169B2 Method of polishing semiconductor wafers by using double-sided polisher 有权
标题翻译：使用双面抛光机研磨半导体晶片的方法
公开(公告)号：US07470169B2
公开(公告)日：2008-12-30
申请号：US10296498
申请日：2001-05-31
申请人： Toru Taniguchi , Isoroku Ono , Seiji Harada
发明人： Toru Taniguchi , Isoroku Ono , Seiji Harada
IPC分类号： B24B1/00 , B24B7/00
CPC分类号： B24B37/08 , B24B37/042 , B24B37/16
摘要： During polishing of the semiconductor wafer by using a double-sided polisher, a larger difference as compared to the prior art is created between a frictional resistance acting on a front surface of a silicon wafer from an upper surface plate side and a frictional resistance acting on a back surface of the silicon wafer from a lower surface plate side. Thereby, respective wafers can be rotated at as 0.1 - 1.0 rpm within corresponding wafer holding holes. Accordingly, the rotation of the wafer would not be suspended even if there were any defective condition induced during polishing. Further, partial variation or deviation in polishing volume particular in the outer periphery of the wafer would be hard to occur. Therefore, the polish-sagging is suppressed and thus the improved degree of flatness of the wafer could be obtained.
摘要翻译：在使用双面抛光机抛光半导体晶片时，与现有技术相比，在从上表面板侧作用在硅晶片的前表面上的摩擦阻力和作用于硅片的摩擦阻力之间产生较大的差异硅晶片的背表面从下表面板侧。因此，相应的晶片可以在相应的晶片保持孔内以0.1-1.0rpm的速度旋转。因此，即使在抛光期间引起任何缺陷状况，晶片的旋转也不会被暂停。此外，晶片外周特定的抛光体积的部分变化或偏差将难以发生。因此，抑制了抛光下垂，因此可以获得晶片的平坦度的提高。

5. 发明授权

US07718507B2 Bonded wafer and method of producing the same 有权
标题翻译：粘结晶片及其制造方法
公开(公告)号：US07718507B2
公开(公告)日：2010-05-18
申请号：US11716341
申请日：2007-03-08
申请人： Etsurou Morita , Kazuo Hujie , Isoroku Ono
发明人： Etsurou Morita , Kazuo Hujie , Isoroku Ono
IPC分类号： H01L21/30
CPC分类号： H01L21/76254
摘要： A bonded wafer is produced by bonding an ion-implanted wafer for an active layer onto a wafer for a supporting substrate, and thereafter exfoliating the wafer for the active layer at the ion-implanted position through a heat treatment and then polishing a terrace portion of the resulting active layer with a predetermined fixed grain abrasive cloth to remove island-shaped projections on the terrace portion while controlling a scattering of terrace width and smoothness of an outer peripheral face of the active layer.
摘要翻译：通过将用于有源层的离子注入晶片粘合到用于支撑衬底的晶片上，然后通过热处理在离子注入位置剥离活性层晶片，然后研磨露出部分所得到的活性层具有预定的固定颗粒研磨布，以在控制活性层的外周面的平台宽度和平滑度的同时控制露台部分上的岛状突起。

6. 发明授权

US07781309B2 Method for manufacturing direct bonded SOI wafer and direct bonded SOI wafer manufactured by the method 有权
公开(公告)号：US07781309B2
公开(公告)日：2010-08-24
申请号：US11614681
申请日：2006-12-21
申请人： Etsurou Morita , Shinji Okawa , Isoroku Ono
发明人： Etsurou Morita , Shinji Okawa , Isoroku Ono
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/2007 , H01L21/76251
摘要： A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.

7. 发明申请

US20070148914A1 Process for Regeneration of a Layer Transferred Wafer and Regenerated Layer Transferred Wafer 有权
标题翻译：再生层转移晶片和再生层转移晶片的过程
公开(公告)号：US20070148914A1
公开(公告)日：2007-06-28
申请号：US11614745
申请日：2006-12-21
申请人： Etsurou Morita , Shinji Okawa , Isoroku Ono
发明人： Etsurou Morita , Shinji Okawa , Isoroku Ono
IPC分类号： B24B51/00 , H01L21/30
CPC分类号： B24B37/042 , H01L21/02032 , H01L21/76254
摘要： A processing time required for regeneration of a layer transferred wafer is reduced and the regeneration cost is lowered, while a removal amount at the regeneration is decreased the number of regeneration times is increased. A main surface of a semiconductor wafer (13) has a main flat portion (13d) and a chamfered portion (13c) formed in the periphery of the main flat portion (13d), an ion implanted area (13b) is formed by implanting ions only into the main flat portion (13d), a laminated body (16) is formed by laminating the main flat portion (13d) on a main surface of a support wafer (14), and moreover, the semiconductor wafer (13) is separated from a thin layer (17) in the ion implanted area (13b) by heat treatment at a predetermined temperature so as to obtain a thick layer transferred wafer (12), which is to be regenerated. The main flat portion (13d) of the semiconductor wafer (13) is formed to have a ring-shape step (13e) protruding from the chamfered portion (13c), and the semiconductor wafer (13) is separated from the thin layer (17) on the whole surface of the ion implanted area (13b) so that no step is generated in the periphery thereby to obtain the layer transferred wafer (12).
摘要翻译：减少转移晶片的再生所需的处理时间，降低再生成本，而再生时的去除量减少，再生次数增加。半导体晶片（13）的主表面具有主平坦部（13d）和形成在主平坦部（13d）周边的倒角部（13c），离子注入区域（13b）为通过仅将离子注入主平坦部分（13d）而形成，通过将主平坦部分（13d）层压在支撑晶片（14）的主表面上而形成层压体（16），此外，半导体通过在预定温度下的热处理将晶片（13）与离子注入区域（13b）中的薄层（17）分离，以获得待再生的厚层转移晶片（12）。半导体晶片（13）的主平坦部（13d）形成为具有从倒角部（13c）突出的环状台阶（13e），半导体晶片（13）与薄片在离子注入区域（13b）的整个表面上的层（17），使得在周边不产生任何步骤，从而获得层转移晶片（12）。

8. 发明授权

US07855129B2 Method for manufacturing direct bonded SOI wafer and direct bonded SOI wafer manufactured by the method 有权
标题翻译：通过该方法制造直接键合SOI晶片和直接键合SOI晶片的方法
公开(公告)号：US07855129B2
公开(公告)日：2010-12-21
申请号：US12778382
申请日：2010-05-12
申请人： Etsurou Morita , Shinji Okawa , Isoroku Ono
发明人： Etsurou Morita , Shinji Okawa , Isoroku Ono
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/2007 , H01L21/76251
摘要： A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.
摘要翻译：通过以下方法制造具有被覆和未曝光的整个掩埋氧化膜层的直接键合SOI晶片：（A）通过氧化膜层压半导体晶片和支撑晶片来形成层叠体; 和（B）通过使半导体晶片薄膜化到预定厚度，使用掩埋氧化膜层在支撑晶片上形成薄膜单晶硅层。在工艺（C）中，整个掩埋氧化物膜层被支撑晶片和单晶硅层的层叠侧的主表面覆盖。通过在工序（A）和（B）之间进行整个掩埋膜层的覆盖，除去形成在层叠侧的主面的周向端缘上的氧化膜和倒角部，留下氧化膜仅在除了圆周端边缘之外的层压表面上。

9. 发明申请

US20100219500A1 METHOD FOR MANUFACTURING DIRECT BONDED SOI WAFER AND DIRECT BONDED SOI WAFER MANUFACTURED BY THE METHOND 有权
标题翻译：用于制造直接结合的SOI波形的方法和由METHOND制造的直接结合的SOI波形
公开(公告)号：US20100219500A1
公开(公告)日：2010-09-02
申请号：US12778382
申请日：2010-05-12
申请人： Etsurou MORITA , Shinji Okawa , Isoroku Ono
发明人： Etsurou MORITA , Shinji Okawa , Isoroku Ono
IPC分类号： H01L21/762 , H01L29/02
CPC分类号： H01L21/2007 , H01L21/76251
摘要： A direct bonded SOI wafer having an entire buried oxide film layer covered and not exposed is manufactured by: (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness. In a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.
摘要翻译：通过以下方法制造具有被覆和未曝光的整个掩埋氧化膜层的直接键合SOI晶片：（A）通过氧化膜层压半导体晶片和支撑晶片来形成层叠体; 和（B）通过使半导体晶片薄膜化到预定厚度，使用掩埋氧化膜层在支撑晶片上形成薄膜单晶硅层。在工艺（C）中，整个掩埋氧化物膜层被支撑晶片和单晶硅层的层叠侧的主表面覆盖。通过在工序（A）和（B）之间进行整个掩埋膜层的覆盖，除去形成在层叠侧的主面的周向端缘上的氧化膜和倒角部，留下氧化膜仅在除了圆周端边缘之外的层压表面上。

10. 发明申请

US20070148912A1 Method for Manufacturing Direct Bonded SOI Wafer and Direct Bonded SOI Wafer Manufactured by the Method 有权
标题翻译：通过该方法制造直接键合的SOI晶片和直接键合的SOI晶片的方法
公开(公告)号：US20070148912A1
公开(公告)日：2007-06-28
申请号：US11614681
申请日：2006-12-21
申请人： Etsurou Morita , Shinji Okawa , Isoroku Ono
发明人： Etsurou Morita , Shinji Okawa , Isoroku Ono
IPC分类号： H01L21/30
CPC分类号： H01L21/2007 , H01L21/76251
摘要： There are provided a method for manufacturing a direct bonded SOI wafer in which the entire buried oxide film layer is covered and not exposed and a direct bonded SOI wafer. This is the improvement of a method for manufacturing a direct bonded SOI wafer comprising the process of (A) forming a laminated body by laminating a semiconductor wafer and a support wafer via an oxide film; and (B) forming a thin-film single crystal silicon layer on the support wafer using a buried oxide film layer by film-thinning the semiconductor wafer to a predetermined thickness, wherein in a process (C) the entire buried oxide film layer is covered by a main surface on the laminating side of the support wafer and the single crystal silicon layer. The covering of the entire buried oxide film layer is carried out by, between process (A) and (B), removing the oxide film formed on the circumferential end edge of the main surface on the laminating side and the chamfered portion to leave the oxide film only on the laminated surface except the circumferential end edge.
摘要翻译：提供了一种直接键合SOI晶片的制造方法，其中整个掩埋氧化物膜层被覆盖并且不被暴露，并且直接结合的SOI晶片。这是对直接键合SOI晶片的制造方法的改进，其包括以下工序：（A）通过氧化膜层叠半导体晶片和支撑晶片来形成层叠体; 和（B）通过将半导体晶片薄膜化为预定厚度，使用掩埋氧化物膜层在支撑晶片上形成薄膜单晶硅层，其中在（C）中，覆盖整个掩埋氧化物膜层的工艺（C）通过支撑晶片的层叠侧的主表面和单晶硅层。通过在工序（A）和（B）之间进行整个掩埋氧化膜层的覆盖，除去形成在层叠侧的主表面的周向端缘上的氧化膜和倒角部，留下氧化物仅在除了圆周端边缘之外的层压表面上的膜。

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