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1. 发明申请

US20080132006A1 PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES 有权
公开(公告)号：US20080132006A1
公开(公告)日：2008-06-05
申请号：US12028211
申请日：2008-02-08
申请人： Tongbi Jiang , J. Mike Brooks
发明人： Tongbi Jiang , J. Mike Brooks
IPC分类号： H01L21/00
CPC分类号： H01L24/19 , H01L23/5389 , H01L24/24 , H01L24/83 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/24227 , H01L2224/32245 , H01L2224/73267 , H01L2224/82031 , H01L2224/82039 , H01L2224/83192 , H01L2224/92244 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01078 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/15747 , H01L2924/181 , H01L2924/351 , H01L2224/82 , H01L2924/00 , H01L2224/83
摘要： Packaged microelectronic devices and methods for packaging microelectronic devices are disclosed herein. In one embodiment, a method of packaging a microelectronic device including a microelectronic die having a first side with a plurality of bond-pads and a second side opposite the first side includes forming a recess in a substrate, placing the microelectronic die in the recess formed in the substrate with the second side facing toward the substrate, and covering the first side of the microelectronic die with a dielectric layer after placing the microelectronic die in the recess. The substrate can include a thermal conductive substrate, such as a substrate comprised of copper and/or aluminum. The substrate can have a coefficient of thermal expansion at least approximately equal to the coefficient of thermal expansion of the microelectronic die or a printed circuit board.

2. 发明授权

US08092734B2 Covers for microelectronic imagers and methods for wafer-level packaging of microelectronics imagers 有权
标题翻译：用于微电子成像器的封装以及用于微电子成像器的晶片级封装的方法
公开(公告)号：US08092734B2
公开(公告)日：2012-01-10
申请号：US10845304
申请日：2004-05-13
申请人： Tongbi Jiang , J. Mike Brooks
发明人： Tongbi Jiang , J. Mike Brooks
IPC分类号： B29C65/00
CPC分类号： H01L31/0203 , B33Y80/00 , H01L27/14618 , H01L27/14625 , H01L31/02325 , H01L2224/48227 , H04N5/2253 , H04N5/2254 , H01L2224/48091 , H01L2924/00014
摘要： Methods for forming and attaching covers to microelectronic imaging units, packaging microelectronic imagers at the wafer level, and microelectronic imagers having covers that protect the image sensor are disclosed herein. In one embodiment, a method includes providing a first substrate having a plurality of covers, the covers including windows comprising regions of the first substrate and stand-offs projecting from the windows. The method continues by providing a second substrate having a plurality of microelectronic dies with image sensors, integrated circuits electrically coupled to the image sensors, and terminals electrically coupled to the integrated circuits. The method includes assembling the covers with corresponding dies so that the windows are aligned with corresponding image sensors and stand-offs contact corresponding dies inboard of the terminals and outboard of the image sensors. The first substrate is then cut to singulate the individual covers, after which the second substrate is cut to singulate individual imaging units.
摘要翻译：本文公开了用于在微晶电子成像单元上形成和附着盖子，在晶片级封装微电子成像器的方法以及具有保护图像传感器的覆盖物的微电子成像器。在一个实施例中，一种方法包括提供具有多个盖的第一基板，所述盖包括包括第一基板的区域和从窗口突出的支架的窗口。该方法继续通过提供具有多个具有图像传感器的多个微电子管芯的第二基板，电耦合到图像传感器的集成电路和电耦合到集成电路的端子。该方法包括将盖与相应的模具进行组装，使得窗口与对应的图像传感器对准，并且支架将接触端子和图像传感器外侧的对应的模具接触。然后切割第一衬底以分离单个覆盖物，然后将第二衬底切割成单个成像单元。

3. 发明授权

US07312101B2 Packaged microelectronic devices and methods for packaging microelectronic devices 有权
标题翻译：用于封装微电子器件的封装的微电子器件和方法
公开(公告)号：US07312101B2
公开(公告)日：2007-12-25
申请号：US10421452
申请日：2003-04-22
申请人： Tongbi Jiang , J. Mike Brooks
发明人： Tongbi Jiang , J. Mike Brooks
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50 , H01L21/20
CPC分类号： H01L24/19 , H01L23/5389 , H01L24/24 , H01L24/83 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/24227 , H01L2224/32245 , H01L2224/73267 , H01L2224/82031 , H01L2224/82039 , H01L2224/83192 , H01L2224/92244 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01078 , H01L2924/01082 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15311 , H01L2924/15747 , H01L2924/181 , H01L2924/351 , H01L2224/82 , H01L2924/00 , H01L2224/83
摘要： Packaged microelectronic devices and methods for packaging microelectronic devices are disclosed herein. In one embodiment, a method of packaging a microelectronic device including a microelectronic die having a first side with a plurality of bond-pads and a second side opposite the first side includes forming a recess in a substrate, placing the microelectronic die in the recess formed in the substrate with the second side facing toward the substrate, and covering the first side of the microelectronic die with a dielectric layer after placing the microelectronic die in the recess. The substrate can include a thermal conductive substrate, such as a substrate comprised of copper and/or aluminum. The substrate can have a coefficient of thermal expansion at least approximately equal to the coefficient of thermal expansion of the microelectronic die or a printed circuit board.
摘要翻译：封装的微电子器件和用于封装微电子器件的方法在本文中公开。在一个实施例中，包括微电子器件的方法包括具有多个接合焊盘的第一侧的微电子管芯和与第一侧相对的第二侧的微电子器件包括在衬底中形成凹槽，将微电子管芯置于形成的凹部中在具有第二面朝向衬底的衬底中，并且在将微电子管芯放置在凹槽中之后用介电层覆盖微电子管芯的第一侧。衬底可以包括导热衬底，例如由铜和/或铝构成的衬底。衬底可以具有至少近似等于微电子管芯或印刷电路板的热膨胀系数的热膨胀系数。

4. 发明授权

US08922002B2 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices 有权
标题翻译：用于制造封装的微电子器件的封装的微电子器件和方法
公开(公告)号：US08922002B2
公开(公告)日：2014-12-30
申请号：US12796011
申请日：2010-06-08
申请人： Young Do Kweon , Tongbi Jiang
发明人： Young Do Kweon , Tongbi Jiang
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40 , H01L23/00 , H01L21/56 , H01L23/498 , H01L23/31 , H01L23/544 , H01L21/48
CPC分类号： H01L24/742 , H01L21/4853 , H01L21/563 , H01L21/566 , H01L21/78 , H01L23/3114 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/12 , H01L24/14 , H01L24/16 , H01L24/81 , H01L24/94 , H01L2223/54426 , H01L2223/54453 , H01L2223/54486 , H01L2224/05001 , H01L2224/05008 , H01L2224/05026 , H01L2224/05569 , H01L2224/0557 , H01L2224/05571 , H01L2224/11013 , H01L2224/11015 , H01L2224/1183 , H01L2224/1184 , H01L2224/13022 , H01L2224/13099 , H01L2224/16 , H01L2224/274 , H01L2224/7598 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01018 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/384 , H01L2924/00 , H01L2224/05599
摘要： Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.
摘要翻译：本文公开了在半导体工件上形成多个微电子器件的微电子器件和方法。一种这样的方法包括将多个第一互连元件放置在半导体工件的一侧上，在工件侧面上形成层，通过加热第一互连元件来重塑第一互连元件，以及将多个第一互连元件的第一部分单独的第二互连元件到相应的第一互连元件，其中所述单个第二互连元件的第二部分被暴露。

5. 发明授权

US08723307B2 Packaged integrated circuit devices with through-body conductive vias, and methods of making same 有权
标题翻译：具有通孔导电通孔的封装集成电路器件及其制造方法
公开(公告)号：US08723307B2
公开(公告)日：2014-05-13
申请号：US12852925
申请日：2010-08-09
申请人： Tongbi Jiang , Yong Poo Chia
发明人： Tongbi Jiang , Yong Poo Chia
IPC分类号： H01L23/04
CPC分类号： H01L25/071 , H01L21/561 , H01L21/568 , H01L21/76877 , H01L21/82 , H01L23/3107 , H01L23/3114 , H01L23/3142 , H01L23/481 , H01L23/5389 , H01L24/19 , H01L24/27 , H01L24/32 , H01L24/83 , H01L24/96 , H01L24/97 , H01L25/105 , H01L25/50 , H01L2221/68359 , H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/32145 , H01L2224/83193 , H01L2224/838 , H01L2225/06548 , H01L2225/1035 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/00
摘要： A device is disclosed which includes at least one integrated circuit die, at least a portion of which is positioned in a body of encapsulant material, and at least one conductive via extending through the body of encapsulant material.
摘要翻译：公开了一种装置，其包括至少一个集成电路管芯，其至少一部分位于密封材料的主体中，以及延伸穿过密封材料本体的至少一个导电通孔。

6. 发明申请

US20110233745A1 Integrated Circuit Packages 有权
标题翻译：集成电路封装
公开(公告)号：US20110233745A1
公开(公告)日：2011-09-29
申请号：US13154540
申请日：2011-06-07
申请人： Setho Sing Fee , Lim Thiam Chye , Tongbi Jiang
发明人： Setho Sing Fee , Lim Thiam Chye , Tongbi Jiang
IPC分类号： H01L23/495
CPC分类号： H01L24/03 , H01L24/10 , H01L24/13 , H01L24/81 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05181 , H01L2224/05184 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/13 , H01L2224/13099 , H01L2224/81205 , H01L2224/81801 , H01L2224/81894 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/00 , H01L2924/00014
摘要： Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region of a semiconductor die, and in which a conductive projection associated with an interposer is bonded through a gold ball to an outermost of the at least two conductive layers. The conductive layers may comprise one or more of silver, gold, copper, chromium, nickel, palladium, platinum, tantalum, titanium, vanadium and tungsten. In some embodiments, the bond pad region may comprise aluminum, an inner of the conductive layers may comprise nickel, an outer of the conductive layers may comprise gold, the conductive projection associated with the interposer may comprise gold; and the thermosonic bonding may comprise gold-to-gold bonding of the interposer projection to a gold ball, and gold-to-gold bonding of the outer conductive layer to the gold ball. Some embodiments include integrated circuit packages.
摘要翻译：一些实施例包括组装集成电路封装的方法，其中在半导体管芯的接合焊盘区域上形成至少两个不同的导电层，并且其中与插入件相关联的导电突起通过金球结合到至少两个导电层。导电层可以包括银，金，铜，铬，镍，钯，铂，钽，钛，钒和钨中的一种或多种。在一些实施例中，接合焊盘区域可以包括铝，导电层的内部可以包括镍，导电层的外部可以包括金，与中介层相关联的导电突起可以包括金; 并且热超声键合可以包括插入物突起与金球的金 - 金结合，以及外导体层与金球的金 - 金结合。一些实施例包括集成电路封装。

7. 发明授权

US07749882B2 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices 有权
标题翻译：用于制造封装的微电子器件的封装的微电子器件和方法
公开(公告)号：US07749882B2
公开(公告)日：2010-07-06
申请号：US11509441
申请日：2006-08-23
申请人： Young Do Kweon , Tongbi Jiang
发明人： Young Do Kweon , Tongbi Jiang
IPC分类号： H01L21/44
CPC分类号： H01L24/742 , H01L21/4853 , H01L21/563 , H01L21/566 , H01L21/78 , H01L23/3114 , H01L23/49816 , H01L23/544 , H01L24/11 , H01L24/12 , H01L24/14 , H01L24/16 , H01L24/81 , H01L24/94 , H01L2223/54426 , H01L2223/54453 , H01L2223/54486 , H01L2224/05001 , H01L2224/05008 , H01L2224/05026 , H01L2224/05569 , H01L2224/0557 , H01L2224/05571 , H01L2224/11013 , H01L2224/11015 , H01L2224/1183 , H01L2224/1184 , H01L2224/13022 , H01L2224/13099 , H01L2224/16 , H01L2224/274 , H01L2224/7598 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01018 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/384 , H01L2924/00 , H01L2224/05599
摘要： Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes placing a plurality of first interconnect elements on a side of a semiconductor workpiece, forming a layer on the side of the workpiece, reshaping the first interconnect elements by heating the first interconnect elements, and coupling a first portion of a plurality of individual second interconnect elements to corresponding first interconnect elements with a second portion of the individual second interconnect elements exposed.
摘要翻译：本文公开了在半导体工件上形成多个微电子器件的微电子器件和方法。一种这样的方法包括将多个第一互连元件放置在半导体工件的一侧上，在工件侧面上形成层，通过加热第一互连元件来重塑第一互连元件，以及将多个第一互连元件的第一部分单独的第二互连元件到相应的第一互连元件，其中所述单个第二互连元件的第二部分被暴露。

8. 发明授权

US07700406B2 Methods of assembling integrated circuit packages 有权
标题翻译：集成电路封装的组装方法
公开(公告)号：US07700406B2
公开(公告)日：2010-04-20
申请号：US11770451
申请日：2007-06-28
申请人： Setho Sing Fee , Lim Thiam Chye , Tongbi Jiang
发明人： Setho Sing Fee , Lim Thiam Chye , Tongbi Jiang
IPC分类号： H01L21/50 , H01L21/48 , H01L21/66 , H01L21/44
CPC分类号： H01L24/03 , H01L24/10 , H01L24/13 , H01L24/81 , H01L2224/0401 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05181 , H01L2224/05184 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05664 , H01L2224/13 , H01L2224/13099 , H01L2224/81205 , H01L2224/81801 , H01L2224/81894 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/00 , H01L2924/00014
摘要： Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region of a semiconductor die, and in which a conductive projection associated with an interposer is bonded through a gold ball to an outermost of the at least two conductive layers. The conductive layers may comprise one or more of silver, gold, copper, chromium, nickel, palladium, platinum, tantalum, titanium, vanadium and tungsten. In some embodiments, the bond pad region may comprise aluminum, an inner of the conductive layers may comprise nickel, an outer of the conductive layers may comprise gold, the conductive projection associated with the interposer may comprise gold; and the thermosonic bonding may comprise gold-to-gold bonding of the interposer projection to a gold ball, and gold-to-gold bonding of the outer conductive layer to the gold ball. Some embodiments include integrated circuit packages.
摘要翻译：一些实施例包括组装集成电路封装的方法，其中在半导体管芯的接合焊盘区域上形成至少两个不同的导电层，并且其中与插入件相关联的导电突起通过金球结合到至少两个导电层。导电层可以包括银，金，铜，铬，镍，钯，铂，钽，钛，钒和钨中的一种或多种。在一些实施例中，接合焊盘区域可以包括铝，导电层的内部可以包括镍，导电层的外部可以包括金，与中介层相关联的导电突起可以包括金; 并且热超声键合可以包括插入物突起与金球的金 - 金结合，以及外导体层与金球的金 - 金结合。一些实施例包括集成电路封装。

9. 发明申请

US20090146234A1 MICROELECTRONIC IMAGING UNITS HAVING AN INFRARED-ABSORBING LAYER AND ASSOCIATED SYSTEMS AND METHODS 审中-公开
标题翻译：具有红外吸收层的微电子成像单元及相关系统及方法
公开(公告)号：US20090146234A1
公开(公告)日：2009-06-11
申请号：US11951528
申请日：2007-12-06
申请人： Shijian Luo , Tongbi Jiang , J. Michael Brooks
发明人： Shijian Luo , Tongbi Jiang , J. Michael Brooks
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L27/14618 , H01L27/14634 , H01L27/14683 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2924/00014 , H01L2924/15311 , H01L2924/00 , H01L2224/05599
摘要： Infrared (IR) absorbing layers and microelectronic imaging units that employ such layers are disclosed herein. In one embodiment, a method of manufacturing a microelectronic imaging unit includes attaching an IR-absorbing lamina having a filler material to a backside die surface of an imager workpiece. An individual imaging die is singulated from the workpiece such that a section of the infrared-absorbing lamina remains attached to the individual imaging die. The individual imaging die is coupled to an interposer substrate with a portion of the IR-absorbing lamina positioned therebetween. In another embodiment, the IR-absorbing lamina is a die attach film and the filler material is carbon black.
摘要翻译：本文公开了采用这种层的红外（IR）吸收层和微电子成像单元。在一个实施例中，制造微电子成像单元的方法包括将具有填充材料的IR吸收层附着到成像器工件的背面模具表面上。单个成像管芯从工件分离，使得红外线吸收层的一部分保持附着到各个成像管芯。单个成像管芯耦合到插入器衬底，其中IR吸收层的一部分位于它们之间。在另一个实施方案中，IR吸收层是芯片附着膜，填充材料是炭黑。

10. 发明申请

US20090102002A1 PACKAGED SEMICONDUCTOR ASSEMBLIES AND ASSOCIATED SYSTEMS AND METHODS 审中-公开
标题翻译：包装半导体组件及相关系统及方法
公开(公告)号：US20090102002A1
公开(公告)日：2009-04-23
申请号：US11969613
申请日：2008-01-04
申请人： Yong Poo Chia , Tongbi Jiang
发明人： Yong Poo Chia , Tongbi Jiang
IPC分类号： H01L31/00 , H01L21/60
CPC分类号： H01L27/14618 , H01L21/568 , H01L24/19 , H01L24/96 , H01L24/97 , H01L27/14683 , H01L2224/04105 , H01L2924/14 , H01L2924/181 , H01L2924/00
摘要： Semiconductor packages, packaged semiconductor devices, methods of manufacturing semiconductor packages, methods of packaging semiconductor devices, and associated systems are disclosed. A semiconductor package in accordance with a particular embodiment includes a die having a first side carrying a first bond site electrically connected to a sensor and/or a transmitter configured to receive and/or transmit radiation signals. The semiconductor package also includes encapsulant material at least partially encapsulating a portion of the die. The semiconductor package includes a conductive path from the first bond site to a second bond site, positioned on a back surface of the encapsulant, which can include through-encapsulant interconnects. A cover can be positioned adjacent to the die and be generally transparent to a target wavelength.
摘要翻译：公开了半导体封装，封装半导体器件，制造半导体封装的方法，封装半导体器件的方法以及相关系统。根据特定实施例的半导体封装包括具有第一侧的管芯，其具有电连接到传感器的第一接合位置和/或被配置为接收和/或发送辐射信号的发射器。半导体封装还包括至少部分地封装模具的一部分的密封剂材料。半导体封装包括从第一结合位点到第二结合位置的导电路径，其位于密封剂的后表面上，其可以包括通过封装的互连。盖可以邻近管芯定位，并且对于目标波长通常是透明的。

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