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    • 1. 发明授权
    • Rush current suppression circuit
    • 冲击电流抑制电路
    • US06717784B2
    • 2004-04-06
    • US10107529
    • 2002-03-26
    • Tomiyasu IsagoNaoki TakahashiYoshinori UsuiTatsuo Araki
    • Tomiyasu IsagoNaoki TakahashiYoshinori UsuiTatsuo Araki
    • H02H900
    • H02H9/001Y10T307/826
    • A rush current suppression circuit is used with a power supply circuit which includes a common line and an input voltage detection circuit and supplies power from an input power supply via a switching circuit. There is provided a smoothing capacitor coupled to an output end of the power supply circuit, and a rapid discharge and delay circuit coupled to the input voltage detection circuit and carrying out a rapid discharge and a time delay and controlling the switching circuit. The switching circuit includes two FETs which are coupled in series to the common line, and the two FETs have sources which are coupled to each other and gates which are coupled to each other and driven by the rapid discharge and delay circuit.
    • 冲击电流抑制电路与包括公共线路和输入电压检测电路的电源电路一起使用,并且经由开关电路从输入电源供应电力。 提供了耦合到电源电路的输出端的平滑电容器,以及耦合到输入电压检测电路并执行快速放电和时间延迟并控制开关电路的快速放电和延迟电路。 开关电路包括串联耦合到公共线的两个FET,并且两个FET具有彼此耦合的源极和彼此耦合并由快速放电和延迟电路驱动的栅极。