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1. 发明申请

US20120037918A1 SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120037918A1
公开(公告)日：2012-02-16
申请号：US13266420
申请日：2009-12-25
申请人： Tomihito Miyazaki , Makoto Kiyama , Taku Horii
发明人： Tomihito Miyazaki , Makoto Kiyama , Taku Horii
IPC分类号： H01L29/20 , H01L21/20
CPC分类号： H01L21/20 , H01L21/28575 , H01L21/28581 , H01L24/05 , H01L24/45 , H01L24/48 , H01L29/2003 , H01L29/41766 , H01L29/452 , H01L29/475 , H01L29/4958 , H01L29/7813 , H01L29/872 , H01L2224/04042 , H01L2224/05018 , H01L2224/05026 , H01L2224/05558 , H01L2224/05571 , H01L2224/05624 , H01L2224/45015 , H01L2224/45124 , H01L2224/48724 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/12032 , H01L2924/12042 , H01L2924/1305 , H01L2924/1306 , H01L2924/13064 , H01L2924/13091 , H01L2924/00 , H01L2224/05552 , H01L2924/2076
摘要： A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.
摘要翻译：半导体器件包括含有GaN和电极的半导体层（1）。所述电极包括电极主体（6），包含Al并形成在比所述电极主体（6）更远离所述半导体层（1）的位置处的连接用电极（8）和阻挡层（7）形成在电极主体（6）和连接用电极（8）之间，阻挡层（7）含有选自W，TiW，WN，TiN，Ta和TaN中的至少一种。阻挡层（7）的表面粗糙度RMS为3.0nm以下。

2. 发明授权

US08581359B2 Schottky barrier diode 有权
标题翻译：肖特基势垒二极管
公开(公告)号：US08581359B2
公开(公告)日：2013-11-12
申请号：US12516714
申请日：2008-08-22
申请人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
发明人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
IPC分类号： H01L29/47 , H01L29/02
CPC分类号： H01L29/872 , H01L21/0495 , H01L29/2003 , H01L29/402 , H01L29/66143 , H01L29/66212
摘要： A Schottky barrier diode includes a GaN freestanding substrate having a front surface, a GaN epitaxial layer deposited on the front surface, and an insulation layer deposited on the GaN epitaxial layer at a front surface and having an opening. Furthermore, the Schottky barrier diode also includes an electrode. The electrode is configured by a Schottky electrode provided in the opening in contact with the GaN epitaxial layer, and a field plate electrode connected to the Schottky electrode and also overlapping the insulation layer. The GaN freestanding substrate has a dislocation density of at most 1×108 cm−2.
摘要翻译：肖特基势垒二极管包括具有前表面的GaN独立衬底，沉积在前表面上的GaN外延层和在前表面上沉积在GaN外延层上并具有开口的绝缘层。此外，肖特基势垒二极管还包括电极。电极由设置在与GaN外延层接触的开口中的肖特基电极和连接到肖特基电极并且还与绝缘层重叠的场板电极构成。 GaN独立基板的位错密度为1×108cm-2以下。

3. 发明授权

US08502337B2 Schottky barrier diode and method for manufacturing Schottky barrier diode 有权
标题翻译：肖特基势垒二极管及制造肖特基势垒二极管的方法
公开(公告)号：US08502337B2
公开(公告)日：2013-08-06
申请号：US13057241
申请日：2009-07-23
申请人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
发明人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
IPC分类号： H01L29/20
CPC分类号： H01L29/872 , H01L29/0611 , H01L29/08 , H01L29/2003 , H01L29/402 , H01L29/475 , H01L29/66143
摘要： A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm−2 or less.
摘要翻译：制造肖特基势垒二极管的方法包括以下步骤。首先，准备GaN衬底。在GaN衬底上形成GaN层。形成包括由Ni或Ni合金制成并与GaN层接触的第一层的肖特基电极。形成肖特基电极的步骤包括形成金属层以用作肖特基电极的步骤和对金属层进行热处理的步骤。与肖特基电极接触的GaN层的区域的位错密度为1×10 8 cm -2以下。

4. 发明申请

US20100059761A1 SCHOTTKY BARRIER DIODE 有权
标题翻译：肖特基二极管二极管
公开(公告)号：US20100059761A1
公开(公告)日：2010-03-11
申请号：US12516714
申请日：2008-08-22
申请人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
发明人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
IPC分类号： H01L29/872 , H01L29/20
CPC分类号： H01L29/872 , H01L21/0495 , H01L29/2003 , H01L29/402 , H01L29/66143 , H01L29/66212
摘要： A Schottky barrier diode includes a GaN freestanding substrate having a front surface, a GaN epitaxial layer deposited on the front surface, and an insulation layer deposited on the GaN epitaxial layer at a front surface and having an opening. Furthermore, the Schottky barrier diode also includes an electrode. The electrode is configured by a Schottky electrode provided in the opening in contact with the GaN epitaxial layer, and a field plate electrode connected to the Schottky electrode and also overlapping the insulation layer. The GaN freestanding substrate has a dislocation density of at most 1×108 cm−2.
摘要翻译：肖特基势垒二极管包括具有前表面的GaN独立衬底，沉积在前表面上的GaN外延层和在前表面上沉积在GaN外延层上并具有开口的绝缘层。此外，肖特基势垒二极管还包括电极。电极由设置在与GaN外延层接触的开口中的肖特基电极和连接到肖特基电极并且还与绝缘层重叠的场板电极构成。 GaN独立基板的位错密度为1×108cm-2以下。

5. 发明授权

US08614446B2 Semiconductor device and method of producing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08614446B2
公开(公告)日：2013-12-24
申请号：US13266420
申请日：2009-12-25
申请人： Tomihito Miyazaki , Makoto Kiyama , Taku Horii
发明人： Tomihito Miyazaki , Makoto Kiyama , Taku Horii
IPC分类号： H01L29/15
CPC分类号： H01L21/20 , H01L21/28575 , H01L21/28581 , H01L24/05 , H01L24/45 , H01L24/48 , H01L29/2003 , H01L29/41766 , H01L29/452 , H01L29/475 , H01L29/4958 , H01L29/7813 , H01L29/872 , H01L2224/04042 , H01L2224/05018 , H01L2224/05026 , H01L2224/05558 , H01L2224/05571 , H01L2224/05624 , H01L2224/45015 , H01L2224/45124 , H01L2224/48724 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/12032 , H01L2924/12042 , H01L2924/1305 , H01L2924/1306 , H01L2924/13064 , H01L2924/13091 , H01L2924/00 , H01L2224/05552 , H01L2924/2076
摘要： A semiconductor device includes a semiconductor layer (1) containing GaN and an electrode. The electrode includes an electrode main body (6), a connection-use electrode (8) containing Al and formed at a position farther from the semiconductor layer (1) than the electrode main body (6), and a barrier layer (7) formed between the electrode main body (6) and the connection-use electrode (8), the barrier layer (7) containing at least one selected from the group consisting of W, TiW, WN, TiN, Ta, and TaN. A surface roughness RMS of the barrier layer (7) is 3.0 nm or less.
摘要翻译：半导体器件包括含有GaN和电极的半导体层（1）。所述电极包括电极主体（6），包含Al并形成在比所述电极主体（6）更远离所述半导体层（1）的位置处的连接用电极（8）和阻挡层（7）形成在电极主体（6）和连接用电极（8）之间，阻挡层（7）含有选自W，TiW，WN，TiN，Ta和TaN中的至少一种。阻挡层（7）的表面粗糙度RMS为3.0nm以下。

6. 发明申请

US20110133210A1 SCHOTTKY BARRIER DIODE AND METHOD FOR MANUFACTURING SCHOTTKY BARRIER DIODE 有权
标题翻译：肖特基二极体二极管及制造肖特基二极管的方法
公开(公告)号：US20110133210A1
公开(公告)日：2011-06-09
申请号：US13057241
申请日：2009-07-23
申请人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
发明人： Taku Horii , Tomihito Miyazaki , Makoto Kiyama
IPC分类号： H01L29/20 , H01L21/283
CPC分类号： H01L29/872 , H01L29/0611 , H01L29/08 , H01L29/2003 , H01L29/402 , H01L29/475 , H01L29/66143
摘要： A method for manufacturing a Schottky barrier diode includes the following steps. First, a GaN substrate is prepared. A GaN layer is formed on the GaN substrate. A Schottky electrode including a first layer made of Ni or Ni alloy and in contact with the GaN layer is formed. The step of forming the Schottky electrode includes a step of forming a metal layer to serve as the Schottky electrode and a step of heat treating the metal layer. A region of the GaN layer in contact with the Schottky electrode has a dislocation density of 1×108 cm−2 or less.
摘要翻译：制造肖特基势垒二极管的方法包括以下步骤。首先，准备GaN衬底。在GaN衬底上形成GaN层。形成包括由Ni或Ni合金制成并与GaN层接触的第一层的肖特基电极。形成肖特基电极的步骤包括形成金属层以用作肖特基电极的步骤和对金属层进行热处理的步骤。与肖特基电极接触的GaN层的区域的位错密度为1×10 8 cm -2以下。

7. 发明申请

US20120126251A1 METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SILICON CARBIDE SUBSTRATE, AND SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造碳化硅衬底的方法，制造半导体器件的方法，碳化硅衬底和半导体器件
公开(公告)号：US20120126251A1
公开(公告)日：2012-05-24
申请号：US13388691
申请日：2011-02-25
申请人： Makoto Sasaki , Shin Harada , Takeyoshi Masuda , Keiji Wada , Hiroki Inoue , Taro Nishiguchi , Kyoko Okita , Yasuo Namikawa , Taku Horii
发明人： Makoto Sasaki , Shin Harada , Takeyoshi Masuda , Keiji Wada , Hiroki Inoue , Taro Nishiguchi , Kyoko Okita , Yasuo Namikawa , Taku Horii
IPC分类号： H01L29/24 , H01L21/04
CPC分类号： H01L29/7802 , H01L21/2007 , H01L21/3247 , H01L29/045 , H01L29/1608 , H01L29/66068
摘要： A method for manufacturing a silicon carbide substrate achieves reduced manufacturing cost. The method includes the steps of: preparing a base substrate and a SiC substrate; fabricating a stacked substrate by stacking the base substrate and the SiC substrate; fabricating a connected substrate by heating the stacked substrate; transferring a void, formed at a connection interface, in a thickness direction of the connected substrate by heating the connected substrate to cause the base substrate to have a temperature higher than that of the SiC substrate; and removing the void by removing a region including a main surface of the base substrate opposite to the SiC substrate.
摘要翻译：制造碳化硅衬底的方法降低了制造成本。该方法包括以下步骤：制备基底和SiC衬底; 通过堆叠基底基板和SiC基板来制造堆叠的基板; 通过加热堆叠的基板来制造连接的基板; 通过加热连接的基板，在连接的基板的厚度方向上形成在连接界面处形成的空隙，使得基底基板的温度高于SiC基板的温度; 并且通过去除包括与SiC衬底相对的基底衬底的主表面的区域来去除空隙。

8. 发明申请

US20130143398A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20130143398A1
公开(公告)日：2013-06-06
申请号：US13610673
申请日：2012-09-11
申请人： Hiroyuki Kitabayashi , Hideto Tamaso , Taku Horii
发明人： Hiroyuki Kitabayashi , Hideto Tamaso , Taku Horii
IPC分类号： H01L21/283
CPC分类号： H01L21/046 , H01L21/0485 , H01L21/049 , H01L29/45 , H01L29/66068 , H01L29/7802 , H01L2924/0002 , H01L2924/00
摘要： A method for manufacturing a MOSFET includes the steps of: preparing a substrate made of silicon carbide; forming a drain electrode making ohmic contact with the substrate; and forming a backside pad electrode on and in contact with the drain electrode. The drain electrode formed in the step of forming the drain electrode is made of an alloy containing Ti and Si. Further, the backside pad electrode formed is maintained at a temperature of 300° C. or smaller until completion of the MOSFET. Accordingly, the manufacturing process can be efficient while achieving excellent adhesion between the electrodes.
摘要翻译：一种制造MOSFET的方法包括以下步骤：制备由碳化硅制成的衬底; 形成与基板欧姆接触的漏电极; 以及在所述漏极电极上并与所述漏电极接触形成背面焊盘电极。在形成漏电极的步骤中形成的漏极由含有Ti和Si的合金制成。此外，形成的背面焊盘电极保持在300℃以下的温度直到MOSFET完成。因此，制造工艺可以有效地同时实现电极之间的优异粘附。

9. 发明申请

US20130017677A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20130017677A1
公开(公告)日：2013-01-17
申请号：US13546828
申请日：2012-07-11
申请人： Taku Horii , Takeyoshi Masuda
发明人： Taku Horii , Takeyoshi Masuda
IPC分类号： H01L21/283
CPC分类号： H01L29/7802 , H01L21/0485 , H01L29/1608 , H01L29/45 , H01L29/66068
摘要： A method for manufacturing a MOSFET includes the steps of: forming a gate oxide film on an active layer, forming a gate electrode on the gate oxide film, forming a source contact electrode in ohmic contact with the active layer, and forming an interlayer insulating film made of silicon dioxide so as to cover the gate electrode after the source contact electrode is formed. The step of forming a source contact electrode includes the steps of forming a metal layer including aluminum so as to be in contact with the active layer, and alloying the metal layer.
摘要翻译：一种制造MOSFET的方法包括以下步骤：在有源层上形成栅极氧化膜，在栅极氧化膜上形成栅电极，形成与有源层欧姆接触的源极接触电极，并形成层间绝缘膜在形成源极接触电极之后，覆盖栅电极，由二氧化硅构成。形成源极接触电极的步骤包括以下步骤：形成包含铝的金属层以与活性层接触，并使金属层合金化。

10. 发明授权

US08609513B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08609513B2
公开(公告)日：2013-12-17
申请号：US13510570
申请日：2011-07-21
申请人： Taku Horii
发明人： Taku Horii
IPC分类号： H01L21/78 , H01L21/46 , H01L21/76 , H01L21/50
CPC分类号： H01L21/6836 , H01L21/0445 , H01L29/26
摘要： A method for manufacturing a semiconductor device includes the steps of: preparing a combined wafer; obtaining a first intermediate wafer by forming an active layer; obtaining a second intermediate wafer by forming a front-side electrode on the first intermediate wafer; supporting the second intermediate wafer by adhering an adhesive tape at the front-side electrode side; removing the supporting layer while supporting the second intermediate wafer using the adhesive tape; forming a backside electrode on the main surfaces of SiC substrates exposed by the removal of the supporting layer; adhering an adhesive tape at the backside electrode side and removing the adhesive tape at the front-side electrode side so as to support the plurality of SiC substrates using the adhesive tape; and obtaining a plurality of semiconductor devices by cutting the SiC substrates with the SiC substrates being supported by the adhesive tape provided at the backside electrode side.
摘要翻译：一种制造半导体器件的方法包括以下步骤：制备组合晶片; 通过形成有源层获得第一中间晶片; 通过在第一中间晶片上形成正面电极获得第二中间晶片; 通过在前侧电极侧粘附胶带来支撑第二中间晶片; 在使用粘合带支撑第二中间晶片的同时移除支撑层; 在通过去除支撑层而暴露的SiC衬底的主表面上形成背面电极; 在背面电极侧粘合胶带，并且在前侧电极侧去除粘合带，以便使用胶带支撑多个SiC基板; 以及通过用设置在背面电极侧的胶带支撑SiC基板来切割SiC衬底来获得多个半导体器件。

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